Commit | Line | Data |
---|---|---|
d001f4d4 | 1 | /* mbareg.h 4.15 81/05/03 */ |
3ed87cd4 BJ |
2 | |
3 | /* | |
4df4b0ef | 4 | * VAX MASSBUS adapter registers |
3ed87cd4 BJ |
5 | */ |
6 | ||
97fedd9e | 7 | struct mba_regs |
4d9e9e73 | 8 | { |
97fedd9e BJ |
9 | int mba_csr; /* configuration register */ |
10 | int mba_cr; /* control register */ | |
11 | int mba_sr; /* status register */ | |
12 | int mba_var; /* virtual address register */ | |
13 | int mba_bcr; /* byte count register */ | |
14 | int mba_dr; | |
15 | int mba_pad1[250]; | |
16 | struct mba_drv { /* per drive registers */ | |
17 | int mbd_cs1; /* control status */ | |
18 | int mbd_ds; /* drive status */ | |
19 | int mbd_er1; /* error register */ | |
20 | int mbd_mr1; /* maintenance register */ | |
21 | int mbd_as; /* attention status */ | |
22 | int mbd_da; /* desired address (disks) */ | |
23 | #define mbd_fc mbd_da /* frame count (tapes) */ | |
24 | int mbd_dt; /* drive type */ | |
25 | int mbd_la; /* look ahead (disks) */ | |
26 | #define mbd_ck mbd_la /* ??? (tapes) */ | |
27 | int mbd_sn; /* serial number */ | |
28 | int mbd_of; /* ??? */ | |
29 | #define mbd_tc mbd_of /* ??? */ | |
30 | int mbd_fill[22]; | |
31 | } mba_drv[8]; | |
32 | struct pte mba_map[256]; /* io space virtual map */ | |
33 | int mba_pad2[256*5]; /* to size of a nexus */ | |
4d9e9e73 | 34 | }; |
97fedd9e BJ |
35 | |
36 | /* | |
37 | * Bits in mba_cr | |
38 | */ | |
a0eab615 BJ |
39 | #define MBCR_INIT 0x1 /* init mba */ |
40 | #define MBCR_IE 0x4 /* enable mba interrupts */ | |
97fedd9e | 41 | |
4d9e9e73 | 42 | /* |
97fedd9e BJ |
43 | * Bits in mba_sr |
44 | */ | |
a0eab615 BJ |
45 | #define MBSR_DTBUSY 0x80000000 /* data transfer busy */ |
46 | #define MBSR_NRCONF 0x40000000 /* no response confirmation */ | |
47 | #define MBSR_CRD 0x20000000 /* corrected read data */ | |
48 | #define MBSR_CBHUNG 0x00800000 /* control bus hung */ | |
49 | #define MBSR_PGE 0x00080000 /* programming error */ | |
50 | #define MBSR_NED 0x00040000 /* non-existant drive */ | |
51 | #define MBSR_MCPE 0x00020000 /* massbus control parity error */ | |
52 | #define MBSR_ATTN 0x00010000 /* attention from massbus */ | |
53 | #define MBSR_SPE 0x00004000 /* silo parity error */ | |
54 | #define MBSR_DTCMP 0x00002000 /* data transfer completed */ | |
55 | #define MBSR_DTABT 0x00001000 /* data transfer aborted */ | |
56 | #define MBSR_DLT 0x00000800 /* data late */ | |
57 | #define MBSR_WCKUP 0x00000400 /* write check upper */ | |
58 | #define MBSR_WCKLWR 0x00000200 /* write check lower */ | |
59 | #define MBSR_MXF 0x00000100 /* miss transfer error */ | |
60 | #define MBSR_MBEXC 0x00000080 /* massbus exception */ | |
61 | #define MBSR_MDPE 0x00000040 /* massbus data parity error */ | |
62 | #define MBSR_MAPPE 0x00000020 /* page frame map parity error */ | |
63 | #define MBSR_INVMAP 0x00000010 /* invalid map */ | |
64 | #define MBSR_ERRCONF 0x00000008 /* error confirmation */ | |
65 | #define MBSR_RDS 0x00000004 /* read data substitute */ | |
66 | #define MBSR_ISTIMO 0x00000002 /* interface sequence timeout */ | |
67 | #define MBSR_RDTIMO 0x00000001 /* read data timeout */ | |
97fedd9e | 68 | |
a0eab615 | 69 | #define MBSR_BITS \ |
4656c503 BJ |
70 | "\20\40DTBUSY\37NRCONF\36CRD\30CBHUNG\24PGE\23NED\22MCPE\21ATTN\ |
71 | \17SPE\16DTCMP\15DTABT\14DLT\13WCKUP\12WCKLWR\11MXF\10MBEXC\7MDPE\ | |
72 | \6MAPPE\5INVMAP\4ERRCONF\3RDS\2ISTIMO\1RDTIMO" | |
c4a6465b | 73 | |
a0eab615 | 74 | #define MBSR_HARD (MBSR_PGE|MBSR_ERRCONF|MBSR_ISTIMO|MBSR_RDTIMO) |
c4a6465b | 75 | |
a0eab615 | 76 | #define MBSR_EBITS (~(MBSR_DTBUSY|MBSR_CRD|MBSR_ATTN|MBSR_DTCMP)) |
c4a6465b | 77 | |
a0eab615 BJ |
78 | #ifdef KERNEL |
79 | extern char mbsr_bits[]; | |
80 | #endif | |
97fedd9e BJ |
81 | |
82 | /* | |
83 | * Commands for mbd_cs1 | |
84 | */ | |
a0eab615 BJ |
85 | #define MB_WCOM 0x30 |
86 | #define MB_RCOM 0x38 | |
87 | #define MB_GO 0x1 | |
97fedd9e BJ |
88 | |
89 | /* | |
90 | * Bits in mbd_ds. | |
91 | */ | |
a0eab615 BJ |
92 | #define MBDS_ERR 0x00004000 /* error in drive */ |
93 | #define MBDS_MOL 0x00001000 /* medium on line */ | |
94 | #define MBDS_DPR 0x00000100 /* drive present */ | |
95 | #define MBDS_DRY 0x00000080 /* drive ready */ | |
96 | ||
97 | #define MBDS_DREADY (MBDS_MOL|MBDS_DPR|MBDS_DRY) | |
97fedd9e BJ |
98 | |
99 | /* | |
100 | * Bits in mbd_dt | |
4d9e9e73 BJ |
101 | */ |
102 | #define MBDT_NSA 0x8000 /* not sector addressible */ | |
103 | #define MBDT_TAP 0x4000 /* is a tape */ | |
104 | #define MBDT_MOH 0x2000 /* moving head */ | |
105 | #define MBDT_7CH 0x1000 /* 7 channel */ | |
106 | #define MBDT_DRQ 0x800 /* drive request required */ | |
107 | #define MBDT_SPR 0x400 /* slave present */ | |
108 | ||
109 | #define MBDT_TYPE 0x1ff | |
110 | #define MBDT_MASK (MBDT_NSA|MBDT_TAP|MBDT_TYPE) | |
111 | ||
97fedd9e | 112 | /* type codes for disk drives */ |
4d9e9e73 BJ |
113 | #define MBDT_RP04 020 |
114 | #define MBDT_RP05 021 | |
115 | #define MBDT_RP06 022 | |
116 | #define MBDT_RP07 042 | |
117 | #define MBDT_RM03 024 | |
118 | #define MBDT_RM05 027 | |
119 | #define MBDT_RM80 026 | |
120 | ||
97fedd9e | 121 | /* type codes for tape drives */ |
4d9e9e73 BJ |
122 | #define MBDT_TM03 050 |
123 | #define MBDT_TE16 051 | |
124 | #define MBDT_TU45 052 | |
125 | #define MBDT_TU77 054 | |
d001f4d4 | 126 | #define MBDT_TU78 0101 /* can't handle these (yet) */ |