projects / unix-history / blame
| Commit | Line | Data |
|---|---|---|
| da7c5cc6 KM |
1 | /* |
| 2 | * Copyright (c) 1982 Regents of the University of California. | |
| 3 | * All rights reserved. The Berkeley software License Agreement | |
| 4 | * specifies the terms and conditions for redistribution. | |
| 5 | * | |
| 6 | * @(#)idcreg.h 6.2 (Berkeley) %G% | |
| 7 | */ | |
| 28e4621b SL |
8 | |
| 9 | #define NRB02SECT 40 /* RB02 sectors/track */ | |
| 10 | #define NRB02TRK 2 /* RB02 tracks/cylinder */ | |
| 11 | #define NRB02CYL 512 /* RB02 cylinders/disk */ | |
| 12 | #define NRB80SECT 31 /* RB80 sectors/track */ | |
| 13 | #define NRB80TRK 14 /* RB80 tracks/cylinder */ | |
| 14 | #define NRB80CYL 559 /* RB80 cylinders/disk */ | |
| 15 | ||
| 16 | struct idcdevice | |
| 17 | { | |
| 18 | int idccsr; /* control status register */ | |
| 19 | int idcbar; /* bus address register */ | |
| 20 | int idcbcr; /* byte count register */ | |
| 21 | int idcdar; /* disk address register */ | |
| 22 | int idcmpr; /* multi-purpose register */ | |
| 23 | int idceccpos; /* ecc position register */ | |
| 24 | int idceccpat; /* ecc pattern register */ | |
| 25 | int idcreset; /* master reset register */ | |
| 26 | }; | |
| 27 | ||
| 28 | /* idccsr */ | |
| 29 | #define IDC_TOI 0x10000000 /* time out inhibit */ | |
| 30 | #define IDC_ASSI 0x08000000 /* automatic skip sector inhibit */ | |
| 31 | #define IDC_R80 0x04000000 /* selected disk is R80 */ | |
| 32 | #define IDC_MTN 0x02000000 /* maintenance */ | |
| 33 | #define IDC_IR 0x01000000 /* interrupt request */ | |
| 34 | #define IDC_SSE 0x00800000 /* R80 skip sector error */ | |
| 35 | #define IDC_SSEI 0x00400000 /* R80 skip sector error inhibit */ | |
| 36 | #define IDC_ECS 0x00300000 /* R80 ecc status */ | |
| 37 | #define IDC_ECS_NONE 0x00000000 /* no data error */ | |
| 38 | #define IDC_ECS_HARD 0x00200000 /* hard ecc error */ | |
| 39 | #define IDC_ECS_SOFT 0x00300000 /* soft ecc error */ | |
| 40 | #define IDC_ATTN 0x000f0000 /* attention bits */ | |
| 41 | #define IDC_ERR 0x00008000 /* composite error */ | |
| 42 | #define IDC_DE 0x00004000 /* drive error */ | |
| 43 | #define IDC_NXM 0x00002000 /* non-existant memory */ | |
| 44 | #define IDC_DLT 0x00001000 /* data late */ | |
| 45 | #define IDC_HNF IDC_DLT /* header not found */ | |
| 46 | #define IDC_DCK 0x00000800 /* data check */ | |
| 47 | #define IDC_OPI 0x00000400 /* operation incomplete */ | |
| 48 | #define IDC_DS 0x00000300 /* drive select bits */ | |
| 49 | #define IDC_CRDY 0x00000080 /* controller ready */ | |
| 50 | #define IDC_IE 0x00000040 /* interrupt enable */ | |
| 51 | #define IDC_FUNC 0x0000000e /* function code */ | |
| 52 | #define IDC_DRDY 0x00000001 /* drive ready */ | |
| 53 | ||
| 54 | #define IDC_HARD (IDC_NXM|IDC_DE) | |
| 55 | ||
| 56 | #define IDCCSR_BITS \ | |
| 57 | "\20\35TOI\34ASSI\33R80\32MTN\31IR\30SSE\27SSEI\26ECS1\25ECS0\24ATN3\ | |
| 58 | \23ATN2\22ATN1\21ATN0\20ERR\17DE\16NXM\15DLT\14DCK\13OPI\12DS1\11DS0\ | |
| 59 | \10CRDY\7IE\4F2\3F1\2F0\1DRDY" | |
| 60 | ||
| 61 | /* function codes */ | |
| 62 | #define IDC_NOP 000 /* no operation */ | |
| 63 | #define IDC_WCHK 002 /* write check data */ | |
| 64 | #define IDC_GETSTAT 004 /* get status */ | |
| 65 | #define IDC_SEEK 006 /* seek */ | |
| 66 | #define IDC_RHDR 010 /* read header */ | |
| 67 | #define IDC_WRITE 012 /* write data */ | |
| 68 | #define IDC_READ 014 /* read data */ | |
| 69 | #define IDC_RNOHCHK 016 /* read data w/o header check */ | |
| 70 | ||
| 71 | /* idcmpr for RL02 get status command */ | |
| 72 | #define IDCGS_RST 010 /* reset */ | |
| 73 | #define IDCGS_GS 002 /* get status, must be 1 */ | |
| 74 | #define IDCGS_M 001 /* mark, must be 1 */ | |
| 75 | #define IDCGS_GETSTAT (IDCGS_RST|IDCGS_GS|IDCGS_M) | |
| 76 | ||
| 77 | /* RL02 status word */ | |
| 78 | #define IDCDS_WDE 0100000 /* write data error */ | |
| 79 | #define IDCDS_HCE 0040000 /* head current error */ | |
| 80 | #define IDCDS_WL 0020000 /* write lock */ | |
| 81 | #define IDCDS_SKTO 0010000 /* seek timeout */ | |
| 82 | #define IDCDS_SPD 0004000 /* spindle error */ | |
| 83 | #define IDCDS_WGE 0002000 /* write gate error */ | |
| 84 | #define IDCDS_VC 0001000 /* volume check */ | |
| 85 | #define IDCDS_DSE 0000400 /* drive select error */ | |
| 86 | #define IDCDS_HS 0000100 /* head select */ | |
| 87 | #define IDCDS_CO 0000040 /* cover open */ | |
| 88 | #define IDCDS_HO 0000020 /* heads out */ | |
| 89 | #define IDCDS_BH 0000010 /* brush home */ | |
| 90 | #define IDCDS_STATE 0000007 /* drive state */ | |
| 91 | ||
| 92 | #define IDCRB02DS_BITS \ | |
| 93 | "\10\20WDE\17HCE\16WL\15SKTO\14SPD\13WBE\12VC\11DSE\ | |
| 94 | \7HS\6CO\5HO\4BH\3STC\2STB\1STA" | |
| 95 | ||
| 96 | /* R80 status word */ | |
| 97 | #define IDCDS_WTP 0020000 /* write protect */ | |
| 98 | #define IDCDS_DRDY 0010000 /* driver ready */ | |
| 99 | #define IDCDS_ONCY 0004000 /* on cylinder */ | |
| 100 | #define IDCDS_SKE 0002000 /* seek error */ | |
| 101 | #define IDCDS_PLGV 0001000 /* plug valid */ | |
| 102 | #define IDCDS_FLT 0000400 /* fault */ | |
| 103 | ||
| 104 | #define IDCRB80DS_BITS \ | |
| 105 | "\10\16WTP\15DRDY\14ONCY\13SKE\12PLGV\11FLT\5SEC4\4SEC3\3SEC2\2SEC1\1SEC0" |