Commit | Line | Data |
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042f22be | 1 | /* ct.c 4.5 81/03/11 */ |
99aa0ab4 | 2 | |
a53c8506 | 3 | #include "ct.h" |
99aa0ab4 BJ |
4 | #if NCT > 0 |
5 | /* | |
6 | * GP DR11C driver used for C/A/T | |
7 | */ | |
8 | ||
9 | #include "../h/param.h" | |
a53c8506 | 10 | #include "../h/systm.h" |
99aa0ab4 BJ |
11 | #include "../h/tty.h" |
12 | #include "../h/pte.h" | |
13 | #include "../h/map.h" | |
99aa0ab4 | 14 | #include "../h/buf.h" |
a53c8506 BJ |
15 | #include "../h/ubareg.h" |
16 | #include "../h/ubavar.h" | |
99aa0ab4 BJ |
17 | #include "../h/conf.h" |
18 | #include "../h/dir.h" | |
19 | #include "../h/user.h" | |
20 | ||
21 | #define PCAT (PZERO+9) | |
22 | #define CATHIWAT 100 | |
23 | #define CATLOWAT 30 | |
24 | ||
a53c8506 BJ |
25 | struct ct_softc { |
26 | int sc_openf; | |
27 | struct clist sc_oq; | |
28 | } ct_softc[NCT]; | |
99aa0ab4 | 29 | |
a53c8506 BJ |
30 | struct ctdevice { |
31 | short ctcsr; | |
32 | short ctbuf; | |
99aa0ab4 BJ |
33 | }; |
34 | ||
a53c8506 BJ |
35 | int ctprobe(), ctattach(), ctintr(); |
36 | struct uba_device *ctdinfo[NCT]; | |
37 | u_short ctstd[] = { 0 }; | |
38 | struct uba_driver ctdriver = | |
39 | { ctprobe, 0, ctattach, 0, ctstd, "ct", ctdinfo }; | |
40 | ||
042f22be BJ |
41 | #define CTUNIT(dev) (minor(dev)) |
42 | ||
a53c8506 BJ |
43 | ctprobe(reg) |
44 | caddr_t reg; | |
45 | { | |
46 | register struct ctdevice *ctaddr = (struct ctdevice *)reg; | |
47 | ||
48 | ctaddr->ctcsr = IENABLE; | |
49 | DELAY(10000); | |
50 | ctaddr->ctcsr = 0; | |
51 | } | |
99aa0ab4 | 52 | |
042f22be BJ |
53 | /*ARGSUSED*/ |
54 | ctattach(ui) | |
55 | register struct uba_device *ui; | |
56 | { | |
57 | ||
58 | } | |
59 | ||
99aa0ab4 | 60 | ctopen(dev) |
a53c8506 | 61 | dev_t dev; |
99aa0ab4 | 62 | { |
a53c8506 BJ |
63 | register struct ct_softc *sc; |
64 | register struct uba_device *ui; | |
65 | register struct ctdevice *ctaddr; | |
66 | ||
67 | if (CTUNIT(dev) >= NCT || (ui = ctdinfo[CTUNIT(dev)]) == 0 || | |
68 | ui->ui_alive == 0 || (sc = &ct_softc[CTUNIT(dev)])->sc_openf) { | |
99aa0ab4 | 69 | u.u_error = ENXIO; |
a53c8506 BJ |
70 | return; |
71 | } | |
72 | sc->sc_openf = 1; | |
73 | ctaddr->ctcsr |= IENABLE; | |
99aa0ab4 BJ |
74 | } |
75 | ||
a53c8506 BJ |
76 | ctclose(dev) |
77 | dev_t dev; | |
99aa0ab4 | 78 | { |
a53c8506 BJ |
79 | |
80 | ct_softc[CTUNIT(dev)].sc_openf = 0; | |
81 | ctintr(dev); | |
99aa0ab4 BJ |
82 | } |
83 | ||
84 | ctwrite(dev) | |
a53c8506 | 85 | dev_t dev; |
99aa0ab4 | 86 | { |
a53c8506 BJ |
87 | register struct ct_softc *sc = &ct_softc[CTUNIT(dev)]; |
88 | register int c; | |
99aa0ab4 BJ |
89 | |
90 | while ((c=cpass()) >= 0) { | |
a0eab615 | 91 | (void) spl5(); |
a53c8506 BJ |
92 | while (sc->sc_oq.c_cc > CATHIWAT) |
93 | sleep((caddr_t)&sc->sc_oq, PCAT); | |
94 | while (putc(c, &sc->sc_oq) < 0) | |
99aa0ab4 | 95 | sleep((caddr_t)&lbolt, PCAT); |
a53c8506 | 96 | ctintr(dev); |
a0eab615 | 97 | (void) spl0(); |
99aa0ab4 BJ |
98 | } |
99 | } | |
100 | ||
a53c8506 BJ |
101 | ctintr(dev) |
102 | dev_t dev; | |
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103 | { |
104 | register int c; | |
a53c8506 BJ |
105 | register struct ct_softc *sc = &ct_softc[CTUNIT(dev)]; |
106 | register struct ctdevice *ctaddr = | |
107 | (struct ctdevice *)ctdinfo[CTUNIT(dev)]->ui_addr; | |
99aa0ab4 | 108 | |
a53c8506 BJ |
109 | if (ctaddr->ctcsr&DONE) { |
110 | if ((c = getc(&sc->sc_oq)) >= 0) { | |
99aa0ab4 BJ |
111 | #if MH135A |
112 | c |= (c & 01) << 8; /* for dr11c bug */ | |
113 | #endif | |
a53c8506 BJ |
114 | ctaddr->ctbuf = c; |
115 | if (sc->sc_oq.c_cc==0 || sc->sc_oq.c_cc==CATLOWAT) | |
116 | wakeup(&sc->sc_oq); | |
99aa0ab4 | 117 | } else { |
a53c8506 BJ |
118 | if (sc->sc_openf==0) |
119 | ctaddr->ctcsr = 0; | |
99aa0ab4 BJ |
120 | } |
121 | } | |
122 | ||
123 | } | |
124 | #endif |