[unix-history] / usr / src / sys / vax / mba / ht.c

/*	ht.c	4.17	81/05/09	*/

#include "tu.h"
#if NHT > 0
/*
 * TM03/TU?? tape driver
 *
 * TODO:
 *	cleanup messages on errors
 *	test ioctl's
 *	see how many rewind interrups we get if we kick when not at BOT
 *	fixup rle error on block tape code
 */
#include "../h/param.h"
#include "../h/systm.h"
#include "../h/buf.h"
#include "../h/conf.h"
#include "../h/dir.h"
#include "../h/file.h"
#include "../h/user.h"
#include "../h/map.h"
#include "../h/pte.h"
#include "../h/mbareg.h"
#include "../h/mbavar.h"
#include "../h/mtio.h"
#include "../h/ioctl.h"
#include "../h/cmap.h"
#include "../h/cpu.h"

#include "../h/htreg.h"

struct	buf	rhtbuf[NHT];
struct	buf	chtbuf[NHT];

short	httypes[] =
	{ MBDT_TM03, MBDT_TE16, MBDT_TU45, MBDT_TU77, 0 };
struct	mba_device *htinfo[NHT];
int	htattach(), htslave(), htustart(), htndtint(), htdtint();
struct	mba_driver htdriver =
    { htattach, htslave, htustart, 0, htdtint, htndtint,
      httypes, "ht", "tu", htinfo };

#define MASKREG(r)	((r) & 0xffff)

/* bits in minor device */
#define	TUUNIT(dev)	(minor(dev)&03)
#define	H_NOREWIND	04
#define	H_1600BPI	08

#define HTUNIT(dev)	(tutoht[TUUNIT(dev)])

#define	INF	(daddr_t)1000000L	/* a block number that wont exist */

struct	tu_softc {
	char	sc_openf;
	char	sc_flags;
	daddr_t	sc_blkno;
	daddr_t	sc_nxrec;
	u_short	sc_erreg;
	u_short	sc_dsreg;
	short	sc_resid;
	short	sc_dens;
	struct	mba_device *sc_mi;
	int	sc_slave;
} tu_softc[NTU];
short	tutoht[NTU];

/*
 * Bits for sc_flags.
 */
#define	H_WRITTEN 1	/* last operation was a write */
#define H_ERASED  2	/* last write retry was an erase gap */
#define H_REWIND  4	/* last unit start was a rewind */

char	hter_bits[] = HTER_BITS;
char	htds_bits[] = HTDS_BITS;

/*ARGSUSED*/
htattach(mi)
	struct mba_device *mi;
{

}

htslave(mi, ms)
	struct mba_device *mi;
	struct mba_slave *ms;
{
	register struct tu_softc *sc = &tu_softc[ms->ms_unit];

	sc->sc_mi = mi;
	sc->sc_slave = ms->ms_slave;
	tutoht[ms->ms_unit] = mi->mi_unit;
}

htopen(dev, flag)
	dev_t dev;
	int flag;
{
	register int tuunit;
	register struct mba_device *mi;
	register struct tu_softc *sc;
	int olddens, dens;

	tuunit = TUUNIT(dev);
	if (tuunit >= NTU || (sc = &tu_softc[tuunit])->sc_openf ||
	    (mi = htinfo[HTUNIT(dev)]) == 0 || mi->mi_alive == 0) {
		u.u_error = ENXIO;
		return;
	}
	olddens = sc->sc_dens;
	dens = sc->sc_dens =
	    ((minor(dev)&H_1600BPI)?HTTC_1600BPI:HTTC_800BPI)|
		HTTC_PDP11|sc->sc_slave;
	htcommand(dev, HT_SENSE, 1);
	sc->sc_dens = olddens;
	if ((sc->sc_dsreg & HTDS_MOL) == 0) {
		uprintf("ht%d: not online\n", htunit);
		u.u_error = EIO;
		return;
	}
	if ((flag&FWRITE) && (sc->sc_dsreg&HTDS_WRL)) {
		uprintf("ht%d: no write ring\n", htunit);
		u.u_error = EIO;
		return;
	}
	if ((sc->sc_dsreg & HTDS_BOT) == 0 && (flag&FWRITE) &&
	    dens != sc->sc_dens) {
		uprintf("ht%d: can't change density in mid-tape\n", htunit);
		u.u_error = EIO;
		return;
	}
	sc->sc_openf = 1;
	sc->sc_blkno = (daddr_t)0;
	sc->sc_nxrec = INF;
	sc->sc_flags = 0;
	sc->sc_dens = dens;
}

htclose(dev, flag)
	register dev_t dev;
	register flag;
{
	register struct tu_softc *sc = &tu_softc[TUUNIT(dev)];

	if (flag == FWRITE || ((flag&FWRITE) && (sc->sc_flags&H_WRITTEN))) {
		htcommand(dev, HT_WEOF, 1);
		htcommand(dev, HT_WEOF, 1);
		htcommand(dev, HT_SREV, 1);
	}
	if ((minor(dev)&H_NOREWIND) == 0)
		htcommand(dev, HT_REW, 0);
	sc->sc_openf = 0;
}

htcommand(dev, com, count)
	dev_t dev;
	int com, count;
{
	register struct buf *bp;

	bp = &chtbuf[HTUNIT(dev)];
	(void) spl5();
	while (bp->b_flags&B_BUSY) {
		if(bp->b_repcnt == 0 && (bp->b_flags&B_DONE))
			break;
		bp->b_flags |= B_WANTED;
		sleep((caddr_t)bp, PRIBIO);
	}
	bp->b_flags = B_BUSY|B_READ;
	(void) spl0();
	bp->b_dev = dev;
	bp->b_command = com;
	bp->b_repcnt = count;
	bp->b_blkno = 0;
	htstrategy(bp);
	if (count == 0)
		return;
	iowait(bp);
	if (bp->b_flags&B_WANTED)
		wakeup((caddr_t)bp);
	bp->b_flags &= B_ERROR;
}

htstrategy(bp)
	register struct buf *bp;
{
	register struct mba_device *mi = htinfo[HTUNIT(bp->b_dev)];
	register struct buf *dp;

	bp->av_forw = NULL;
	dp = &mi->mi_tab;
	(void) spl5();
	if (dp->b_actf == NULL)
		dp->b_actf = bp;
	else
		dp->b_actl->av_forw = bp;
	dp->b_actl = bp;
	if (dp->b_active == 0)
		mbustart(mi);
	(void) spl0();
}

htustart(mi)
	register struct mba_device *mi;
{
	register struct htdevice *htaddr =
	    (struct htdevice *)mi->mi_drv;
	register struct buf *bp = mi->mi_tab.b_actf;
	register struct tu_softc *sc = &tu_softc[TUUNIT(bp->b_dev)];
	daddr_t blkno;

	htaddr->httc = sc->sc_dens;
	if (bp == &chtbuf[HTUNIT(bp->b_dev)] && bp->b_command == HT_SENSE) {
		htaddr->htcs1 = HT_SENSE|HT_GO;
		mbclrattn(mi);
	}
	sc->sc_dsreg = htaddr->htds;
	sc->sc_erreg = htaddr->hter;
	sc->sc_resid = htaddr->htfc;
	sc->sc_flags &= ~(H_WRITTEN|H_REWIND);
	if ((htaddr->htdt & HTDT_SPR) == 0 || (htaddr->htds & HTDS_MOL) == 0)
		if (sc->sc_openf > 0)
			sc->sc_openf = -1;
	if (sc->sc_openf < 0) {
		bp->b_flags |= B_ERROR;
		return (MBU_NEXT);
	}
	if (bp != &chtbuf[HTUNIT(bp->b_dev)]) {
		if (dbtofsb(bp->b_blkno) > sc->sc_nxrec) {
			bp->b_flags |= B_ERROR;
			bp->b_error = ENXIO;
			return (MBU_NEXT);
		}
		if (dbtofsb(bp->b_blkno) == sc->sc_nxrec &&
		    bp->b_flags&B_READ) {
			bp->b_resid = bp->b_bcount;
			clrbuf(bp);
			return (MBU_NEXT);
		}
		if ((bp->b_flags&B_READ)==0)
			sc->sc_nxrec = dbtofsb(bp->b_blkno) + 1;
	} else {
		if (bp->b_command == HT_SENSE)
			return (MBU_NEXT);
		if (bp->b_command == HT_REW)
			sc->sc_flags |= H_REWIND;
		else
			htaddr->htfc = -bp->b_bcount;
		htaddr->htcs1 = bp->b_command|HT_GO;
		return (MBU_STARTED);
	}
	if ((blkno = sc->sc_blkno) == dbtofsb(bp->b_blkno)) {
		htaddr->htfc = -bp->b_bcount;
		if ((bp->b_flags&B_READ) == 0) {
			if (mi->mi_tab.b_errcnt) {
				if ((sc->sc_flags & H_ERASED) == 0) {
					sc->sc_flags |= H_ERASED;
					htaddr->htcs1 = HT_ERASE | HT_GO;
					return (MBU_STARTED);
				}
				sc->sc_flags &= ~H_ERASED;
			}
			if (htaddr->htds & HTDS_EOT) {
				bp->b_resid = bp->b_bcount;
				return (MBU_NEXT);
			}
		}
		return (MBU_DODATA);
	}
	if (blkno < dbtofsb(bp->b_blkno)) {
		htaddr->htfc = blkno - dbtofsb(bp->b_blkno);
		htaddr->htcs1 = HT_SFORW|HT_GO;
	} else {
		htaddr->htfc = dbtofsb(bp->b_blkno) - blkno;
		htaddr->htcs1 = HT_SREV|HT_GO;
	}
	return (MBU_STARTED);
}

htdtint(mi, mbsr)
	register struct mba_device *mi;
	int mbsr;
{
	register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv;
	register struct buf *bp = mi->mi_tab.b_actf;
	register struct tu_softc *sc;
	int ds, er, mbs;

	sc = &tu_softc[TUUNIT(bp->b_dev)];
	ds = sc->sc_dsreg = MASKREG(htaddr->htds);
	er = sc->sc_erreg = MASKREG(htaddr->hter);
	sc->sc_resid = MASKREG(htaddr->htfc);
	mbs = mbsr;
	sc->sc_blkno++;
	if((bp->b_flags & B_READ) == 0)
		sc->sc_flags |= H_WRITTEN;
	if ((ds&(HTDS_ERR|HTDS_MOL)) != HTDS_MOL || mbs & MBSR_EBITS) {
		htaddr->htcs1 = HT_DCLR|HT_GO;
		mbclrattn(mi);
		if (bp == &rhtbuf[HTUNIT(bp->b_dev)]) {
			er &= ~HTER_FCE;
			mbs &= ~(MBSR_DTABT|MBSR_MBEXC);
		} else
		if (bp->b_flags & B_READ && ds & HTDS_PES)
			er &= ~(HTER_CSITM|HTER_CORCRC);
		if (er&HTER_HARD || mbs&MBSR_EBITS || (ds&HTDS_MOL) == 0 ||
		    er && ++mi->mi_tab.b_errcnt >= 7) {
			if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0)
				sc->sc_openf = -1;
			if ((er&HTER_HARD) == HTER_FCE &&
			    (mbs&MBSR_EBITS) == (MBSR_DTABT|MBSR_MBEXC) &&
			    (ds&HTDS_MOL))
				goto noprint;
			printf("tu%d: hard error bn%d mbsr=%b er=%b ds=%b\n",
			    TUUNIT(bp->b_dev), bp->b_blkno,
			    mbsr, mbsr_bits,
			    sc->sc_erreg, hter_bits,
			    sc->sc_dsreg, htds_bits);
noprint:
			bp->b_flags |= B_ERROR;
			return (MBD_DONE);
		}
		if (er)
			return (MBD_RETRY);
	}
	bp->b_resid = 0;
	if (bp->b_flags & B_READ)
		if (ds&HTDS_TM) {		/* must be a read, right? */
			bp->b_resid = bp->b_bcount;
			sc->sc_nxrec = dbtofsb(bp->b_blkno);
		} else if(bp->b_bcount > MASKREG(htaddr->htfc))
			bp->b_resid = bp->b_bcount - MASKREG(htaddr->htfc);
	return (MBD_DONE);
}

htndtint(mi)
	register struct mba_device *mi;
{
	register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv;
	register struct buf *bp = mi->mi_tab.b_actf;
	register struct tu_softc *sc;
	int er, ds, fc;

	ds = MASKREG(htaddr->htds);
	er = MASKREG(htaddr->hter);
	fc = MASKREG(htaddr->htfc);
	if (er) {
		htaddr->htcs1 = HT_DCLR|HT_GO;
		mbclrattn(mi);
	}
	if (bp == 0)
		return (MBN_SKIP);
	sc = &tu_softc[TUUNIT(bp->b_dev)];
	sc->sc_dsreg = ds;
	sc->sc_erreg = er;
	sc->sc_resid = fc;
	if (bp == &chtbuf[HTUNIT(bp->b_dev)]) {
		switch (bp->b_command) {
		case HT_REWOFFL:
			/* offline is on purpose; don't do anything special */
			ds |= HTDS_MOL;	
			break;
		case HT_SREV:
			/* if backspace file hit bot, its not an error */
		        if (er == (HTER_NEF|HTER_FCE) && ds&HTDS_BOT &&
			    bp->b_repcnt == INF)
				er &= ~HTER_NEF;
			break;
		}
		er &= ~HTER_FCE;
		if (er == 0)
			ds &= ~HTDS_ERR;
	}
	if ((ds & (HTDS_ERR|HTDS_MOL)) != HTDS_MOL) {
		if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0)
			sc->sc_openf = -1;
		printf("tu%d: hard error bn%d er=%b ds=%b\n",
		    TUUNIT(bp->b_dev), bp->b_blkno,
		    sc->sc_erreg, hter_bits, sc->sc_dsreg, htds_bits);
		bp->b_flags |= B_ERROR;
		return (MBN_DONE);
	}
	if (bp == &chtbuf[HTUNIT(bp->b_dev)]) {
		if (sc->sc_flags & H_REWIND)
			return (ds & HTDS_BOT ? MBN_DONE : MBN_RETRY);
		bp->b_resid = -sc->sc_resid;
		return (MBN_DONE);
	}
	if (ds & HTDS_TM)
		if (sc->sc_blkno > dbtofsb(bp->b_blkno)) {
			sc->sc_nxrec = dbtofsb(bp->b_blkno) - fc;
			sc->sc_blkno = sc->sc_nxrec;
		} else {
			sc->sc_blkno = dbtofsb(bp->b_blkno) + fc;
			sc->sc_nxrec = sc->sc_blkno - 1;
		}
	else
		sc->sc_blkno = dbtofsb(bp->b_blkno);
	return (MBN_RETRY);
}

htread(dev)
	dev_t dev;
{

	htphys(dev);
	if (u.u_error)
		return;
	physio(htstrategy, &rhtbuf[HTUNIT(dev)], dev, B_READ, minphys);
}

htwrite(dev)
{

	htphys(dev);
	if (u.u_error)
		return;
	physio(htstrategy, &rhtbuf[HTUNIT(dev)], dev, B_WRITE, minphys);
}

htphys(dev)
	dev_t dev;
{
	register int htunit;
	register struct tu_softc *sc;
	register struct mba_device *mi;
	daddr_t a;

	htunit = HTUNIT(dev);
	if (htunit >= NHT || (mi = htinfo[htunit]) == 0 || mi->mi_alive == 0) {
		u.u_error = ENXIO;
		return;
	}
	a = u.u_offset >> 9;
	sc = &tu_softc[TUUNIT(dev)];
	sc->sc_blkno = dbtofsb(a);
	sc->sc_nxrec = dbtofsb(a)+1;
}

/*ARGSUSED*/
htioctl(dev, cmd, addr, flag)
	dev_t dev;
	int cmd;
	caddr_t addr;
	int flag;
{
	register struct tu_softc *sc = &tu_softc[TUUNIT(dev)];
	register struct buf *bp = &chtbuf[HTUNIT(dev)];
	register callcount;
	int fcount;
	struct mtop mtop;
	struct mtget mtget;
	/* we depend of the values and order of the MT codes here */
	static htops[] =
   {HT_WEOF,HT_SFORW,HT_SREV,HT_SFORW,HT_SREV,HT_REW,HT_REWOFFL,HT_SENSE};

	switch (cmd) {
		case MTIOCTOP:	/* tape operation */
		if (copyin((caddr_t)addr, (caddr_t)&mtop, sizeof(mtop))) {
			u.u_error = EFAULT;
			return;
		}
		switch(mtop.mt_op) {
		case MTWEOF:
			callcount = mtop.mt_count;
			fcount = 1;
			break;
		case MTFSF: case MTBSF:
			callcount = mtop.mt_count;
			fcount = INF;
			break;
		case MTFSR: case MTBSR:
			callcount = 1;
			fcount = mtop.mt_count;
			break;
		case MTREW: case MTOFFL:
			callcount = 1;
			fcount = 1;
			break;
		default:
			u.u_error = ENXIO;
			return;
		}
		if (callcount <= 0 || fcount <= 0) {
			u.u_error = ENXIO;
			return;
		}
		while (--callcount >= 0) {
			htcommand(dev, htops[mtop.mt_op], fcount);
			if ((mtop.mt_op == MTFSR || mtop.mt_op == MTBSR) &&
			    bp->b_resid) {
				u.u_error = EIO;
				break;
			}
			if ((bp->b_flags&B_ERROR) || sc->sc_dsreg&HTDS_BOT)
				break;
		}
		geterror(bp);
		return;
	case MTIOCGET:
		mtget.mt_dsreg = sc->sc_dsreg;
		mtget.mt_erreg = sc->sc_erreg;
		mtget.mt_resid = sc->sc_resid;
		mtget.mt_type = MT_ISHT;
		if (copyout((caddr_t)&mtget, addr, sizeof(mtget)))
			u.u_error = EFAULT;
		return;
	default:
		u.u_error = ENXIO;
	}
}

#define	DBSIZE	20

htdump()
{
	register struct mba_device *mi;
	register struct mba_regs *mp;
	register struct htdevice *htaddr;
	int blk, num;
	int start;

	start = 0;
	num = maxfree;
#define	phys(a,b)		((b)((int)(a)&0x7fffffff))
	if (htinfo[0] == 0)
		return (ENXIO);
	mi = phys(htinfo[0], struct mba_device *);
	mp = phys(mi->mi_hd, struct mba_hd *)->mh_physmba;
	mp->mba_cr = MBCR_IE;
	htaddr = (struct htdevice *)&mp->mba_drv[mi->mi_drive];
	htaddr->httc = HTTC_PDP11|HTTC_1600BPI;
	htaddr->htcs1 = HT_DCLR|HT_GO;
	while (num > 0) {
		blk = num > DBSIZE ? DBSIZE : num;
		htdwrite(start, blk, htaddr, mp);
		start += blk;
		num -= blk;
	}
	hteof(htaddr);
	hteof(htaddr);
	htwait(htaddr);
	if (htaddr->htds&HTDS_ERR)
		return (EIO);
	htaddr->htcs1 = HT_REW|HT_GO;
	return (0);
}

htdwrite(dbuf, num, htaddr, mp)
	register dbuf, num;
	register struct htdevice *htaddr;
	struct mba_regs *mp;
{
	register struct pte *io;
	register int i;

	htwait(htaddr);
	io = mp->mba_map;
	for (i = 0; i < num; i++)
		*(int *)io++ = dbuf++ | PG_V;
	htaddr->htfc = -(num*NBPG);
	mp->mba_sr = -1;
	mp->mba_bcr = -(num*NBPG);
	mp->mba_var = 0;
	htaddr->htcs1 = HT_WCOM|HT_GO;
}

htwait(htaddr)
	struct htdevice *htaddr;
{
	register s;

	do
		s = htaddr->htds;
	while ((s & HTDS_DRY) == 0);
}

hteof(htaddr)
	struct htdevice *htaddr;
{

	htwait(htaddr);
	htaddr->htcs1 = HT_WEOF|HT_GO;
}
#endif
Commit	Line	Data
61add2a3	1	/* ht.c 4.17 81/05/09 */
0deaf016	2
89bd2f01	3	#include "tu.h"
a5cc519e	4	#if NHT > 0
786dff00	5	/*
fcc37d29	6	* TM03/TU?? tape driver
d565635a BJ	7	*
d565635a BJ	8	* TODO:
3ee331b1	9	* cleanup messages on errors
d565635a BJ	10	* test ioctl's
d565635a BJ	11	* see how many rewind interrups we get if we kick when not at BOT
3ee331b1	12	* fixup rle error on block tape code
786dff00	13	*/
786dff00 BJ	14	#include "../h/param.h"
	15	#include "../h/systm.h"
	16	#include "../h/buf.h"
	17	#include "../h/conf.h"
	18	#include "../h/dir.h"
	19	#include "../h/file.h"
	20	#include "../h/user.h"
	21	#include "../h/map.h"
80e7c811	22	#include "../h/pte.h"
89bd2f01 BJ	23	#include "../h/mbareg.h"
89bd2f01 BJ	24	#include "../h/mbavar.h"
fcc37d29 BJ	25	#include "../h/mtio.h"
fcc37d29 BJ	26	#include "../h/ioctl.h"
f0a3ddbd	27	#include "../h/cmap.h"
0deaf016	28	#include "../h/cpu.h"
786dff00	29
fcc37d29 BJ	30	#include "../h/htreg.h"
	31
	32	struct buf rhtbuf[NHT];
	33	struct buf chtbuf[NHT];
	34
	35	short httypes[] =
fc4d0a69	36	{ MBDT_TM03, MBDT_TE16, MBDT_TU45, MBDT_TU77, 0 };
89bd2f01	37	struct mba_device *htinfo[NHT];
a0eab615	38	int htattach(), htslave(), htustart(), htndtint(), htdtint();
fcc37d29	39	struct mba_driver htdriver =
89bd2f01 BJ	40	{ htattach, htslave, htustart, 0, htdtint, htndtint,
89bd2f01 BJ	41	httypes, "ht", "tu", htinfo };
fcc37d29 BJ	42
	43	#define MASKREG(r) ((r) & 0xffff)
	44
	45	/* bits in minor device */
89bd2f01	46	#define TUUNIT(dev) (minor(dev)&03)
fcc37d29 BJ	47	#define H_NOREWIND 04
fcc37d29 BJ	48	#define H_1600BPI 08
786dff00	49
d565635a	50	#define HTUNIT(dev) (tutoht[TUUNIT(dev)])
89bd2f01	51
fcc37d29 BJ	52	#define INF (daddr_t)1000000L /* a block number that wont exist */
fcc37d29 BJ	53
d565635a	54	struct tu_softc {
fcc37d29 BJ	55	char sc_openf;
	56	char sc_flags;
	57	daddr_t sc_blkno;
	58	daddr_t sc_nxrec;
	59	u_short sc_erreg;
	60	u_short sc_dsreg;
	61	short sc_resid;
	62	short sc_dens;
89bd2f01 BJ	63	struct mba_device *sc_mi;
89bd2f01 BJ	64	int sc_slave;
d565635a BJ	65	} tu_softc[NTU];
d565635a BJ	66	short tutoht[NTU];
fcc37d29	67
fcc37d29 BJ	68	/*
	69	* Bits for sc_flags.
	70	*/
	71	#define H_WRITTEN 1 /* last operation was a write */
	72	#define H_ERASED 2 /* last write retry was an erase gap */
	73	#define H_REWIND 4 /* last unit start was a rewind */
786dff00	74
3ee331b1 BJ	75	char hter_bits[] = HTER_BITS;
	76	char htds_bits[] = HTDS_BITS;
	77
fcc37d29	78	/ARGSUSED/
89bd2f01 BJ	79	htattach(mi)
	80	struct mba_device *mi;
	81	{
	82
	83	}
	84
	85	htslave(mi, ms)
	86	struct mba_device *mi;
	87	struct mba_slave *ms;
fcc37d29	88	{
d565635a	89	register struct tu_softc *sc = &tu_softc[ms->ms_unit];
fcc37d29	90
89bd2f01 BJ	91	sc->sc_mi = mi;
89bd2f01 BJ	92	sc->sc_slave = ms->ms_slave;
d565635a	93	tutoht[ms->ms_unit] = mi->mi_unit;
fcc37d29	94	}
786dff00 BJ	95
786dff00 BJ	96	htopen(dev, flag)
fcc37d29 BJ	97	dev_t dev;
fcc37d29 BJ	98	int flag;
786dff00	99	{
d565635a	100	register int tuunit;
89bd2f01	101	register struct mba_device *mi;
d565635a	102	register struct tu_softc *sc;
cd470e1d	103	int olddens, dens;
786dff00	104
d565635a BJ	105	tuunit = TUUNIT(dev);
d565635a BJ	106	if (tuunit >= NTU \|\| (sc = &tu_softc[tuunit])->sc_openf \|\|
89bd2f01	107	(mi = htinfo[HTUNIT(dev)]) == 0 \|\| mi->mi_alive == 0) {
786dff00 BJ	108	u.u_error = ENXIO;
	109	return;
	110	}
cd470e1d	111	olddens = sc->sc_dens;
3ee331b1	112	dens = sc->sc_dens =
d565635a BJ	113	((minor(dev)&H_1600BPI)?HTTC_1600BPI:HTTC_800BPI)\|
d565635a BJ	114	HTTC_PDP11\|sc->sc_slave;
cd470e1d BJ	115	htcommand(dev, HT_SENSE, 1);
cd470e1d BJ	116	sc->sc_dens = olddens;
61add2a3 BJ	117	if ((sc->sc_dsreg & HTDS_MOL) == 0) {
	118	uprintf("ht%d: not online\n", htunit);
	119	u.u_error = EIO;
	120	return;
	121	}
	122	if ((flag&FWRITE) && (sc->sc_dsreg&HTDS_WRL)) {
	123	uprintf("ht%d: no write ring\n", htunit);
	124	u.u_error = EIO;
	125	return;
	126	}
	127	if ((sc->sc_dsreg & HTDS_BOT) == 0 && (flag&FWRITE) &&
	128	dens != sc->sc_dens) {
	129	uprintf("ht%d: can't change density in mid-tape\n", htunit);
fcc37d29 BJ	130	u.u_error = EIO;
	131	return;
	132	}
fcc37d29 BJ	133	sc->sc_openf = 1;
	134	sc->sc_blkno = (daddr_t)0;
	135	sc->sc_nxrec = INF;
	136	sc->sc_flags = 0;
d565635a	137	sc->sc_dens = dens;
786dff00 BJ	138	}
	139
	140	htclose(dev, flag)
fcc37d29 BJ	141	register dev_t dev;
fcc37d29 BJ	142	register flag;
786dff00	143	{
d565635a	144	register struct tu_softc *sc = &tu_softc[TUUNIT(dev)];
786dff00	145
fcc37d29 BJ	146	if (flag == FWRITE \|\| ((flag&FWRITE) && (sc->sc_flags&H_WRITTEN))) {
	147	htcommand(dev, HT_WEOF, 1);
	148	htcommand(dev, HT_WEOF, 1);
	149	htcommand(dev, HT_SREV, 1);
786dff00	150	}
fcc37d29	151	if ((minor(dev)&H_NOREWIND) == 0)
fcc37d29 BJ	152	htcommand(dev, HT_REW, 0);
fcc37d29 BJ	153	sc->sc_openf = 0;
786dff00 BJ	154	}
786dff00 BJ	155
fcc37d29 BJ	156	htcommand(dev, com, count)
	157	dev_t dev;
	158	int com, count;
786dff00 BJ	159	{
	160	register struct buf *bp;
	161
fcc37d29	162	bp = &chtbuf[HTUNIT(dev)];
81263dba	163	(void) spl5();
fcc37d29	164	while (bp->b_flags&B_BUSY) {
9f1dae18	165	if(bp->b_repcnt == 0 && (bp->b_flags&B_DONE))
89bd2f01	166	break;
786dff00 BJ	167	bp->b_flags \|= B_WANTED;
	168	sleep((caddr_t)bp, PRIBIO);
	169	}
dc637456	170	bp->b_flags = B_BUSY\|B_READ;
81263dba	171	(void) spl0();
786dff00	172	bp->b_dev = dev;
fcc37d29 BJ	173	bp->b_command = com;
fcc37d29 BJ	174	bp->b_repcnt = count;
786dff00	175	bp->b_blkno = 0;
786dff00	176	htstrategy(bp);
fcc37d29 BJ	177	if (count == 0)
fcc37d29 BJ	178	return;
786dff00	179	iowait(bp);
fcc37d29	180	if (bp->b_flags&B_WANTED)
786dff00	181	wakeup((caddr_t)bp);
fcc37d29	182	bp->b_flags &= B_ERROR;
786dff00 BJ	183	}
	184
	185	htstrategy(bp)
fcc37d29	186	register struct buf *bp;
786dff00	187	{
d565635a	188	register struct mba_device *mi = htinfo[HTUNIT(bp->b_dev)];
fcc37d29	189	register struct buf *dp;
786dff00	190
786dff00	191	bp->av_forw = NULL;
fcc37d29	192	dp = &mi->mi_tab;
81263dba	193	(void) spl5();
fcc37d29 BJ	194	if (dp->b_actf == NULL)
fcc37d29 BJ	195	dp->b_actf = bp;
786dff00	196	else
fcc37d29 BJ	197	dp->b_actl->av_forw = bp;
	198	dp->b_actl = bp;
	199	if (dp->b_active == 0)
	200	mbustart(mi);
81263dba	201	(void) spl0();
786dff00 BJ	202	}
786dff00 BJ	203
fcc37d29	204	htustart(mi)
89bd2f01	205	register struct mba_device *mi;
786dff00	206	{
fcc37d29 BJ	207	register struct htdevice *htaddr =
	208	(struct htdevice *)mi->mi_drv;
	209	register struct buf *bp = mi->mi_tab.b_actf;
d565635a	210	register struct tu_softc *sc = &tu_softc[TUUNIT(bp->b_dev)];
786dff00 BJ	211	daddr_t blkno;
786dff00 BJ	212
fcc37d29	213	htaddr->httc = sc->sc_dens;
fc4d0a69	214	if (bp == &chtbuf[HTUNIT(bp->b_dev)] && bp->b_command == HT_SENSE) {
9f1dae18 BJ	215	htaddr->htcs1 = HT_SENSE\|HT_GO;
	216	mbclrattn(mi);
	217	}
fcc37d29 BJ	218	sc->sc_dsreg = htaddr->htds;
	219	sc->sc_erreg = htaddr->hter;
	220	sc->sc_resid = htaddr->htfc;
	221	sc->sc_flags &= ~(H_WRITTEN\|H_REWIND);
	222	if ((htaddr->htdt & HTDT_SPR) == 0 \|\| (htaddr->htds & HTDS_MOL) == 0)
	223	if (sc->sc_openf > 0)
	224	sc->sc_openf = -1;
	225	if (sc->sc_openf < 0) {
	226	bp->b_flags \|= B_ERROR;
	227	return (MBU_NEXT);
	228	}
d565635a	229	if (bp != &chtbuf[HTUNIT(bp->b_dev)]) {
fcc37d29 BJ	230	if (dbtofsb(bp->b_blkno) > sc->sc_nxrec) {
	231	bp->b_flags \|= B_ERROR;
	232	bp->b_error = ENXIO;
0deaf016	233	return (MBU_NEXT);
d565635a BJ	234	}
d565635a BJ	235	if (dbtofsb(bp->b_blkno) == sc->sc_nxrec &&
fcc37d29 BJ	236	bp->b_flags&B_READ) {
	237	bp->b_resid = bp->b_bcount;
	238	clrbuf(bp);
0deaf016	239	return (MBU_NEXT);
d565635a BJ	240	}
d565635a BJ	241	if ((bp->b_flags&B_READ)==0)
fcc37d29 BJ	242	sc->sc_nxrec = dbtofsb(bp->b_blkno) + 1;
fcc37d29 BJ	243	} else {
0deaf016	244	if (bp->b_command == HT_SENSE)
fcc37d29 BJ	245	return (MBU_NEXT);
	246	if (bp->b_command == HT_REW)
	247	sc->sc_flags \|= H_REWIND;
	248	else
	249	htaddr->htfc = -bp->b_bcount;
	250	htaddr->htcs1 = bp->b_command\|HT_GO;
	251	return (MBU_STARTED);
	252	}
	253	if ((blkno = sc->sc_blkno) == dbtofsb(bp->b_blkno)) {
	254	htaddr->htfc = -bp->b_bcount;
	255	if ((bp->b_flags&B_READ) == 0) {
d565635a BJ	256	if (mi->mi_tab.b_errcnt) {
d565635a BJ	257	if ((sc->sc_flags & H_ERASED) == 0) {
fcc37d29 BJ	258	sc->sc_flags \|= H_ERASED;
	259	htaddr->htcs1 = HT_ERASE \| HT_GO;
	260	return (MBU_STARTED);
	261	}
d565635a BJ	262	sc->sc_flags &= ~H_ERASED;
d565635a BJ	263	}
fcc37d29 BJ	264	if (htaddr->htds & HTDS_EOT) {
	265	bp->b_resid = bp->b_bcount;
	266	return (MBU_NEXT);
	267	}
786dff00	268	}
fcc37d29	269	return (MBU_DODATA);
786dff00	270	}
fcc37d29 BJ	271	if (blkno < dbtofsb(bp->b_blkno)) {
	272	htaddr->htfc = blkno - dbtofsb(bp->b_blkno);
	273	htaddr->htcs1 = HT_SFORW\|HT_GO;
786dff00	274	} else {
fcc37d29 BJ	275	htaddr->htfc = dbtofsb(bp->b_blkno) - blkno;
fcc37d29 BJ	276	htaddr->htcs1 = HT_SREV\|HT_GO;
786dff00	277	}
fcc37d29	278	return (MBU_STARTED);
786dff00 BJ	279	}
786dff00 BJ	280
d565635a	281	htdtint(mi, mbsr)
89bd2f01	282	register struct mba_device *mi;
d565635a	283	int mbsr;
786dff00	284	{
fcc37d29 BJ	285	register struct htdevice htaddr = (struct htdevice )mi->mi_drv;
fcc37d29 BJ	286	register struct buf *bp = mi->mi_tab.b_actf;
d565635a	287	register struct tu_softc *sc;
0deaf016	288	int ds, er, mbs;
786dff00	289
d565635a	290	sc = &tu_softc[TUUNIT(bp->b_dev)];
fcc37d29 BJ	291	ds = sc->sc_dsreg = MASKREG(htaddr->htds);
	292	er = sc->sc_erreg = MASKREG(htaddr->hter);
	293	sc->sc_resid = MASKREG(htaddr->htfc);
d565635a	294	mbs = mbsr;
fcc37d29 BJ	295	sc->sc_blkno++;
	296	if((bp->b_flags & B_READ) == 0)
	297	sc->sc_flags \|= H_WRITTEN;
d565635a	298	if ((ds&(HTDS_ERR\|HTDS_MOL)) != HTDS_MOL \|\| mbs & MBSR_EBITS) {
fcc37d29	299	htaddr->htcs1 = HT_DCLR\|HT_GO;
0deaf016 BJ	300	mbclrattn(mi);
0deaf016 BJ	301	if (bp == &rhtbuf[HTUNIT(bp->b_dev)]) {
fcc37d29	302	er &= ~HTER_FCE;
d565635a	303	mbs &= ~(MBSR_DTABT\|MBSR_MBEXC);
9f1dae18	304	} else
fcc37d29 BJ	305	if (bp->b_flags & B_READ && ds & HTDS_PES)
fcc37d29 BJ	306	er &= ~(HTER_CSITM\|HTER_CORCRC);
d565635a	307	if (er&HTER_HARD \|\| mbs&MBSR_EBITS \|\| (ds&HTDS_MOL) == 0 \|\|
0deaf016	308	er && ++mi->mi_tab.b_errcnt >= 7) {
fcc37d29 BJ	309	if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0)
fcc37d29 BJ	310	sc->sc_openf = -1;
9f1dae18 BJ	311	if ((er&HTER_HARD) == HTER_FCE &&
	312	(mbs&MBSR_EBITS) == (MBSR_DTABT\|MBSR_MBEXC) &&
	313	(ds&HTDS_MOL))
	314	goto noprint;
3ee331b1	315	printf("tu%d: hard error bn%d mbsr=%b er=%b ds=%b\n",
89bd2f01	316	TUUNIT(bp->b_dev), bp->b_blkno,
d565635a	317	mbsr, mbsr_bits,
3ee331b1 BJ	318	sc->sc_erreg, hter_bits,
3ee331b1 BJ	319	sc->sc_dsreg, htds_bits);
9f1dae18	320	noprint:
786dff00	321	bp->b_flags \|= B_ERROR;
fcc37d29	322	return (MBD_DONE);
786dff00	323	}
fcc37d29 BJ	324	if (er)
fcc37d29 BJ	325	return (MBD_RETRY);
786dff00	326	}
fcc37d29 BJ	327	bp->b_resid = 0;
	328	if (bp->b_flags & B_READ)
	329	if (ds&HTDS_TM) { /* must be a read, right? */
	330	bp->b_resid = bp->b_bcount;
	331	sc->sc_nxrec = dbtofsb(bp->b_blkno);
	332	} else if(bp->b_bcount > MASKREG(htaddr->htfc))
	333	bp->b_resid = bp->b_bcount - MASKREG(htaddr->htfc);
	334	return (MBD_DONE);
	335	}
786dff00	336
fcc37d29	337	htndtint(mi)
89bd2f01	338	register struct mba_device *mi;
fcc37d29 BJ	339	{
	340	register struct htdevice htaddr = (struct htdevice )mi->mi_drv;
	341	register struct buf *bp = mi->mi_tab.b_actf;
d565635a	342	register struct tu_softc *sc;
fcc37d29	343	int er, ds, fc;
786dff00	344
d565635a BJ	345	ds = MASKREG(htaddr->htds);
	346	er = MASKREG(htaddr->hter);
	347	fc = MASKREG(htaddr->htfc);
	348	if (er) {
fcc37d29	349	htaddr->htcs1 = HT_DCLR\|HT_GO;
0deaf016 BJ	350	mbclrattn(mi);
0deaf016 BJ	351	}
d565635a BJ	352	if (bp == 0)
	353	return (MBN_SKIP);
	354	sc = &tu_softc[TUUNIT(bp->b_dev)];
	355	sc->sc_dsreg = ds;
	356	sc->sc_erreg = er;
	357	sc->sc_resid = fc;
	358	if (bp == &chtbuf[HTUNIT(bp->b_dev)]) {
	359	switch (bp->b_command) {
	360	case HT_REWOFFL:
fcc37d29 BJ	361	/* offline is on purpose; don't do anything special */
fcc37d29 BJ	362	ds \|= HTDS_MOL;
d565635a BJ	363	break;
	364	case HT_SREV:
	365	/* if backspace file hit bot, its not an error */
	366	if (er == (HTER_NEF\|HTER_FCE) && ds&HTDS_BOT &&
	367	bp->b_repcnt == INF)
	368	er &= ~HTER_NEF;
	369	break;
	370	}
fcc37d29 BJ	371	er &= ~HTER_FCE;
	372	if (er == 0)
	373	ds &= ~HTDS_ERR;
	374	}
	375	if ((ds & (HTDS_ERR\|HTDS_MOL)) != HTDS_MOL) {
	376	if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0)
	377	sc->sc_openf = -1;
3ee331b1	378	printf("tu%d: hard error bn%d er=%b ds=%b\n",
89bd2f01	379	TUUNIT(bp->b_dev), bp->b_blkno,
3ee331b1	380	sc->sc_erreg, hter_bits, sc->sc_dsreg, htds_bits);
fcc37d29 BJ	381	bp->b_flags \|= B_ERROR;
fcc37d29 BJ	382	return (MBN_DONE);
786dff00	383	}
d565635a	384	if (bp == &chtbuf[HTUNIT(bp->b_dev)]) {
fcc37d29 BJ	385	if (sc->sc_flags & H_REWIND)
	386	return (ds & HTDS_BOT ? MBN_DONE : MBN_RETRY);
	387	bp->b_resid = -sc->sc_resid;
	388	return (MBN_DONE);
	389	}
	390	if (ds & HTDS_TM)
d565635a	391	if (sc->sc_blkno > dbtofsb(bp->b_blkno)) {
fcc37d29 BJ	392	sc->sc_nxrec = dbtofsb(bp->b_blkno) - fc;
fcc37d29 BJ	393	sc->sc_blkno = sc->sc_nxrec;
d565635a	394	} else {
fcc37d29 BJ	395	sc->sc_blkno = dbtofsb(bp->b_blkno) + fc;
	396	sc->sc_nxrec = sc->sc_blkno - 1;
	397	}
	398	else
	399	sc->sc_blkno = dbtofsb(bp->b_blkno);
	400	return (MBN_RETRY);
786dff00 BJ	401	}
	402
	403	htread(dev)
fcc37d29	404	dev_t dev;
786dff00	405	{
fcc37d29	406
786dff00	407	htphys(dev);
fcc37d29 BJ	408	if (u.u_error)
	409	return;
	410	physio(htstrategy, &rhtbuf[HTUNIT(dev)], dev, B_READ, minphys);
786dff00 BJ	411	}
	412
	413	htwrite(dev)
	414	{
fcc37d29	415
786dff00	416	htphys(dev);
fcc37d29 BJ	417	if (u.u_error)
	418	return;
	419	physio(htstrategy, &rhtbuf[HTUNIT(dev)], dev, B_WRITE, minphys);
786dff00 BJ	420	}
	421
	422	htphys(dev)
fcc37d29	423	dev_t dev;
786dff00	424	{
d565635a BJ	425	register int htunit;
	426	register struct tu_softc *sc;
	427	register struct mba_device *mi;
786dff00 BJ	428	daddr_t a;
786dff00 BJ	429
d565635a BJ	430	htunit = HTUNIT(dev);
d565635a BJ	431	if (htunit >= NHT \|\| (mi = htinfo[htunit]) == 0 \|\| mi->mi_alive == 0) {
fcc37d29 BJ	432	u.u_error = ENXIO;
fcc37d29 BJ	433	return;
786dff00	434	}
fcc37d29	435	a = u.u_offset >> 9;
d565635a	436	sc = &tu_softc[TUUNIT(dev)];
fcc37d29 BJ	437	sc->sc_blkno = dbtofsb(a);
fcc37d29 BJ	438	sc->sc_nxrec = dbtofsb(a)+1;
786dff00	439	}
f0a3ddbd	440
fcc37d29 BJ	441	/ARGSUSED/
	442	htioctl(dev, cmd, addr, flag)
	443	dev_t dev;
	444	int cmd;
	445	caddr_t addr;
	446	int flag;
	447	{
d565635a BJ	448	register struct tu_softc *sc = &tu_softc[TUUNIT(dev)];
d565635a BJ	449	register struct buf *bp = &chtbuf[HTUNIT(dev)];
fcc37d29 BJ	450	register callcount;
	451	int fcount;
	452	struct mtop mtop;
	453	struct mtget mtget;
	454	/* we depend of the values and order of the MT codes here */
	455	static htops[] =
	456	{HT_WEOF,HT_SFORW,HT_SREV,HT_SFORW,HT_SREV,HT_REW,HT_REWOFFL,HT_SENSE};
	457
	458	switch (cmd) {
	459	case MTIOCTOP: /* tape operation */
	460	if (copyin((caddr_t)addr, (caddr_t)&mtop, sizeof(mtop))) {
	461	u.u_error = EFAULT;
	462	return;
	463	}
	464	switch(mtop.mt_op) {
	465	case MTWEOF:
	466	callcount = mtop.mt_count;
	467	fcount = 1;
	468	break;
	469	case MTFSF: case MTBSF:
	470	callcount = mtop.mt_count;
	471	fcount = INF;
	472	break;
	473	case MTFSR: case MTBSR:
	474	callcount = 1;
	475	fcount = mtop.mt_count;
	476	break;
	477	case MTREW: case MTOFFL:
	478	callcount = 1;
	479	fcount = 1;
	480	break;
	481	default:
	482	u.u_error = ENXIO;
	483	return;
	484	}
	485	if (callcount <= 0 \|\| fcount <= 0) {
	486	u.u_error = ENXIO;
	487	return;
	488	}
	489	while (--callcount >= 0) {
	490	htcommand(dev, htops[mtop.mt_op], fcount);
	491	if ((mtop.mt_op == MTFSR \|\| mtop.mt_op == MTBSR) &&
	492	bp->b_resid) {
	493	u.u_error = EIO;
	494	break;
	495	}
d565635a	496	if ((bp->b_flags&B_ERROR) \|\| sc->sc_dsreg&HTDS_BOT)
fcc37d29 BJ	497	break;
	498	}
	499	geterror(bp);
	500	return;
	501	case MTIOCGET:
	502	mtget.mt_dsreg = sc->sc_dsreg;
	503	mtget.mt_erreg = sc->sc_erreg;
	504	mtget.mt_resid = sc->sc_resid;
e320a1c9	505	mtget.mt_type = MT_ISHT;
fcc37d29 BJ	506	if (copyout((caddr_t)&mtget, addr, sizeof(mtget)))
	507	u.u_error = EFAULT;
	508	return;
	509	default:
	510	u.u_error = ENXIO;
	511	}
	512	}
f0a3ddbd BJ	513
	514	#define DBSIZE 20
	515
fcc37d29	516	htdump()
f0a3ddbd	517	{
89bd2f01	518	register struct mba_device *mi;
fcc37d29 BJ	519	register struct mba_regs *mp;
	520	register struct htdevice *htaddr;
	521	int blk, num;
	522	int start;
	523
	524	start = 0;
	525	num = maxfree;
	526	#define phys(a,b) ((b)((int)(a)&0x7fffffff))
	527	if (htinfo[0] == 0)
	528	return (ENXIO);
89bd2f01	529	mi = phys(htinfo[0], struct mba_device *);
fcc37d29	530	mp = phys(mi->mi_hd, struct mba_hd *)->mh_physmba;
9f1dae18	531	mp->mba_cr = MBCR_IE;
fcc37d29 BJ	532	htaddr = (struct htdevice *)&mp->mba_drv[mi->mi_drive];
	533	htaddr->httc = HTTC_PDP11\|HTTC_1600BPI;
	534	htaddr->htcs1 = HT_DCLR\|HT_GO;
f0a3ddbd BJ	535	while (num > 0) {
f0a3ddbd BJ	536	blk = num > DBSIZE ? DBSIZE : num;
fcc37d29 BJ	537	htdwrite(start, blk, htaddr, mp);
fcc37d29 BJ	538	start += blk;
f0a3ddbd BJ	539	num -= blk;
f0a3ddbd BJ	540	}
fcc37d29 BJ	541	hteof(htaddr);
fcc37d29 BJ	542	hteof(htaddr);
9f1dae18	543	htwait(htaddr);
fc4d0a69	544	if (htaddr->htds&HTDS_ERR)
9f1dae18 BJ	545	return (EIO);
9f1dae18 BJ	546	htaddr->htcs1 = HT_REW\|HT_GO;
a0eab615	547	return (0);
f0a3ddbd BJ	548	}
f0a3ddbd BJ	549
fcc37d29 BJ	550	htdwrite(dbuf, num, htaddr, mp)
	551	register dbuf, num;
	552	register struct htdevice *htaddr;
	553	struct mba_regs *mp;
f0a3ddbd	554	{
fcc37d29	555	register struct pte *io;
f0a3ddbd BJ	556	register int i;
f0a3ddbd BJ	557
fcc37d29 BJ	558	htwait(htaddr);
fcc37d29 BJ	559	io = mp->mba_map;
f0a3ddbd	560	for (i = 0; i < num; i++)
fcc37d29 BJ	561	(int )io++ = dbuf++ \| PG_V;
	562	htaddr->htfc = -(num*NBPG);
	563	mp->mba_sr = -1;
	564	mp->mba_bcr = -(num*NBPG);
	565	mp->mba_var = 0;
	566	htaddr->htcs1 = HT_WCOM\|HT_GO;
f0a3ddbd BJ	567	}
f0a3ddbd BJ	568
fcc37d29 BJ	569	htwait(htaddr)
fcc37d29 BJ	570	struct htdevice *htaddr;
f0a3ddbd BJ	571	{
	572	register s;
	573
	574	do
fcc37d29 BJ	575	s = htaddr->htds;
fcc37d29 BJ	576	while ((s & HTDS_DRY) == 0);
f0a3ddbd BJ	577	}
f0a3ddbd BJ	578
fcc37d29 BJ	579	hteof(htaddr)
fcc37d29 BJ	580	struct htdevice *htaddr;
f0a3ddbd BJ	581	{
f0a3ddbd BJ	582
fcc37d29 BJ	583	htwait(htaddr);
fcc37d29 BJ	584	htaddr->htcs1 = HT_WEOF\|HT_GO;
f0a3ddbd	585	}
a5cc519e	586	#endif