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15637ed4 RG |
1 | /*- |
2 | * Copyright (c) 1988 University of Utah. | |
3 | * Copyright (c) 1982, 1986, 1990 The Regents of the University of California. | |
4 | * All rights reserved. | |
5 | * | |
6 | * This code is derived from software contributed to Berkeley by | |
7 | * the Systems Programming Group of the University of Utah Computer | |
8 | * Science Department, and code derived from software contributed to | |
9 | * Berkeley by William Jolitz. | |
10 | * | |
11 | * Redistribution and use in source and binary forms, with or without | |
12 | * modification, are permitted provided that the following conditions | |
13 | * are met: | |
14 | * 1. Redistributions of source code must retain the above copyright | |
15 | * notice, this list of conditions and the following disclaimer. | |
16 | * 2. Redistributions in binary form must reproduce the above copyright | |
17 | * notice, this list of conditions and the following disclaimer in the | |
18 | * documentation and/or other materials provided with the distribution. | |
19 | * 3. All advertising materials mentioning features or use of this software | |
20 | * must display the following acknowledgement: | |
21 | * This product includes software developed by the University of | |
22 | * California, Berkeley and its contributors. | |
23 | * 4. Neither the name of the University nor the names of its contributors | |
24 | * may be used to endorse or promote products derived from this software | |
25 | * without specific prior written permission. | |
26 | * | |
27 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND | |
28 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
29 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
30 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | |
31 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
32 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
33 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
34 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
35 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
36 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
37 | * SUCH DAMAGE. | |
38 | * | |
78ed81a3 | 39 | * from: Utah $Hdr: mem.c 1.13 89/10/08$ |
40 | * from: @(#)mem.c 7.2 (Berkeley) 5/9/91 | |
41 | * $Id$ | |
15637ed4 RG |
42 | */ |
43 | ||
44 | /* | |
45 | * Memory special file | |
46 | */ | |
47 | ||
48 | #include "param.h" | |
49 | #include "conf.h" | |
50 | #include "buf.h" | |
51 | #include "systm.h" | |
52 | #include "uio.h" | |
53 | #include "malloc.h" | |
78ed81a3 | 54 | #include "proc.h" |
15637ed4 RG |
55 | |
56 | #include "machine/cpu.h" | |
78ed81a3 | 57 | #include "machine/psl.h" |
15637ed4 RG |
58 | |
59 | #include "vm/vm_param.h" | |
60 | #include "vm/lock.h" | |
61 | #include "vm/vm_statistics.h" | |
62 | #include "vm/pmap.h" | |
63 | #include "vm/vm_prot.h" | |
64 | ||
65 | extern char *vmmap; /* poor name! */ | |
66 | /*ARGSUSED*/ | |
78ed81a3 | 67 | mmclose(dev, uio, flags) |
68 | dev_t dev; | |
69 | struct uio *uio; | |
70 | int flags; | |
71 | { | |
72 | struct syscframe *fp; | |
73 | ||
74 | switch (minor(dev)) { | |
75 | case 14: | |
76 | fp = (struct syscframe *)curproc->p_regs; | |
77 | fp->sf_eflags &= ~PSL_IOPL; | |
78 | break; | |
79 | default: | |
80 | break; | |
81 | } | |
82 | return(0); | |
83 | } | |
84 | /*ARGSUSED*/ | |
85 | mmopen(dev, uio, flags) | |
86 | dev_t dev; | |
87 | struct uio *uio; | |
88 | int flags; | |
89 | { | |
90 | struct syscframe *fp; | |
91 | ||
92 | switch (minor(dev)) { | |
93 | case 14: | |
94 | fp = (struct syscframe *)curproc->p_regs; | |
95 | fp->sf_eflags |= PSL_IOPL; | |
96 | break; | |
97 | default: | |
98 | break; | |
99 | } | |
100 | return(0); | |
101 | } | |
102 | /*ARGSUSED*/ | |
15637ed4 RG |
103 | mmrw(dev, uio, flags) |
104 | dev_t dev; | |
105 | struct uio *uio; | |
106 | int flags; | |
107 | { | |
108 | register int o; | |
109 | register u_int c, v; | |
110 | register struct iovec *iov; | |
111 | int error = 0; | |
112 | caddr_t zbuf = NULL; | |
113 | ||
114 | while (uio->uio_resid > 0 && error == 0) { | |
115 | iov = uio->uio_iov; | |
116 | if (iov->iov_len == 0) { | |
117 | uio->uio_iov++; | |
118 | uio->uio_iovcnt--; | |
119 | if (uio->uio_iovcnt < 0) | |
120 | panic("mmrw"); | |
121 | continue; | |
122 | } | |
123 | switch (minor(dev)) { | |
124 | ||
125 | /* minor device 0 is physical memory */ | |
126 | case 0: | |
127 | v = uio->uio_offset; | |
128 | pmap_enter(pmap_kernel(), vmmap, v, | |
129 | uio->uio_rw == UIO_READ ? VM_PROT_READ : VM_PROT_WRITE, | |
130 | TRUE); | |
131 | o = (int)uio->uio_offset & PGOFSET; | |
132 | c = (u_int)(NBPG - ((int)iov->iov_base & PGOFSET)); | |
133 | c = MIN(c, (u_int)(NBPG - o)); | |
134 | c = MIN(c, (u_int)iov->iov_len); | |
135 | error = uiomove((caddr_t)&vmmap[o], (int)c, uio); | |
136 | pmap_remove(pmap_kernel(), vmmap, &vmmap[NBPG]); | |
137 | continue; | |
138 | ||
139 | /* minor device 1 is kernel memory */ | |
140 | case 1: | |
141 | c = iov->iov_len; | |
142 | if (!kernacc((caddr_t)uio->uio_offset, c, | |
143 | uio->uio_rw == UIO_READ ? B_READ : B_WRITE)) | |
144 | return(EFAULT); | |
145 | error = uiomove((caddr_t)uio->uio_offset, (int)c, uio); | |
146 | continue; | |
147 | ||
148 | /* minor device 2 is EOF/RATHOLE */ | |
149 | case 2: | |
150 | if (uio->uio_rw == UIO_READ) | |
151 | return (0); | |
152 | c = iov->iov_len; | |
153 | break; | |
154 | ||
155 | /* minor device 12 (/dev/zero) is source of nulls on read, rathole on write */ | |
156 | case 12: | |
157 | if (uio->uio_rw == UIO_WRITE) { | |
158 | c = iov->iov_len; | |
159 | break; | |
160 | } | |
161 | if (zbuf == NULL) { | |
162 | zbuf = (caddr_t) | |
163 | malloc(CLBYTES, M_TEMP, M_WAITOK); | |
164 | bzero(zbuf, CLBYTES); | |
165 | } | |
166 | c = MIN(iov->iov_len, CLBYTES); | |
167 | error = uiomove(zbuf, (int)c, uio); | |
168 | continue; | |
169 | ||
170 | #ifdef notyet | |
171 | /* 386 I/O address space (/dev/ioport[bwl]) is a read/write access to seperate | |
172 | i/o device address bus, different than memory bus. Semantics here are | |
173 | very different than ordinary read/write, as if iov_len is a multiple | |
174 | an implied string move from a single port will be done. Note that lseek | |
175 | must be used to set the port number reliably. */ | |
176 | case 14: | |
177 | if (iov->iov_len == 1) { | |
178 | u_char tmp; | |
179 | tmp = inb(uio->uio_offset); | |
180 | error = uiomove (&tmp, iov->iov_len, uio); | |
181 | } else { | |
182 | if (!useracc((caddr_t)iov->iov_base, | |
183 | iov->iov_len, uio->uio_rw)) | |
184 | return (EFAULT); | |
185 | insb(uio->uio_offset, iov->iov_base, | |
186 | iov->iov_len); | |
187 | } | |
188 | break; | |
189 | case 15: | |
190 | if (iov->iov_len == sizeof (short)) { | |
191 | u_short tmp; | |
192 | tmp = inw(uio->uio_offset); | |
193 | error = uiomove (&tmp, iov->iov_len, uio); | |
194 | } else { | |
195 | if (!useracc((caddr_t)iov->iov_base, | |
196 | iov->iov_len, uio->uio_rw)) | |
197 | return (EFAULT); | |
198 | insw(uio->uio_offset, iov->iov_base, | |
199 | iov->iov_len/ sizeof (short)); | |
200 | } | |
201 | break; | |
202 | case 16: | |
203 | if (iov->iov_len == sizeof (long)) { | |
204 | u_long tmp; | |
205 | tmp = inl(uio->uio_offset); | |
206 | error = uiomove (&tmp, iov->iov_len, uio); | |
207 | } else { | |
208 | if (!useracc((caddr_t)iov->iov_base, | |
209 | iov->iov_len, uio->uio_rw)) | |
210 | return (EFAULT); | |
211 | insl(uio->uio_offset, iov->iov_base, | |
212 | iov->iov_len/ sizeof (long)); | |
213 | } | |
214 | break; | |
215 | #endif | |
216 | ||
217 | default: | |
218 | return (ENXIO); | |
219 | } | |
220 | if (error) | |
221 | break; | |
222 | iov->iov_base += c; | |
223 | iov->iov_len -= c; | |
224 | uio->uio_offset += c; | |
225 | uio->uio_resid -= c; | |
226 | } | |
227 | if (zbuf) | |
228 | free(zbuf, M_TEMP); | |
229 | return (error); | |
230 | } |