| 1 | /* Emit RTL for the GNU C-Compiler expander. |
| 2 | Copyright (C) 1987, 1988, 1992, 1993 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of GNU CC. |
| 5 | |
| 6 | GNU CC is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 2, or (at your option) |
| 9 | any later version. |
| 10 | |
| 11 | GNU CC is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with GNU CC; see the file COPYING. If not, write to |
| 18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ |
| 19 | |
| 20 | |
| 21 | /* Middle-to-low level generation of rtx code and insns. |
| 22 | |
| 23 | This file contains the functions `gen_rtx', `gen_reg_rtx' |
| 24 | and `gen_label_rtx' that are the usual ways of creating rtl |
| 25 | expressions for most purposes. |
| 26 | |
| 27 | It also has the functions for creating insns and linking |
| 28 | them in the doubly-linked chain. |
| 29 | |
| 30 | The patterns of the insns are created by machine-dependent |
| 31 | routines in insn-emit.c, which is generated automatically from |
| 32 | the machine description. These routines use `gen_rtx' to make |
| 33 | the individual rtx's of the pattern; what is machine dependent |
| 34 | is the kind of rtx's they make and what arguments they use. */ |
| 35 | |
| 36 | #include "config.h" |
| 37 | #include "gvarargs.h" |
| 38 | #include "rtl.h" |
| 39 | #include "flags.h" |
| 40 | #include "function.h" |
| 41 | #include "expr.h" |
| 42 | #include "regs.h" |
| 43 | #include "insn-config.h" |
| 44 | #include "real.h" |
| 45 | #include <stdio.h> |
| 46 | |
| 47 | /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function. |
| 48 | After rtl generation, it is 1 plus the largest register number used. */ |
| 49 | |
| 50 | int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; |
| 51 | |
| 52 | /* This is *not* reset after each function. It gives each CODE_LABEL |
| 53 | in the entire compilation a unique label number. */ |
| 54 | |
| 55 | static int label_num = 1; |
| 56 | |
| 57 | /* Lowest label number in current function. */ |
| 58 | |
| 59 | static int first_label_num; |
| 60 | |
| 61 | /* Highest label number in current function. |
| 62 | Zero means use the value of label_num instead. |
| 63 | This is nonzero only when belatedly compiling an inline function. */ |
| 64 | |
| 65 | static int last_label_num; |
| 66 | |
| 67 | /* Value label_num had when set_new_first_and_last_label_number was called. |
| 68 | If label_num has not changed since then, last_label_num is valid. */ |
| 69 | |
| 70 | static int base_label_num; |
| 71 | |
| 72 | /* Nonzero means do not generate NOTEs for source line numbers. */ |
| 73 | |
| 74 | static int no_line_numbers; |
| 75 | |
| 76 | /* Commonly used rtx's, so that we only need space for one copy. |
| 77 | These are initialized once for the entire compilation. |
| 78 | All of these except perhaps the floating-point CONST_DOUBLEs |
| 79 | are unique; no other rtx-object will be equal to any of these. */ |
| 80 | |
| 81 | rtx pc_rtx; /* (PC) */ |
| 82 | rtx cc0_rtx; /* (CC0) */ |
| 83 | rtx cc1_rtx; /* (CC1) (not actually used nowadays) */ |
| 84 | rtx const0_rtx; /* (CONST_INT 0) */ |
| 85 | rtx const1_rtx; /* (CONST_INT 1) */ |
| 86 | rtx const2_rtx; /* (CONST_INT 2) */ |
| 87 | rtx constm1_rtx; /* (CONST_INT -1) */ |
| 88 | rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */ |
| 89 | |
| 90 | /* We record floating-point CONST_DOUBLEs in each floating-point mode for |
| 91 | the values of 0, 1, and 2. For the integer entries and VOIDmode, we |
| 92 | record a copy of const[012]_rtx. */ |
| 93 | |
| 94 | rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE]; |
| 95 | |
| 96 | REAL_VALUE_TYPE dconst0; |
| 97 | REAL_VALUE_TYPE dconst1; |
| 98 | REAL_VALUE_TYPE dconst2; |
| 99 | REAL_VALUE_TYPE dconstm1; |
| 100 | |
| 101 | /* All references to the following fixed hard registers go through |
| 102 | these unique rtl objects. On machines where the frame-pointer and |
| 103 | arg-pointer are the same register, they use the same unique object. |
| 104 | |
| 105 | After register allocation, other rtl objects which used to be pseudo-regs |
| 106 | may be clobbered to refer to the frame-pointer register. |
| 107 | But references that were originally to the frame-pointer can be |
| 108 | distinguished from the others because they contain frame_pointer_rtx. |
| 109 | |
| 110 | In an inline procedure, the stack and frame pointer rtxs may not be |
| 111 | used for anything else. */ |
| 112 | rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */ |
| 113 | rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */ |
| 114 | rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */ |
| 115 | rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */ |
| 116 | rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */ |
| 117 | rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */ |
| 118 | rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */ |
| 119 | rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */ |
| 120 | |
| 121 | rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */ |
| 122 | rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */ |
| 123 | rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */ |
| 124 | rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */ |
| 125 | |
| 126 | /* We make one copy of (const_int C) where C is in |
| 127 | [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT] |
| 128 | to save space during the compilation and simplify comparisons of |
| 129 | integers. */ |
| 130 | |
| 131 | #define MAX_SAVED_CONST_INT 64 |
| 132 | |
| 133 | static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1]; |
| 134 | |
| 135 | /* The ends of the doubly-linked chain of rtl for the current function. |
| 136 | Both are reset to null at the start of rtl generation for the function. |
| 137 | |
| 138 | start_sequence saves both of these on `sequence_stack' and then |
| 139 | starts a new, nested sequence of insns. */ |
| 140 | |
| 141 | static rtx first_insn = NULL; |
| 142 | static rtx last_insn = NULL; |
| 143 | |
| 144 | /* INSN_UID for next insn emitted. |
| 145 | Reset to 1 for each function compiled. */ |
| 146 | |
| 147 | static int cur_insn_uid = 1; |
| 148 | |
| 149 | /* Line number and source file of the last line-number NOTE emitted. |
| 150 | This is used to avoid generating duplicates. */ |
| 151 | |
| 152 | static int last_linenum = 0; |
| 153 | static char *last_filename = 0; |
| 154 | |
| 155 | /* A vector indexed by pseudo reg number. The allocated length |
| 156 | of this vector is regno_pointer_flag_length. Since this |
| 157 | vector is needed during the expansion phase when the total |
| 158 | number of registers in the function is not yet known, |
| 159 | it is copied and made bigger when necessary. */ |
| 160 | |
| 161 | char *regno_pointer_flag; |
| 162 | int regno_pointer_flag_length; |
| 163 | |
| 164 | /* Indexed by pseudo register number, gives the rtx for that pseudo. |
| 165 | Allocated in parallel with regno_pointer_flag. */ |
| 166 | |
| 167 | rtx *regno_reg_rtx; |
| 168 | |
| 169 | /* Stack of pending (incomplete) sequences saved by `start_sequence'. |
| 170 | Each element describes one pending sequence. |
| 171 | The main insn-chain is saved in the last element of the chain, |
| 172 | unless the chain is empty. */ |
| 173 | |
| 174 | struct sequence_stack *sequence_stack; |
| 175 | |
| 176 | /* start_sequence and gen_sequence can make a lot of rtx expressions which are |
| 177 | shortly thrown away. We use two mechanisms to prevent this waste: |
| 178 | |
| 179 | First, we keep a list of the expressions used to represent the sequence |
| 180 | stack in sequence_element_free_list. |
| 181 | |
| 182 | Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated |
| 183 | rtvec for use by gen_sequence. One entry for each size is sufficient |
| 184 | because most cases are calls to gen_sequence followed by immediately |
| 185 | emitting the SEQUENCE. Reuse is safe since emitting a sequence is |
| 186 | destructive on the insn in it anyway and hence can't be redone. |
| 187 | |
| 188 | We do not bother to save this cached data over nested function calls. |
| 189 | Instead, we just reinitialize them. */ |
| 190 | |
| 191 | #define SEQUENCE_RESULT_SIZE 5 |
| 192 | |
| 193 | static struct sequence_stack *sequence_element_free_list; |
| 194 | static rtx sequence_result[SEQUENCE_RESULT_SIZE]; |
| 195 | |
| 196 | extern int rtx_equal_function_value_matters; |
| 197 | |
| 198 | /* Filename and line number of last line-number note, |
| 199 | whether we actually emitted it or not. */ |
| 200 | extern char *emit_filename; |
| 201 | extern int emit_lineno; |
| 202 | |
| 203 | rtx change_address (); |
| 204 | void init_emit (); |
| 205 | \f |
| 206 | /* rtx gen_rtx (code, mode, [element1, ..., elementn]) |
| 207 | ** |
| 208 | ** This routine generates an RTX of the size specified by |
| 209 | ** <code>, which is an RTX code. The RTX structure is initialized |
| 210 | ** from the arguments <element1> through <elementn>, which are |
| 211 | ** interpreted according to the specific RTX type's format. The |
| 212 | ** special machine mode associated with the rtx (if any) is specified |
| 213 | ** in <mode>. |
| 214 | ** |
| 215 | ** gen_rtx can be invoked in a way which resembles the lisp-like |
| 216 | ** rtx it will generate. For example, the following rtx structure: |
| 217 | ** |
| 218 | ** (plus:QI (mem:QI (reg:SI 1)) |
| 219 | ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3)))) |
| 220 | ** |
| 221 | ** ...would be generated by the following C code: |
| 222 | ** |
| 223 | ** gen_rtx (PLUS, QImode, |
| 224 | ** gen_rtx (MEM, QImode, |
| 225 | ** gen_rtx (REG, SImode, 1)), |
| 226 | ** gen_rtx (MEM, QImode, |
| 227 | ** gen_rtx (PLUS, SImode, |
| 228 | ** gen_rtx (REG, SImode, 2), |
| 229 | ** gen_rtx (REG, SImode, 3)))), |
| 230 | */ |
| 231 | |
| 232 | /*VARARGS2*/ |
| 233 | rtx |
| 234 | gen_rtx (va_alist) |
| 235 | va_dcl |
| 236 | { |
| 237 | va_list p; |
| 238 | enum rtx_code code; |
| 239 | enum machine_mode mode; |
| 240 | register int i; /* Array indices... */ |
| 241 | register char *fmt; /* Current rtx's format... */ |
| 242 | register rtx rt_val; /* RTX to return to caller... */ |
| 243 | |
| 244 | va_start (p); |
| 245 | code = va_arg (p, enum rtx_code); |
| 246 | mode = va_arg (p, enum machine_mode); |
| 247 | |
| 248 | if (code == CONST_INT) |
| 249 | { |
| 250 | HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT); |
| 251 | |
| 252 | if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT) |
| 253 | return const_int_rtx[arg + MAX_SAVED_CONST_INT]; |
| 254 | |
| 255 | if (const_true_rtx && arg == STORE_FLAG_VALUE) |
| 256 | return const_true_rtx; |
| 257 | |
| 258 | rt_val = rtx_alloc (code); |
| 259 | INTVAL (rt_val) = arg; |
| 260 | } |
| 261 | else if (code == REG) |
| 262 | { |
| 263 | int regno = va_arg (p, int); |
| 264 | |
| 265 | /* In case the MD file explicitly references the frame pointer, have |
| 266 | all such references point to the same frame pointer. This is used |
| 267 | during frame pointer elimination to distinguish the explicit |
| 268 | references to these registers from pseudos that happened to be |
| 269 | assigned to them. |
| 270 | |
| 271 | If we have eliminated the frame pointer or arg pointer, we will |
| 272 | be using it as a normal register, for example as a spill register. |
| 273 | In such cases, we might be accessing it in a mode that is not |
| 274 | Pmode and therefore cannot use the pre-allocated rtx. |
| 275 | |
| 276 | Also don't do this when we are making new REGs in reload, |
| 277 | since we don't want to get confused with the real pointers. */ |
| 278 | |
| 279 | if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode |
| 280 | && ! reload_in_progress) |
| 281 | return frame_pointer_rtx; |
| 282 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
| 283 | if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode |
| 284 | && ! reload_in_progress) |
| 285 | return arg_pointer_rtx; |
| 286 | #endif |
| 287 | if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode |
| 288 | && ! reload_in_progress) |
| 289 | return stack_pointer_rtx; |
| 290 | else |
| 291 | { |
| 292 | rt_val = rtx_alloc (code); |
| 293 | rt_val->mode = mode; |
| 294 | REGNO (rt_val) = regno; |
| 295 | return rt_val; |
| 296 | } |
| 297 | } |
| 298 | else |
| 299 | { |
| 300 | rt_val = rtx_alloc (code); /* Allocate the storage space. */ |
| 301 | rt_val->mode = mode; /* Store the machine mode... */ |
| 302 | |
| 303 | fmt = GET_RTX_FORMAT (code); /* Find the right format... */ |
| 304 | for (i = 0; i < GET_RTX_LENGTH (code); i++) |
| 305 | { |
| 306 | switch (*fmt++) |
| 307 | { |
| 308 | case '0': /* Unused field. */ |
| 309 | break; |
| 310 | |
| 311 | case 'i': /* An integer? */ |
| 312 | XINT (rt_val, i) = va_arg (p, int); |
| 313 | break; |
| 314 | |
| 315 | case 'w': /* A wide integer? */ |
| 316 | XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT); |
| 317 | break; |
| 318 | |
| 319 | case 's': /* A string? */ |
| 320 | XSTR (rt_val, i) = va_arg (p, char *); |
| 321 | break; |
| 322 | |
| 323 | case 'e': /* An expression? */ |
| 324 | case 'u': /* An insn? Same except when printing. */ |
| 325 | XEXP (rt_val, i) = va_arg (p, rtx); |
| 326 | break; |
| 327 | |
| 328 | case 'E': /* An RTX vector? */ |
| 329 | XVEC (rt_val, i) = va_arg (p, rtvec); |
| 330 | break; |
| 331 | |
| 332 | default: |
| 333 | abort (); |
| 334 | } |
| 335 | } |
| 336 | } |
| 337 | va_end (p); |
| 338 | return rt_val; /* Return the new RTX... */ |
| 339 | } |
| 340 | |
| 341 | /* gen_rtvec (n, [rt1, ..., rtn]) |
| 342 | ** |
| 343 | ** This routine creates an rtvec and stores within it the |
| 344 | ** pointers to rtx's which are its arguments. |
| 345 | */ |
| 346 | |
| 347 | /*VARARGS1*/ |
| 348 | rtvec |
| 349 | gen_rtvec (va_alist) |
| 350 | va_dcl |
| 351 | { |
| 352 | int n, i; |
| 353 | va_list p; |
| 354 | rtx *vector; |
| 355 | |
| 356 | va_start (p); |
| 357 | n = va_arg (p, int); |
| 358 | |
| 359 | if (n == 0) |
| 360 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ |
| 361 | |
| 362 | vector = (rtx *) alloca (n * sizeof (rtx)); |
| 363 | for (i = 0; i < n; i++) |
| 364 | vector[i] = va_arg (p, rtx); |
| 365 | va_end (p); |
| 366 | |
| 367 | return gen_rtvec_v (n, vector); |
| 368 | } |
| 369 | |
| 370 | rtvec |
| 371 | gen_rtvec_v (n, argp) |
| 372 | int n; |
| 373 | rtx *argp; |
| 374 | { |
| 375 | register int i; |
| 376 | register rtvec rt_val; |
| 377 | |
| 378 | if (n == 0) |
| 379 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ |
| 380 | |
| 381 | rt_val = rtvec_alloc (n); /* Allocate an rtvec... */ |
| 382 | |
| 383 | for (i = 0; i < n; i++) |
| 384 | rt_val->elem[i].rtx = *argp++; |
| 385 | |
| 386 | return rt_val; |
| 387 | } |
| 388 | \f |
| 389 | /* Generate a REG rtx for a new pseudo register of mode MODE. |
| 390 | This pseudo is assigned the next sequential register number. */ |
| 391 | |
| 392 | rtx |
| 393 | gen_reg_rtx (mode) |
| 394 | enum machine_mode mode; |
| 395 | { |
| 396 | register rtx val; |
| 397 | |
| 398 | /* Don't let anything called by or after reload create new registers |
| 399 | (actually, registers can't be created after flow, but this is a good |
| 400 | approximation). */ |
| 401 | |
| 402 | if (reload_in_progress || reload_completed) |
| 403 | abort (); |
| 404 | |
| 405 | /* Make sure regno_pointer_flag and regno_reg_rtx are large |
| 406 | enough to have an element for this pseudo reg number. */ |
| 407 | |
| 408 | if (reg_rtx_no == regno_pointer_flag_length) |
| 409 | { |
| 410 | rtx *new1; |
| 411 | char *new = |
| 412 | (char *) oballoc (regno_pointer_flag_length * 2); |
| 413 | bzero (new, regno_pointer_flag_length * 2); |
| 414 | bcopy (regno_pointer_flag, new, regno_pointer_flag_length); |
| 415 | regno_pointer_flag = new; |
| 416 | |
| 417 | new1 = (rtx *) oballoc (regno_pointer_flag_length * 2 * sizeof (rtx)); |
| 418 | bzero (new1, regno_pointer_flag_length * 2 * sizeof (rtx)); |
| 419 | bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx)); |
| 420 | regno_reg_rtx = new1; |
| 421 | |
| 422 | regno_pointer_flag_length *= 2; |
| 423 | } |
| 424 | |
| 425 | val = gen_rtx (REG, mode, reg_rtx_no); |
| 426 | regno_reg_rtx[reg_rtx_no++] = val; |
| 427 | return val; |
| 428 | } |
| 429 | |
| 430 | /* Identify REG as a probable pointer register. */ |
| 431 | |
| 432 | void |
| 433 | mark_reg_pointer (reg) |
| 434 | rtx reg; |
| 435 | { |
| 436 | REGNO_POINTER_FLAG (REGNO (reg)) = 1; |
| 437 | } |
| 438 | |
| 439 | /* Return 1 plus largest pseudo reg number used in the current function. */ |
| 440 | |
| 441 | int |
| 442 | max_reg_num () |
| 443 | { |
| 444 | return reg_rtx_no; |
| 445 | } |
| 446 | |
| 447 | /* Return 1 + the largest label number used so far in the current function. */ |
| 448 | |
| 449 | int |
| 450 | max_label_num () |
| 451 | { |
| 452 | if (last_label_num && label_num == base_label_num) |
| 453 | return last_label_num; |
| 454 | return label_num; |
| 455 | } |
| 456 | |
| 457 | /* Return first label number used in this function (if any were used). */ |
| 458 | |
| 459 | int |
| 460 | get_first_label_num () |
| 461 | { |
| 462 | return first_label_num; |
| 463 | } |
| 464 | \f |
| 465 | /* Return a value representing some low-order bits of X, where the number |
| 466 | of low-order bits is given by MODE. Note that no conversion is done |
| 467 | between floating-point and fixed-point values, rather, the bit |
| 468 | representation is returned. |
| 469 | |
| 470 | This function handles the cases in common between gen_lowpart, below, |
| 471 | and two variants in cse.c and combine.c. These are the cases that can |
| 472 | be safely handled at all points in the compilation. |
| 473 | |
| 474 | If this is not a case we can handle, return 0. */ |
| 475 | |
| 476 | rtx |
| 477 | gen_lowpart_common (mode, x) |
| 478 | enum machine_mode mode; |
| 479 | register rtx x; |
| 480 | { |
| 481 | int word = 0; |
| 482 | |
| 483 | if (GET_MODE (x) == mode) |
| 484 | return x; |
| 485 | |
| 486 | /* MODE must occupy no more words than the mode of X. */ |
| 487 | if (GET_MODE (x) != VOIDmode |
| 488 | && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD |
| 489 | > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1)) |
| 490 | / UNITS_PER_WORD))) |
| 491 | return 0; |
| 492 | |
| 493 | if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) |
| 494 | word = ((GET_MODE_SIZE (GET_MODE (x)) |
| 495 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) |
| 496 | / UNITS_PER_WORD); |
| 497 | |
| 498 | if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND) |
| 499 | && (GET_MODE_CLASS (mode) == MODE_INT |
| 500 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)) |
| 501 | { |
| 502 | /* If we are getting the low-order part of something that has been |
| 503 | sign- or zero-extended, we can either just use the object being |
| 504 | extended or make a narrower extension. If we want an even smaller |
| 505 | piece than the size of the object being extended, call ourselves |
| 506 | recursively. |
| 507 | |
| 508 | This case is used mostly by combine and cse. */ |
| 509 | |
| 510 | if (GET_MODE (XEXP (x, 0)) == mode) |
| 511 | return XEXP (x, 0); |
| 512 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0)))) |
| 513 | return gen_lowpart_common (mode, XEXP (x, 0)); |
| 514 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x))) |
| 515 | return gen_rtx (GET_CODE (x), mode, XEXP (x, 0)); |
| 516 | } |
| 517 | else if (GET_CODE (x) == SUBREG |
| 518 | && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD |
| 519 | || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x)))) |
| 520 | return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0 |
| 521 | ? SUBREG_REG (x) |
| 522 | : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x))); |
| 523 | else if (GET_CODE (x) == REG) |
| 524 | { |
| 525 | /* If the register is not valid for MODE, return 0. If we don't |
| 526 | do this, there is no way to fix up the resulting REG later. */ |
| 527 | if (REGNO (x) < FIRST_PSEUDO_REGISTER |
| 528 | && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)) |
| 529 | return 0; |
| 530 | else if (REGNO (x) < FIRST_PSEUDO_REGISTER |
| 531 | /* integrate.c can't handle parts of a return value register. */ |
| 532 | && (! REG_FUNCTION_VALUE_P (x) |
| 533 | || ! rtx_equal_function_value_matters) |
| 534 | /* We want to keep the stack, frame, and arg pointers |
| 535 | special. */ |
| 536 | && REGNO (x) != FRAME_POINTER_REGNUM |
| 537 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
| 538 | && REGNO (x) != ARG_POINTER_REGNUM |
| 539 | #endif |
| 540 | && REGNO (x) != STACK_POINTER_REGNUM) |
| 541 | return gen_rtx (REG, mode, REGNO (x) + word); |
| 542 | else |
| 543 | return gen_rtx (SUBREG, mode, x, word); |
| 544 | } |
| 545 | |
| 546 | /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits |
| 547 | from the low-order part of the constant. */ |
| 548 | else if ((GET_MODE_CLASS (mode) == MODE_INT |
| 549 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) |
| 550 | && GET_MODE (x) == VOIDmode |
| 551 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)) |
| 552 | { |
| 553 | /* If MODE is twice the host word size, X is already the desired |
| 554 | representation. Otherwise, if MODE is wider than a word, we can't |
| 555 | do this. If MODE is exactly a word, return just one CONST_INT. |
| 556 | If MODE is smaller than a word, clear the bits that don't belong |
| 557 | in our mode, unless they and our sign bit are all one. So we get |
| 558 | either a reasonable negative value or a reasonable unsigned value |
| 559 | for this mode. */ |
| 560 | |
| 561 | if (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT) |
| 562 | return x; |
| 563 | else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT) |
| 564 | return 0; |
| 565 | else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT) |
| 566 | return (GET_CODE (x) == CONST_INT ? x |
| 567 | : GEN_INT (CONST_DOUBLE_LOW (x))); |
| 568 | else |
| 569 | { |
| 570 | /* MODE must be narrower than HOST_BITS_PER_INT. */ |
| 571 | int width = GET_MODE_BITSIZE (mode); |
| 572 | HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x) |
| 573 | : CONST_DOUBLE_LOW (x)); |
| 574 | |
| 575 | if (((val & ((HOST_WIDE_INT) (-1) << (width - 1))) |
| 576 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) |
| 577 | val &= ((HOST_WIDE_INT) 1 << width) - 1; |
| 578 | |
| 579 | return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x |
| 580 | : GEN_INT (val)); |
| 581 | } |
| 582 | } |
| 583 | |
| 584 | /* If X is an integral constant but we want it in floating-point, it |
| 585 | must be the case that we have a union of an integer and a floating-point |
| 586 | value. If the machine-parameters allow it, simulate that union here |
| 587 | and return the result. The two-word and single-word cases are |
| 588 | different. */ |
| 589 | |
| 590 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
| 591 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
| 592 | || flag_pretend_float) |
| 593 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
| 594 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD |
| 595 | && GET_CODE (x) == CONST_INT |
| 596 | && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT) |
| 597 | { |
| 598 | union {HOST_WIDE_INT i; float d; } u; |
| 599 | |
| 600 | u.i = INTVAL (x); |
| 601 | return immed_real_const_1 (u.d, mode); |
| 602 | } |
| 603 | |
| 604 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
| 605 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
| 606 | || flag_pretend_float) |
| 607 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
| 608 | && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD |
| 609 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) |
| 610 | && GET_MODE (x) == VOIDmode |
| 611 | && (sizeof (double) * HOST_BITS_PER_CHAR |
| 612 | == 2 * HOST_BITS_PER_WIDE_INT)) |
| 613 | { |
| 614 | union {HOST_WIDE_INT i[2]; double d; } u; |
| 615 | HOST_WIDE_INT low, high; |
| 616 | |
| 617 | if (GET_CODE (x) == CONST_INT) |
| 618 | low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1); |
| 619 | else |
| 620 | low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x); |
| 621 | |
| 622 | #ifdef HOST_WORDS_BIG_ENDIAN |
| 623 | u.i[0] = high, u.i[1] = low; |
| 624 | #else |
| 625 | u.i[0] = low, u.i[1] = high; |
| 626 | #endif |
| 627 | |
| 628 | return immed_real_const_1 (u.d, mode); |
| 629 | } |
| 630 | |
| 631 | /* Similarly, if this is converting a floating-point value into a |
| 632 | single-word integer. Only do this is the host and target parameters are |
| 633 | compatible. */ |
| 634 | |
| 635 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
| 636 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
| 637 | || flag_pretend_float) |
| 638 | && (GET_MODE_CLASS (mode) == MODE_INT |
| 639 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) |
| 640 | && GET_CODE (x) == CONST_DOUBLE |
| 641 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT |
| 642 | && GET_MODE_BITSIZE (mode) == BITS_PER_WORD) |
| 643 | return operand_subword (x, 0, 0, GET_MODE (x)); |
| 644 | |
| 645 | /* Similarly, if this is converting a floating-point value into a |
| 646 | two-word integer, we can do this one word at a time and make an |
| 647 | integer. Only do this is the host and target parameters are |
| 648 | compatible. */ |
| 649 | |
| 650 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
| 651 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
| 652 | || flag_pretend_float) |
| 653 | && (GET_MODE_CLASS (mode) == MODE_INT |
| 654 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) |
| 655 | && GET_CODE (x) == CONST_DOUBLE |
| 656 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT |
| 657 | && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD) |
| 658 | { |
| 659 | rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x)); |
| 660 | rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x)); |
| 661 | |
| 662 | if (lowpart && GET_CODE (lowpart) == CONST_INT |
| 663 | && highpart && GET_CODE (highpart) == CONST_INT) |
| 664 | return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode); |
| 665 | } |
| 666 | |
| 667 | /* Otherwise, we can't do this. */ |
| 668 | return 0; |
| 669 | } |
| 670 | \f |
| 671 | /* Return the real part (which has mode MODE) of a complex value X. |
| 672 | This always comes at the low address in memory. */ |
| 673 | |
| 674 | rtx |
| 675 | gen_realpart (mode, x) |
| 676 | enum machine_mode mode; |
| 677 | register rtx x; |
| 678 | { |
| 679 | if (WORDS_BIG_ENDIAN) |
| 680 | return gen_highpart (mode, x); |
| 681 | else |
| 682 | return gen_lowpart (mode, x); |
| 683 | } |
| 684 | |
| 685 | /* Return the imaginary part (which has mode MODE) of a complex value X. |
| 686 | This always comes at the high address in memory. */ |
| 687 | |
| 688 | rtx |
| 689 | gen_imagpart (mode, x) |
| 690 | enum machine_mode mode; |
| 691 | register rtx x; |
| 692 | { |
| 693 | if (WORDS_BIG_ENDIAN) |
| 694 | return gen_lowpart (mode, x); |
| 695 | else |
| 696 | return gen_highpart (mode, x); |
| 697 | } |
| 698 | \f |
| 699 | /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value, |
| 700 | return an rtx (MEM, SUBREG, or CONST_INT) that refers to the |
| 701 | least-significant part of X. |
| 702 | MODE specifies how big a part of X to return; |
| 703 | it usually should not be larger than a word. |
| 704 | If X is a MEM whose address is a QUEUED, the value may be so also. */ |
| 705 | |
| 706 | rtx |
| 707 | gen_lowpart (mode, x) |
| 708 | enum machine_mode mode; |
| 709 | register rtx x; |
| 710 | { |
| 711 | rtx result = gen_lowpart_common (mode, x); |
| 712 | |
| 713 | if (result) |
| 714 | return result; |
| 715 | else if (GET_CODE (x) == MEM) |
| 716 | { |
| 717 | /* The only additional case we can do is MEM. */ |
| 718 | register int offset = 0; |
| 719 | if (WORDS_BIG_ENDIAN) |
| 720 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) |
| 721 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); |
| 722 | |
| 723 | if (BYTES_BIG_ENDIAN) |
| 724 | /* Adjust the address so that the address-after-the-data |
| 725 | is unchanged. */ |
| 726 | offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) |
| 727 | - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); |
| 728 | |
| 729 | return change_address (x, mode, plus_constant (XEXP (x, 0), offset)); |
| 730 | } |
| 731 | else |
| 732 | abort (); |
| 733 | } |
| 734 | |
| 735 | /* Like `gen_lowpart', but refer to the most significant part. |
| 736 | This is used to access the imaginary part of a complex number. */ |
| 737 | |
| 738 | rtx |
| 739 | gen_highpart (mode, x) |
| 740 | enum machine_mode mode; |
| 741 | register rtx x; |
| 742 | { |
| 743 | /* This case loses if X is a subreg. To catch bugs early, |
| 744 | complain if an invalid MODE is used even in other cases. */ |
| 745 | if (GET_MODE_SIZE (mode) > UNITS_PER_WORD |
| 746 | && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x))) |
| 747 | abort (); |
| 748 | if (GET_CODE (x) == CONST_DOUBLE |
| 749 | #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE)) |
| 750 | && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT |
| 751 | #endif |
| 752 | ) |
| 753 | return gen_rtx (CONST_INT, VOIDmode, |
| 754 | CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode)); |
| 755 | else if (GET_CODE (x) == CONST_INT) |
| 756 | return const0_rtx; |
| 757 | else if (GET_CODE (x) == MEM) |
| 758 | { |
| 759 | register int offset = 0; |
| 760 | #if !WORDS_BIG_ENDIAN |
| 761 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) |
| 762 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); |
| 763 | #endif |
| 764 | #if !BYTES_BIG_ENDIAN |
| 765 | if (GET_MODE_SIZE (mode) < UNITS_PER_WORD) |
| 766 | offset -= (GET_MODE_SIZE (mode) |
| 767 | - MIN (UNITS_PER_WORD, |
| 768 | GET_MODE_SIZE (GET_MODE (x)))); |
| 769 | #endif |
| 770 | return change_address (x, mode, plus_constant (XEXP (x, 0), offset)); |
| 771 | } |
| 772 | else if (GET_CODE (x) == SUBREG) |
| 773 | { |
| 774 | /* The only time this should occur is when we are looking at a |
| 775 | multi-word item with a SUBREG whose mode is the same as that of the |
| 776 | item. It isn't clear what we would do if it wasn't. */ |
| 777 | if (SUBREG_WORD (x) != 0) |
| 778 | abort (); |
| 779 | return gen_highpart (mode, SUBREG_REG (x)); |
| 780 | } |
| 781 | else if (GET_CODE (x) == REG) |
| 782 | { |
| 783 | int word = 0; |
| 784 | |
| 785 | #if !WORDS_BIG_ENDIAN |
| 786 | if (GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) |
| 787 | word = ((GET_MODE_SIZE (GET_MODE (x)) |
| 788 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) |
| 789 | / UNITS_PER_WORD); |
| 790 | #endif |
| 791 | if (REGNO (x) < FIRST_PSEUDO_REGISTER |
| 792 | /* We want to keep the stack, frame, and arg pointers special. */ |
| 793 | && REGNO (x) != FRAME_POINTER_REGNUM |
| 794 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
| 795 | && REGNO (x) != ARG_POINTER_REGNUM |
| 796 | #endif |
| 797 | && REGNO (x) != STACK_POINTER_REGNUM) |
| 798 | return gen_rtx (REG, mode, REGNO (x) + word); |
| 799 | else |
| 800 | return gen_rtx (SUBREG, mode, x, word); |
| 801 | } |
| 802 | else |
| 803 | abort (); |
| 804 | } |
| 805 | |
| 806 | /* Return 1 iff X, assumed to be a SUBREG, |
| 807 | refers to the least significant part of its containing reg. |
| 808 | If X is not a SUBREG, always return 1 (it is its own low part!). */ |
| 809 | |
| 810 | int |
| 811 | subreg_lowpart_p (x) |
| 812 | rtx x; |
| 813 | { |
| 814 | if (GET_CODE (x) != SUBREG) |
| 815 | return 1; |
| 816 | |
| 817 | if (WORDS_BIG_ENDIAN |
| 818 | && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD) |
| 819 | return (SUBREG_WORD (x) |
| 820 | == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) |
| 821 | - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)) |
| 822 | / UNITS_PER_WORD)); |
| 823 | |
| 824 | return SUBREG_WORD (x) == 0; |
| 825 | } |
| 826 | \f |
| 827 | /* Return subword I of operand OP. |
| 828 | The word number, I, is interpreted as the word number starting at the |
| 829 | low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN, |
| 830 | otherwise it is the high-order word. |
| 831 | |
| 832 | If we cannot extract the required word, we return zero. Otherwise, an |
| 833 | rtx corresponding to the requested word will be returned. |
| 834 | |
| 835 | VALIDATE_ADDRESS is nonzero if the address should be validated. Before |
| 836 | reload has completed, a valid address will always be returned. After |
| 837 | reload, if a valid address cannot be returned, we return zero. |
| 838 | |
| 839 | If VALIDATE_ADDRESS is zero, we simply form the required address; validating |
| 840 | it is the responsibility of the caller. |
| 841 | |
| 842 | MODE is the mode of OP in case it is a CONST_INT. */ |
| 843 | |
| 844 | rtx |
| 845 | operand_subword (op, i, validate_address, mode) |
| 846 | rtx op; |
| 847 | int i; |
| 848 | int validate_address; |
| 849 | enum machine_mode mode; |
| 850 | { |
| 851 | HOST_WIDE_INT val; |
| 852 | int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD; |
| 853 | |
| 854 | if (mode == VOIDmode) |
| 855 | mode = GET_MODE (op); |
| 856 | |
| 857 | if (mode == VOIDmode) |
| 858 | abort (); |
| 859 | |
| 860 | /* If OP is narrower than a word or if we want a word outside OP, fail. */ |
| 861 | if (mode != BLKmode |
| 862 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD |
| 863 | || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))) |
| 864 | return 0; |
| 865 | |
| 866 | /* If OP is already an integer word, return it. */ |
| 867 | if (GET_MODE_CLASS (mode) == MODE_INT |
| 868 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD) |
| 869 | return op; |
| 870 | |
| 871 | /* If OP is a REG or SUBREG, we can handle it very simply. */ |
| 872 | if (GET_CODE (op) == REG) |
| 873 | { |
| 874 | /* If the register is not valid for MODE, return 0. If we don't |
| 875 | do this, there is no way to fix up the resulting REG later. */ |
| 876 | if (REGNO (op) < FIRST_PSEUDO_REGISTER |
| 877 | && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)) |
| 878 | return 0; |
| 879 | else if (REGNO (op) >= FIRST_PSEUDO_REGISTER |
| 880 | || (REG_FUNCTION_VALUE_P (op) |
| 881 | && rtx_equal_function_value_matters) |
| 882 | /* We want to keep the stack, frame, and arg pointers |
| 883 | special. */ |
| 884 | || REGNO (op) == FRAME_POINTER_REGNUM |
| 885 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
| 886 | || REGNO (op) == ARG_POINTER_REGNUM |
| 887 | #endif |
| 888 | || REGNO (op) == STACK_POINTER_REGNUM) |
| 889 | return gen_rtx (SUBREG, word_mode, op, i); |
| 890 | else |
| 891 | return gen_rtx (REG, word_mode, REGNO (op) + i); |
| 892 | } |
| 893 | else if (GET_CODE (op) == SUBREG) |
| 894 | return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op)); |
| 895 | |
| 896 | /* Form a new MEM at the requested address. */ |
| 897 | if (GET_CODE (op) == MEM) |
| 898 | { |
| 899 | rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD); |
| 900 | rtx new; |
| 901 | |
| 902 | if (validate_address) |
| 903 | { |
| 904 | if (reload_completed) |
| 905 | { |
| 906 | if (! strict_memory_address_p (word_mode, addr)) |
| 907 | return 0; |
| 908 | } |
| 909 | else |
| 910 | addr = memory_address (word_mode, addr); |
| 911 | } |
| 912 | |
| 913 | new = gen_rtx (MEM, word_mode, addr); |
| 914 | |
| 915 | MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op); |
| 916 | MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op); |
| 917 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op); |
| 918 | |
| 919 | return new; |
| 920 | } |
| 921 | |
| 922 | /* The only remaining cases are when OP is a constant. If the host and |
| 923 | target floating formats are the same, handling two-word floating |
| 924 | constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE} |
| 925 | are defined as returning 32 bit and 64-bit values, respectively, |
| 926 | and not values of BITS_PER_WORD and 2 * BITS_PER_WORD bits. */ |
| 927 | #ifdef REAL_ARITHMETIC |
| 928 | if ((HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
| 929 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
| 930 | && GET_MODE_BITSIZE (mode) == 64 |
| 931 | && GET_CODE (op) == CONST_DOUBLE) |
| 932 | { |
| 933 | HOST_WIDE_INT k[2]; |
| 934 | REAL_VALUE_TYPE rv; |
| 935 | |
| 936 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); |
| 937 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); |
| 938 | |
| 939 | /* We handle 32-bit and 64-bit host words here. Note that the order in |
| 940 | which the words are written depends on the word endianness. |
| 941 | |
| 942 | ??? This is a potential portability problem and should |
| 943 | be fixed at some point. */ |
| 944 | if (HOST_BITS_PER_WIDE_INT == 32) |
| 945 | return GEN_INT (k[i]); |
| 946 | else if (HOST_BITS_PER_WIDE_INT == 64 && i == 0) |
| 947 | return GEN_INT ((k[! WORDS_BIG_ENDIAN] << (HOST_BITS_PER_WIDE_INT / 2)) |
| 948 | | k[WORDS_BIG_ENDIAN]); |
| 949 | else |
| 950 | abort (); |
| 951 | } |
| 952 | #else /* no REAL_ARITHMETIC */ |
| 953 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
| 954 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
| 955 | || flag_pretend_float) |
| 956 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
| 957 | && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD |
| 958 | && GET_CODE (op) == CONST_DOUBLE) |
| 959 | { |
| 960 | /* The constant is stored in the host's word-ordering, |
| 961 | but we want to access it in the target's word-ordering. Some |
| 962 | compilers don't like a conditional inside macro args, so we have two |
| 963 | copies of the return. */ |
| 964 | #ifdef HOST_WORDS_BIG_ENDIAN |
| 965 | return GEN_INT (i == WORDS_BIG_ENDIAN |
| 966 | ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); |
| 967 | #else |
| 968 | return GEN_INT (i != WORDS_BIG_ENDIAN |
| 969 | ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); |
| 970 | #endif |
| 971 | } |
| 972 | #endif /* no REAL_ARITHMETIC */ |
| 973 | |
| 974 | /* Single word float is a little harder, since single- and double-word |
| 975 | values often do not have the same high-order bits. We have already |
| 976 | verified that we want the only defined word of the single-word value. */ |
| 977 | #ifdef REAL_ARITHMETIC |
| 978 | if ((HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
| 979 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
| 980 | && GET_MODE_BITSIZE (mode) == 32 |
| 981 | && GET_CODE (op) == CONST_DOUBLE) |
| 982 | { |
| 983 | HOST_WIDE_INT l; |
| 984 | REAL_VALUE_TYPE rv; |
| 985 | |
| 986 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); |
| 987 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); |
| 988 | return GEN_INT (l); |
| 989 | } |
| 990 | #else |
| 991 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
| 992 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
| 993 | || flag_pretend_float) |
| 994 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
| 995 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD |
| 996 | && GET_CODE (op) == CONST_DOUBLE) |
| 997 | { |
| 998 | double d; |
| 999 | union {float f; HOST_WIDE_INT i; } u; |
| 1000 | |
| 1001 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); |
| 1002 | |
| 1003 | u.f = d; |
| 1004 | return GEN_INT (u.i); |
| 1005 | } |
| 1006 | #endif /* no REAL_ARITHMETIC */ |
| 1007 | |
| 1008 | /* The only remaining cases that we can handle are integers. |
| 1009 | Convert to proper endianness now since these cases need it. |
| 1010 | At this point, i == 0 means the low-order word. |
| 1011 | |
| 1012 | We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT |
| 1013 | in general. However, if OP is (const_int 0), we can just return |
| 1014 | it for any word. */ |
| 1015 | |
| 1016 | if (op == const0_rtx) |
| 1017 | return op; |
| 1018 | |
| 1019 | if (GET_MODE_CLASS (mode) != MODE_INT |
| 1020 | || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE) |
| 1021 | || BITS_PER_WORD > HOST_BITS_PER_INT) |
| 1022 | return 0; |
| 1023 | |
| 1024 | if (WORDS_BIG_ENDIAN) |
| 1025 | i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i; |
| 1026 | |
| 1027 | /* Find out which word on the host machine this value is in and get |
| 1028 | it from the constant. */ |
| 1029 | val = (i / size_ratio == 0 |
| 1030 | ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op)) |
| 1031 | : (GET_CODE (op) == CONST_INT |
| 1032 | ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op))); |
| 1033 | |
| 1034 | /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */ |
| 1035 | if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT) |
| 1036 | val = ((val >> ((i % size_ratio) * BITS_PER_WORD)) |
| 1037 | & (((HOST_WIDE_INT) 1 |
| 1038 | << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1)); |
| 1039 | |
| 1040 | return GEN_INT (val); |
| 1041 | } |
| 1042 | |
| 1043 | /* Similar to `operand_subword', but never return 0. If we can't extract |
| 1044 | the required subword, put OP into a register and try again. If that fails, |
| 1045 | abort. We always validate the address in this case. It is not valid |
| 1046 | to call this function after reload; it is mostly meant for RTL |
| 1047 | generation. |
| 1048 | |
| 1049 | MODE is the mode of OP, in case it is CONST_INT. */ |
| 1050 | |
| 1051 | rtx |
| 1052 | operand_subword_force (op, i, mode) |
| 1053 | rtx op; |
| 1054 | int i; |
| 1055 | enum machine_mode mode; |
| 1056 | { |
| 1057 | rtx result = operand_subword (op, i, 1, mode); |
| 1058 | |
| 1059 | if (result) |
| 1060 | return result; |
| 1061 | |
| 1062 | if (mode != BLKmode && mode != VOIDmode) |
| 1063 | op = force_reg (mode, op); |
| 1064 | |
| 1065 | result = operand_subword (op, i, 1, mode); |
| 1066 | if (result == 0) |
| 1067 | abort (); |
| 1068 | |
| 1069 | return result; |
| 1070 | } |
| 1071 | \f |
| 1072 | /* Given a compare instruction, swap the operands. |
| 1073 | A test instruction is changed into a compare of 0 against the operand. */ |
| 1074 | |
| 1075 | void |
| 1076 | reverse_comparison (insn) |
| 1077 | rtx insn; |
| 1078 | { |
| 1079 | rtx body = PATTERN (insn); |
| 1080 | rtx comp; |
| 1081 | |
| 1082 | if (GET_CODE (body) == SET) |
| 1083 | comp = SET_SRC (body); |
| 1084 | else |
| 1085 | comp = SET_SRC (XVECEXP (body, 0, 0)); |
| 1086 | |
| 1087 | if (GET_CODE (comp) == COMPARE) |
| 1088 | { |
| 1089 | rtx op0 = XEXP (comp, 0); |
| 1090 | rtx op1 = XEXP (comp, 1); |
| 1091 | XEXP (comp, 0) = op1; |
| 1092 | XEXP (comp, 1) = op0; |
| 1093 | } |
| 1094 | else |
| 1095 | { |
| 1096 | rtx new = gen_rtx (COMPARE, VOIDmode, |
| 1097 | CONST0_RTX (GET_MODE (comp)), comp); |
| 1098 | if (GET_CODE (body) == SET) |
| 1099 | SET_SRC (body) = new; |
| 1100 | else |
| 1101 | SET_SRC (XVECEXP (body, 0, 0)) = new; |
| 1102 | } |
| 1103 | } |
| 1104 | \f |
| 1105 | /* Return a memory reference like MEMREF, but with its mode changed |
| 1106 | to MODE and its address changed to ADDR. |
| 1107 | (VOIDmode means don't change the mode. |
| 1108 | NULL for ADDR means don't change the address.) */ |
| 1109 | |
| 1110 | rtx |
| 1111 | change_address (memref, mode, addr) |
| 1112 | rtx memref; |
| 1113 | enum machine_mode mode; |
| 1114 | rtx addr; |
| 1115 | { |
| 1116 | rtx new; |
| 1117 | |
| 1118 | if (GET_CODE (memref) != MEM) |
| 1119 | abort (); |
| 1120 | if (mode == VOIDmode) |
| 1121 | mode = GET_MODE (memref); |
| 1122 | if (addr == 0) |
| 1123 | addr = XEXP (memref, 0); |
| 1124 | |
| 1125 | /* If reload is in progress or has completed, ADDR must be valid. |
| 1126 | Otherwise, we can call memory_address to make it valid. */ |
| 1127 | if (reload_completed || reload_in_progress) |
| 1128 | { |
| 1129 | if (! memory_address_p (mode, addr)) |
| 1130 | abort (); |
| 1131 | } |
| 1132 | else |
| 1133 | addr = memory_address (mode, addr); |
| 1134 | |
| 1135 | new = gen_rtx (MEM, mode, addr); |
| 1136 | MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref); |
| 1137 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref); |
| 1138 | MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref); |
| 1139 | return new; |
| 1140 | } |
| 1141 | \f |
| 1142 | /* Return a newly created CODE_LABEL rtx with a unique label number. */ |
| 1143 | |
| 1144 | rtx |
| 1145 | gen_label_rtx () |
| 1146 | { |
| 1147 | register rtx label = gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0, |
| 1148 | label_num++, NULL_PTR); |
| 1149 | LABEL_NUSES (label) = 0; |
| 1150 | return label; |
| 1151 | } |
| 1152 | \f |
| 1153 | /* For procedure integration. */ |
| 1154 | |
| 1155 | /* Return a newly created INLINE_HEADER rtx. Should allocate this |
| 1156 | from a permanent obstack when the opportunity arises. */ |
| 1157 | |
| 1158 | rtx |
| 1159 | gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno, |
| 1160 | last_labelno, max_parm_regnum, max_regnum, args_size, |
| 1161 | pops_args, stack_slots, function_flags, |
| 1162 | outgoing_args_size, original_arg_vector, |
| 1163 | original_decl_initial) |
| 1164 | rtx first_insn, first_parm_insn; |
| 1165 | int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size; |
| 1166 | int pops_args; |
| 1167 | rtx stack_slots; |
| 1168 | int function_flags; |
| 1169 | int outgoing_args_size; |
| 1170 | rtvec original_arg_vector; |
| 1171 | rtx original_decl_initial; |
| 1172 | { |
| 1173 | rtx header = gen_rtx (INLINE_HEADER, VOIDmode, |
| 1174 | cur_insn_uid++, NULL_RTX, |
| 1175 | first_insn, first_parm_insn, |
| 1176 | first_labelno, last_labelno, |
| 1177 | max_parm_regnum, max_regnum, args_size, pops_args, |
| 1178 | stack_slots, function_flags, outgoing_args_size, |
| 1179 | original_arg_vector, original_decl_initial); |
| 1180 | return header; |
| 1181 | } |
| 1182 | |
| 1183 | /* Install new pointers to the first and last insns in the chain. |
| 1184 | Used for an inline-procedure after copying the insn chain. */ |
| 1185 | |
| 1186 | void |
| 1187 | set_new_first_and_last_insn (first, last) |
| 1188 | rtx first, last; |
| 1189 | { |
| 1190 | first_insn = first; |
| 1191 | last_insn = last; |
| 1192 | } |
| 1193 | |
| 1194 | /* Set the range of label numbers found in the current function. |
| 1195 | This is used when belatedly compiling an inline function. */ |
| 1196 | |
| 1197 | void |
| 1198 | set_new_first_and_last_label_num (first, last) |
| 1199 | int first, last; |
| 1200 | { |
| 1201 | base_label_num = label_num; |
| 1202 | first_label_num = first; |
| 1203 | last_label_num = last; |
| 1204 | } |
| 1205 | \f |
| 1206 | /* Save all variables describing the current status into the structure *P. |
| 1207 | This is used before starting a nested function. */ |
| 1208 | |
| 1209 | void |
| 1210 | save_emit_status (p) |
| 1211 | struct function *p; |
| 1212 | { |
| 1213 | p->reg_rtx_no = reg_rtx_no; |
| 1214 | p->first_label_num = first_label_num; |
| 1215 | p->first_insn = first_insn; |
| 1216 | p->last_insn = last_insn; |
| 1217 | p->sequence_stack = sequence_stack; |
| 1218 | p->cur_insn_uid = cur_insn_uid; |
| 1219 | p->last_linenum = last_linenum; |
| 1220 | p->last_filename = last_filename; |
| 1221 | p->regno_pointer_flag = regno_pointer_flag; |
| 1222 | p->regno_pointer_flag_length = regno_pointer_flag_length; |
| 1223 | p->regno_reg_rtx = regno_reg_rtx; |
| 1224 | } |
| 1225 | |
| 1226 | /* Restore all variables describing the current status from the structure *P. |
| 1227 | This is used after a nested function. */ |
| 1228 | |
| 1229 | void |
| 1230 | restore_emit_status (p) |
| 1231 | struct function *p; |
| 1232 | { |
| 1233 | int i; |
| 1234 | |
| 1235 | reg_rtx_no = p->reg_rtx_no; |
| 1236 | first_label_num = p->first_label_num; |
| 1237 | first_insn = p->first_insn; |
| 1238 | last_insn = p->last_insn; |
| 1239 | sequence_stack = p->sequence_stack; |
| 1240 | cur_insn_uid = p->cur_insn_uid; |
| 1241 | last_linenum = p->last_linenum; |
| 1242 | last_filename = p->last_filename; |
| 1243 | regno_pointer_flag = p->regno_pointer_flag; |
| 1244 | regno_pointer_flag_length = p->regno_pointer_flag_length; |
| 1245 | regno_reg_rtx = p->regno_reg_rtx; |
| 1246 | |
| 1247 | /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */ |
| 1248 | sequence_element_free_list = 0; |
| 1249 | for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) |
| 1250 | sequence_result[i] = 0; |
| 1251 | } |
| 1252 | \f |
| 1253 | /* Go through all the RTL insn bodies and copy any invalid shared structure. |
| 1254 | It does not work to do this twice, because the mark bits set here |
| 1255 | are not cleared afterwards. */ |
| 1256 | |
| 1257 | void |
| 1258 | unshare_all_rtl (insn) |
| 1259 | register rtx insn; |
| 1260 | { |
| 1261 | for (; insn; insn = NEXT_INSN (insn)) |
| 1262 | if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN |
| 1263 | || GET_CODE (insn) == CALL_INSN) |
| 1264 | { |
| 1265 | PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn)); |
| 1266 | REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn)); |
| 1267 | LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn)); |
| 1268 | } |
| 1269 | |
| 1270 | /* Make sure the addresses of stack slots found outside the insn chain |
| 1271 | (such as, in DECL_RTL of a variable) are not shared |
| 1272 | with the insn chain. |
| 1273 | |
| 1274 | This special care is necessary when the stack slot MEM does not |
| 1275 | actually appear in the insn chain. If it does appear, its address |
| 1276 | is unshared from all else at that point. */ |
| 1277 | |
| 1278 | copy_rtx_if_shared (stack_slot_list); |
| 1279 | } |
| 1280 | |
| 1281 | /* Mark ORIG as in use, and return a copy of it if it was already in use. |
| 1282 | Recursively does the same for subexpressions. */ |
| 1283 | |
| 1284 | rtx |
| 1285 | copy_rtx_if_shared (orig) |
| 1286 | rtx orig; |
| 1287 | { |
| 1288 | register rtx x = orig; |
| 1289 | register int i; |
| 1290 | register enum rtx_code code; |
| 1291 | register char *format_ptr; |
| 1292 | int copied = 0; |
| 1293 | |
| 1294 | if (x == 0) |
| 1295 | return 0; |
| 1296 | |
| 1297 | code = GET_CODE (x); |
| 1298 | |
| 1299 | /* These types may be freely shared. */ |
| 1300 | |
| 1301 | switch (code) |
| 1302 | { |
| 1303 | case REG: |
| 1304 | case QUEUED: |
| 1305 | case CONST_INT: |
| 1306 | case CONST_DOUBLE: |
| 1307 | case SYMBOL_REF: |
| 1308 | case CODE_LABEL: |
| 1309 | case PC: |
| 1310 | case CC0: |
| 1311 | case SCRATCH: |
| 1312 | /* SCRATCH must be shared because they represent distinct values. */ |
| 1313 | return x; |
| 1314 | |
| 1315 | case CONST: |
| 1316 | /* CONST can be shared if it contains a SYMBOL_REF. If it contains |
| 1317 | a LABEL_REF, it isn't sharable. */ |
| 1318 | if (GET_CODE (XEXP (x, 0)) == PLUS |
| 1319 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF |
| 1320 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT) |
| 1321 | return x; |
| 1322 | break; |
| 1323 | |
| 1324 | case INSN: |
| 1325 | case JUMP_INSN: |
| 1326 | case CALL_INSN: |
| 1327 | case NOTE: |
| 1328 | case LABEL_REF: |
| 1329 | case BARRIER: |
| 1330 | /* The chain of insns is not being copied. */ |
| 1331 | return x; |
| 1332 | |
| 1333 | case MEM: |
| 1334 | /* A MEM is allowed to be shared if its address is constant |
| 1335 | or is a constant plus one of the special registers. */ |
| 1336 | if (CONSTANT_ADDRESS_P (XEXP (x, 0)) |
| 1337 | || XEXP (x, 0) == virtual_stack_vars_rtx |
| 1338 | || XEXP (x, 0) == virtual_incoming_args_rtx) |
| 1339 | return x; |
| 1340 | |
| 1341 | if (GET_CODE (XEXP (x, 0)) == PLUS |
| 1342 | && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx |
| 1343 | || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx) |
| 1344 | && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1))) |
| 1345 | { |
| 1346 | /* This MEM can appear in more than one place, |
| 1347 | but its address better not be shared with anything else. */ |
| 1348 | if (! x->used) |
| 1349 | XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0)); |
| 1350 | x->used = 1; |
| 1351 | return x; |
| 1352 | } |
| 1353 | } |
| 1354 | |
| 1355 | /* This rtx may not be shared. If it has already been seen, |
| 1356 | replace it with a copy of itself. */ |
| 1357 | |
| 1358 | if (x->used) |
| 1359 | { |
| 1360 | register rtx copy; |
| 1361 | |
| 1362 | copy = rtx_alloc (code); |
| 1363 | bcopy (x, copy, (sizeof (*copy) - sizeof (copy->fld) |
| 1364 | + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code))); |
| 1365 | x = copy; |
| 1366 | copied = 1; |
| 1367 | } |
| 1368 | x->used = 1; |
| 1369 | |
| 1370 | /* Now scan the subexpressions recursively. |
| 1371 | We can store any replaced subexpressions directly into X |
| 1372 | since we know X is not shared! Any vectors in X |
| 1373 | must be copied if X was copied. */ |
| 1374 | |
| 1375 | format_ptr = GET_RTX_FORMAT (code); |
| 1376 | |
| 1377 | for (i = 0; i < GET_RTX_LENGTH (code); i++) |
| 1378 | { |
| 1379 | switch (*format_ptr++) |
| 1380 | { |
| 1381 | case 'e': |
| 1382 | XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i)); |
| 1383 | break; |
| 1384 | |
| 1385 | case 'E': |
| 1386 | if (XVEC (x, i) != NULL) |
| 1387 | { |
| 1388 | register int j; |
| 1389 | |
| 1390 | if (copied) |
| 1391 | XVEC (x, i) = gen_rtvec_v (XVECLEN (x, i), &XVECEXP (x, i, 0)); |
| 1392 | for (j = 0; j < XVECLEN (x, i); j++) |
| 1393 | XVECEXP (x, i, j) |
| 1394 | = copy_rtx_if_shared (XVECEXP (x, i, j)); |
| 1395 | } |
| 1396 | break; |
| 1397 | } |
| 1398 | } |
| 1399 | return x; |
| 1400 | } |
| 1401 | |
| 1402 | /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used |
| 1403 | to look for shared sub-parts. */ |
| 1404 | |
| 1405 | void |
| 1406 | reset_used_flags (x) |
| 1407 | rtx x; |
| 1408 | { |
| 1409 | register int i, j; |
| 1410 | register enum rtx_code code; |
| 1411 | register char *format_ptr; |
| 1412 | int copied = 0; |
| 1413 | |
| 1414 | if (x == 0) |
| 1415 | return; |
| 1416 | |
| 1417 | code = GET_CODE (x); |
| 1418 | |
| 1419 | /* These types may be freely shared so we needn't do any reseting |
| 1420 | for them. */ |
| 1421 | |
| 1422 | switch (code) |
| 1423 | { |
| 1424 | case REG: |
| 1425 | case QUEUED: |
| 1426 | case CONST_INT: |
| 1427 | case CONST_DOUBLE: |
| 1428 | case SYMBOL_REF: |
| 1429 | case CODE_LABEL: |
| 1430 | case PC: |
| 1431 | case CC0: |
| 1432 | return; |
| 1433 | |
| 1434 | case INSN: |
| 1435 | case JUMP_INSN: |
| 1436 | case CALL_INSN: |
| 1437 | case NOTE: |
| 1438 | case LABEL_REF: |
| 1439 | case BARRIER: |
| 1440 | /* The chain of insns is not being copied. */ |
| 1441 | return; |
| 1442 | } |
| 1443 | |
| 1444 | x->used = 0; |
| 1445 | |
| 1446 | format_ptr = GET_RTX_FORMAT (code); |
| 1447 | for (i = 0; i < GET_RTX_LENGTH (code); i++) |
| 1448 | { |
| 1449 | switch (*format_ptr++) |
| 1450 | { |
| 1451 | case 'e': |
| 1452 | reset_used_flags (XEXP (x, i)); |
| 1453 | break; |
| 1454 | |
| 1455 | case 'E': |
| 1456 | for (j = 0; j < XVECLEN (x, i); j++) |
| 1457 | reset_used_flags (XVECEXP (x, i, j)); |
| 1458 | break; |
| 1459 | } |
| 1460 | } |
| 1461 | } |
| 1462 | \f |
| 1463 | /* Copy X if necessary so that it won't be altered by changes in OTHER. |
| 1464 | Return X or the rtx for the pseudo reg the value of X was copied into. |
| 1465 | OTHER must be valid as a SET_DEST. */ |
| 1466 | |
| 1467 | rtx |
| 1468 | make_safe_from (x, other) |
| 1469 | rtx x, other; |
| 1470 | { |
| 1471 | while (1) |
| 1472 | switch (GET_CODE (other)) |
| 1473 | { |
| 1474 | case SUBREG: |
| 1475 | other = SUBREG_REG (other); |
| 1476 | break; |
| 1477 | case STRICT_LOW_PART: |
| 1478 | case SIGN_EXTEND: |
| 1479 | case ZERO_EXTEND: |
| 1480 | other = XEXP (other, 0); |
| 1481 | break; |
| 1482 | default: |
| 1483 | goto done; |
| 1484 | } |
| 1485 | done: |
| 1486 | if ((GET_CODE (other) == MEM |
| 1487 | && ! CONSTANT_P (x) |
| 1488 | && GET_CODE (x) != REG |
| 1489 | && GET_CODE (x) != SUBREG) |
| 1490 | || (GET_CODE (other) == REG |
| 1491 | && (REGNO (other) < FIRST_PSEUDO_REGISTER |
| 1492 | || reg_mentioned_p (other, x)))) |
| 1493 | { |
| 1494 | rtx temp = gen_reg_rtx (GET_MODE (x)); |
| 1495 | emit_move_insn (temp, x); |
| 1496 | return temp; |
| 1497 | } |
| 1498 | return x; |
| 1499 | } |
| 1500 | \f |
| 1501 | /* Emission of insns (adding them to the doubly-linked list). */ |
| 1502 | |
| 1503 | /* Return the first insn of the current sequence or current function. */ |
| 1504 | |
| 1505 | rtx |
| 1506 | get_insns () |
| 1507 | { |
| 1508 | return first_insn; |
| 1509 | } |
| 1510 | |
| 1511 | /* Return the last insn emitted in current sequence or current function. */ |
| 1512 | |
| 1513 | rtx |
| 1514 | get_last_insn () |
| 1515 | { |
| 1516 | return last_insn; |
| 1517 | } |
| 1518 | |
| 1519 | /* Specify a new insn as the last in the chain. */ |
| 1520 | |
| 1521 | void |
| 1522 | set_last_insn (insn) |
| 1523 | rtx insn; |
| 1524 | { |
| 1525 | if (NEXT_INSN (insn) != 0) |
| 1526 | abort (); |
| 1527 | last_insn = insn; |
| 1528 | } |
| 1529 | |
| 1530 | /* Return the last insn emitted, even if it is in a sequence now pushed. */ |
| 1531 | |
| 1532 | rtx |
| 1533 | get_last_insn_anywhere () |
| 1534 | { |
| 1535 | struct sequence_stack *stack; |
| 1536 | if (last_insn) |
| 1537 | return last_insn; |
| 1538 | for (stack = sequence_stack; stack; stack = stack->next) |
| 1539 | if (stack->last != 0) |
| 1540 | return stack->last; |
| 1541 | return 0; |
| 1542 | } |
| 1543 | |
| 1544 | /* Return a number larger than any instruction's uid in this function. */ |
| 1545 | |
| 1546 | int |
| 1547 | get_max_uid () |
| 1548 | { |
| 1549 | return cur_insn_uid; |
| 1550 | } |
| 1551 | \f |
| 1552 | /* Return the next insn. If it is a SEQUENCE, return the first insn |
| 1553 | of the sequence. */ |
| 1554 | |
| 1555 | rtx |
| 1556 | next_insn (insn) |
| 1557 | rtx insn; |
| 1558 | { |
| 1559 | if (insn) |
| 1560 | { |
| 1561 | insn = NEXT_INSN (insn); |
| 1562 | if (insn && GET_CODE (insn) == INSN |
| 1563 | && GET_CODE (PATTERN (insn)) == SEQUENCE) |
| 1564 | insn = XVECEXP (PATTERN (insn), 0, 0); |
| 1565 | } |
| 1566 | |
| 1567 | return insn; |
| 1568 | } |
| 1569 | |
| 1570 | /* Return the previous insn. If it is a SEQUENCE, return the last insn |
| 1571 | of the sequence. */ |
| 1572 | |
| 1573 | rtx |
| 1574 | previous_insn (insn) |
| 1575 | rtx insn; |
| 1576 | { |
| 1577 | if (insn) |
| 1578 | { |
| 1579 | insn = PREV_INSN (insn); |
| 1580 | if (insn && GET_CODE (insn) == INSN |
| 1581 | && GET_CODE (PATTERN (insn)) == SEQUENCE) |
| 1582 | insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1); |
| 1583 | } |
| 1584 | |
| 1585 | return insn; |
| 1586 | } |
| 1587 | |
| 1588 | /* Return the next insn after INSN that is not a NOTE. This routine does not |
| 1589 | look inside SEQUENCEs. */ |
| 1590 | |
| 1591 | rtx |
| 1592 | next_nonnote_insn (insn) |
| 1593 | rtx insn; |
| 1594 | { |
| 1595 | while (insn) |
| 1596 | { |
| 1597 | insn = NEXT_INSN (insn); |
| 1598 | if (insn == 0 || GET_CODE (insn) != NOTE) |
| 1599 | break; |
| 1600 | } |
| 1601 | |
| 1602 | return insn; |
| 1603 | } |
| 1604 | |
| 1605 | /* Return the previous insn before INSN that is not a NOTE. This routine does |
| 1606 | not look inside SEQUENCEs. */ |
| 1607 | |
| 1608 | rtx |
| 1609 | prev_nonnote_insn (insn) |
| 1610 | rtx insn; |
| 1611 | { |
| 1612 | while (insn) |
| 1613 | { |
| 1614 | insn = PREV_INSN (insn); |
| 1615 | if (insn == 0 || GET_CODE (insn) != NOTE) |
| 1616 | break; |
| 1617 | } |
| 1618 | |
| 1619 | return insn; |
| 1620 | } |
| 1621 | |
| 1622 | /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN; |
| 1623 | or 0, if there is none. This routine does not look inside |
| 1624 | SEQUENCEs. */ |
| 1625 | |
| 1626 | rtx |
| 1627 | next_real_insn (insn) |
| 1628 | rtx insn; |
| 1629 | { |
| 1630 | while (insn) |
| 1631 | { |
| 1632 | insn = NEXT_INSN (insn); |
| 1633 | if (insn == 0 || GET_CODE (insn) == INSN |
| 1634 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN) |
| 1635 | break; |
| 1636 | } |
| 1637 | |
| 1638 | return insn; |
| 1639 | } |
| 1640 | |
| 1641 | /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN; |
| 1642 | or 0, if there is none. This routine does not look inside |
| 1643 | SEQUENCEs. */ |
| 1644 | |
| 1645 | rtx |
| 1646 | prev_real_insn (insn) |
| 1647 | rtx insn; |
| 1648 | { |
| 1649 | while (insn) |
| 1650 | { |
| 1651 | insn = PREV_INSN (insn); |
| 1652 | if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN |
| 1653 | || GET_CODE (insn) == JUMP_INSN) |
| 1654 | break; |
| 1655 | } |
| 1656 | |
| 1657 | return insn; |
| 1658 | } |
| 1659 | |
| 1660 | /* Find the next insn after INSN that really does something. This routine |
| 1661 | does not look inside SEQUENCEs. Until reload has completed, this is the |
| 1662 | same as next_real_insn. */ |
| 1663 | |
| 1664 | rtx |
| 1665 | next_active_insn (insn) |
| 1666 | rtx insn; |
| 1667 | { |
| 1668 | while (insn) |
| 1669 | { |
| 1670 | insn = NEXT_INSN (insn); |
| 1671 | if (insn == 0 |
| 1672 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN |
| 1673 | || (GET_CODE (insn) == INSN |
| 1674 | && (! reload_completed |
| 1675 | || (GET_CODE (PATTERN (insn)) != USE |
| 1676 | && GET_CODE (PATTERN (insn)) != CLOBBER)))) |
| 1677 | break; |
| 1678 | } |
| 1679 | |
| 1680 | return insn; |
| 1681 | } |
| 1682 | |
| 1683 | /* Find the last insn before INSN that really does something. This routine |
| 1684 | does not look inside SEQUENCEs. Until reload has completed, this is the |
| 1685 | same as prev_real_insn. */ |
| 1686 | |
| 1687 | rtx |
| 1688 | prev_active_insn (insn) |
| 1689 | rtx insn; |
| 1690 | { |
| 1691 | while (insn) |
| 1692 | { |
| 1693 | insn = PREV_INSN (insn); |
| 1694 | if (insn == 0 |
| 1695 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN |
| 1696 | || (GET_CODE (insn) == INSN |
| 1697 | && (! reload_completed |
| 1698 | || (GET_CODE (PATTERN (insn)) != USE |
| 1699 | && GET_CODE (PATTERN (insn)) != CLOBBER)))) |
| 1700 | break; |
| 1701 | } |
| 1702 | |
| 1703 | return insn; |
| 1704 | } |
| 1705 | |
| 1706 | /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */ |
| 1707 | |
| 1708 | rtx |
| 1709 | next_label (insn) |
| 1710 | rtx insn; |
| 1711 | { |
| 1712 | while (insn) |
| 1713 | { |
| 1714 | insn = NEXT_INSN (insn); |
| 1715 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) |
| 1716 | break; |
| 1717 | } |
| 1718 | |
| 1719 | return insn; |
| 1720 | } |
| 1721 | |
| 1722 | /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */ |
| 1723 | |
| 1724 | rtx |
| 1725 | prev_label (insn) |
| 1726 | rtx insn; |
| 1727 | { |
| 1728 | while (insn) |
| 1729 | { |
| 1730 | insn = PREV_INSN (insn); |
| 1731 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) |
| 1732 | break; |
| 1733 | } |
| 1734 | |
| 1735 | return insn; |
| 1736 | } |
| 1737 | \f |
| 1738 | #ifdef HAVE_cc0 |
| 1739 | /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER |
| 1740 | and REG_CC_USER notes so we can find it. */ |
| 1741 | |
| 1742 | void |
| 1743 | link_cc0_insns (insn) |
| 1744 | rtx insn; |
| 1745 | { |
| 1746 | rtx user = next_nonnote_insn (insn); |
| 1747 | |
| 1748 | if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE) |
| 1749 | user = XVECEXP (PATTERN (user), 0, 0); |
| 1750 | |
| 1751 | REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn, |
| 1752 | REG_NOTES (user)); |
| 1753 | REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn)); |
| 1754 | } |
| 1755 | |
| 1756 | /* Return the next insn that uses CC0 after INSN, which is assumed to |
| 1757 | set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter |
| 1758 | applied to the result of this function should yield INSN). |
| 1759 | |
| 1760 | Normally, this is simply the next insn. However, if a REG_CC_USER note |
| 1761 | is present, it contains the insn that uses CC0. |
| 1762 | |
| 1763 | Return 0 if we can't find the insn. */ |
| 1764 | |
| 1765 | rtx |
| 1766 | next_cc0_user (insn) |
| 1767 | rtx insn; |
| 1768 | { |
| 1769 | rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX); |
| 1770 | |
| 1771 | if (note) |
| 1772 | return XEXP (note, 0); |
| 1773 | |
| 1774 | insn = next_nonnote_insn (insn); |
| 1775 | if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) |
| 1776 | insn = XVECEXP (PATTERN (insn), 0, 0); |
| 1777 | |
| 1778 | if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i' |
| 1779 | && reg_mentioned_p (cc0_rtx, PATTERN (insn))) |
| 1780 | return insn; |
| 1781 | |
| 1782 | return 0; |
| 1783 | } |
| 1784 | |
| 1785 | /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER |
| 1786 | note, it is the previous insn. */ |
| 1787 | |
| 1788 | rtx |
| 1789 | prev_cc0_setter (insn) |
| 1790 | rtx insn; |
| 1791 | { |
| 1792 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
| 1793 | rtx link; |
| 1794 | |
| 1795 | if (note) |
| 1796 | return XEXP (note, 0); |
| 1797 | |
| 1798 | insn = prev_nonnote_insn (insn); |
| 1799 | if (! sets_cc0_p (PATTERN (insn))) |
| 1800 | abort (); |
| 1801 | |
| 1802 | return insn; |
| 1803 | } |
| 1804 | #endif |
| 1805 | \f |
| 1806 | /* Try splitting insns that can be split for better scheduling. |
| 1807 | PAT is the pattern which might split. |
| 1808 | TRIAL is the insn providing PAT. |
| 1809 | BACKWARDS is non-zero if we are scanning insns from last to first. |
| 1810 | |
| 1811 | If this routine succeeds in splitting, it returns the first or last |
| 1812 | replacement insn depending on the value of BACKWARDS. Otherwise, it |
| 1813 | returns TRIAL. If the insn to be returned can be split, it will be. */ |
| 1814 | |
| 1815 | rtx |
| 1816 | try_split (pat, trial, backwards) |
| 1817 | rtx pat, trial; |
| 1818 | int backwards; |
| 1819 | { |
| 1820 | rtx before = PREV_INSN (trial); |
| 1821 | rtx after = NEXT_INSN (trial); |
| 1822 | rtx seq = split_insns (pat, trial); |
| 1823 | int has_barrier = 0; |
| 1824 | rtx tem; |
| 1825 | |
| 1826 | /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER. |
| 1827 | We may need to handle this specially. */ |
| 1828 | if (after && GET_CODE (after) == BARRIER) |
| 1829 | { |
| 1830 | has_barrier = 1; |
| 1831 | after = NEXT_INSN (after); |
| 1832 | } |
| 1833 | |
| 1834 | if (seq) |
| 1835 | { |
| 1836 | /* SEQ can either be a SEQUENCE or the pattern of a single insn. |
| 1837 | The latter case will normally arise only when being done so that |
| 1838 | it, in turn, will be split (SFmode on the 29k is an example). */ |
| 1839 | if (GET_CODE (seq) == SEQUENCE) |
| 1840 | { |
| 1841 | /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in |
| 1842 | SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero, |
| 1843 | increment the usage count so we don't delete the label. */ |
| 1844 | int i; |
| 1845 | |
| 1846 | if (GET_CODE (trial) == JUMP_INSN) |
| 1847 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) |
| 1848 | if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN) |
| 1849 | { |
| 1850 | JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial); |
| 1851 | |
| 1852 | if (JUMP_LABEL (trial)) |
| 1853 | LABEL_NUSES (JUMP_LABEL (trial))++; |
| 1854 | } |
| 1855 | |
| 1856 | tem = emit_insn_after (seq, before); |
| 1857 | |
| 1858 | delete_insn (trial); |
| 1859 | if (has_barrier) |
| 1860 | emit_barrier_after (tem); |
| 1861 | } |
| 1862 | /* Avoid infinite loop if the result matches the original pattern. */ |
| 1863 | else if (rtx_equal_p (seq, pat)) |
| 1864 | return trial; |
| 1865 | else |
| 1866 | { |
| 1867 | PATTERN (trial) = seq; |
| 1868 | INSN_CODE (trial) = -1; |
| 1869 | } |
| 1870 | |
| 1871 | /* Set TEM to the insn we should return. */ |
| 1872 | tem = backwards ? prev_active_insn (after) : next_active_insn (before); |
| 1873 | return try_split (PATTERN (tem), tem, backwards); |
| 1874 | } |
| 1875 | |
| 1876 | return trial; |
| 1877 | } |
| 1878 | \f |
| 1879 | /* Make and return an INSN rtx, initializing all its slots. |
| 1880 | Store PATTERN in the pattern slots. */ |
| 1881 | |
| 1882 | rtx |
| 1883 | make_insn_raw (pattern) |
| 1884 | rtx pattern; |
| 1885 | { |
| 1886 | register rtx insn; |
| 1887 | |
| 1888 | insn = rtx_alloc (INSN); |
| 1889 | INSN_UID (insn) = cur_insn_uid++; |
| 1890 | |
| 1891 | PATTERN (insn) = pattern; |
| 1892 | INSN_CODE (insn) = -1; |
| 1893 | LOG_LINKS (insn) = NULL; |
| 1894 | REG_NOTES (insn) = NULL; |
| 1895 | |
| 1896 | return insn; |
| 1897 | } |
| 1898 | |
| 1899 | /* Like `make_insn' but make a JUMP_INSN instead of an insn. */ |
| 1900 | |
| 1901 | static rtx |
| 1902 | make_jump_insn_raw (pattern) |
| 1903 | rtx pattern; |
| 1904 | { |
| 1905 | register rtx insn; |
| 1906 | |
| 1907 | insn = rtx_alloc (JUMP_INSN); |
| 1908 | INSN_UID (insn) = cur_insn_uid++; |
| 1909 | |
| 1910 | PATTERN (insn) = pattern; |
| 1911 | INSN_CODE (insn) = -1; |
| 1912 | LOG_LINKS (insn) = NULL; |
| 1913 | REG_NOTES (insn) = NULL; |
| 1914 | JUMP_LABEL (insn) = NULL; |
| 1915 | |
| 1916 | return insn; |
| 1917 | } |
| 1918 | \f |
| 1919 | /* Add INSN to the end of the doubly-linked list. |
| 1920 | INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */ |
| 1921 | |
| 1922 | void |
| 1923 | add_insn (insn) |
| 1924 | register rtx insn; |
| 1925 | { |
| 1926 | PREV_INSN (insn) = last_insn; |
| 1927 | NEXT_INSN (insn) = 0; |
| 1928 | |
| 1929 | if (NULL != last_insn) |
| 1930 | NEXT_INSN (last_insn) = insn; |
| 1931 | |
| 1932 | if (NULL == first_insn) |
| 1933 | first_insn = insn; |
| 1934 | |
| 1935 | last_insn = insn; |
| 1936 | } |
| 1937 | |
| 1938 | /* Add INSN into the doubly-linked list after insn AFTER. This should be the |
| 1939 | only function called to insert an insn once delay slots have been filled |
| 1940 | since only it knows how to update a SEQUENCE. */ |
| 1941 | |
| 1942 | void |
| 1943 | add_insn_after (insn, after) |
| 1944 | rtx insn, after; |
| 1945 | { |
| 1946 | rtx next = NEXT_INSN (after); |
| 1947 | |
| 1948 | NEXT_INSN (insn) = next; |
| 1949 | PREV_INSN (insn) = after; |
| 1950 | |
| 1951 | if (next) |
| 1952 | { |
| 1953 | PREV_INSN (next) = insn; |
| 1954 | if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE) |
| 1955 | PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn; |
| 1956 | } |
| 1957 | else if (last_insn == after) |
| 1958 | last_insn = insn; |
| 1959 | else |
| 1960 | { |
| 1961 | struct sequence_stack *stack = sequence_stack; |
| 1962 | /* Scan all pending sequences too. */ |
| 1963 | for (; stack; stack = stack->next) |
| 1964 | if (after == stack->last) |
| 1965 | stack->last = insn; |
| 1966 | } |
| 1967 | |
| 1968 | NEXT_INSN (after) = insn; |
| 1969 | if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE) |
| 1970 | { |
| 1971 | rtx sequence = PATTERN (after); |
| 1972 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn; |
| 1973 | } |
| 1974 | } |
| 1975 | |
| 1976 | /* Delete all insns made since FROM. |
| 1977 | FROM becomes the new last instruction. */ |
| 1978 | |
| 1979 | void |
| 1980 | delete_insns_since (from) |
| 1981 | rtx from; |
| 1982 | { |
| 1983 | if (from == 0) |
| 1984 | first_insn = 0; |
| 1985 | else |
| 1986 | NEXT_INSN (from) = 0; |
| 1987 | last_insn = from; |
| 1988 | } |
| 1989 | |
| 1990 | /* Move a consecutive bunch of insns to a different place in the chain. |
| 1991 | The insns to be moved are those between FROM and TO. |
| 1992 | They are moved to a new position after the insn AFTER. |
| 1993 | AFTER must not be FROM or TO or any insn in between. |
| 1994 | |
| 1995 | This function does not know about SEQUENCEs and hence should not be |
| 1996 | called after delay-slot filling has been done. */ |
| 1997 | |
| 1998 | void |
| 1999 | reorder_insns (from, to, after) |
| 2000 | rtx from, to, after; |
| 2001 | { |
| 2002 | /* Splice this bunch out of where it is now. */ |
| 2003 | if (PREV_INSN (from)) |
| 2004 | NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to); |
| 2005 | if (NEXT_INSN (to)) |
| 2006 | PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from); |
| 2007 | if (last_insn == to) |
| 2008 | last_insn = PREV_INSN (from); |
| 2009 | if (first_insn == from) |
| 2010 | first_insn = NEXT_INSN (to); |
| 2011 | |
| 2012 | /* Make the new neighbors point to it and it to them. */ |
| 2013 | if (NEXT_INSN (after)) |
| 2014 | PREV_INSN (NEXT_INSN (after)) = to; |
| 2015 | |
| 2016 | NEXT_INSN (to) = NEXT_INSN (after); |
| 2017 | PREV_INSN (from) = after; |
| 2018 | NEXT_INSN (after) = from; |
| 2019 | if (after == last_insn) |
| 2020 | last_insn = to; |
| 2021 | } |
| 2022 | |
| 2023 | /* Return the line note insn preceding INSN. */ |
| 2024 | |
| 2025 | static rtx |
| 2026 | find_line_note (insn) |
| 2027 | rtx insn; |
| 2028 | { |
| 2029 | if (no_line_numbers) |
| 2030 | return 0; |
| 2031 | |
| 2032 | for (; insn; insn = PREV_INSN (insn)) |
| 2033 | if (GET_CODE (insn) == NOTE |
| 2034 | && NOTE_LINE_NUMBER (insn) >= 0) |
| 2035 | break; |
| 2036 | |
| 2037 | return insn; |
| 2038 | } |
| 2039 | |
| 2040 | /* Like reorder_insns, but inserts line notes to preserve the line numbers |
| 2041 | of the moved insns when debugging. This may insert a note between AFTER |
| 2042 | and FROM, and another one after TO. */ |
| 2043 | |
| 2044 | void |
| 2045 | reorder_insns_with_line_notes (from, to, after) |
| 2046 | rtx from, to, after; |
| 2047 | { |
| 2048 | rtx from_line = find_line_note (from); |
| 2049 | rtx after_line = find_line_note (after); |
| 2050 | |
| 2051 | reorder_insns (from, to, after); |
| 2052 | |
| 2053 | if (from_line == after_line) |
| 2054 | return; |
| 2055 | |
| 2056 | if (from_line) |
| 2057 | emit_line_note_after (NOTE_SOURCE_FILE (from_line), |
| 2058 | NOTE_LINE_NUMBER (from_line), |
| 2059 | after); |
| 2060 | if (after_line) |
| 2061 | emit_line_note_after (NOTE_SOURCE_FILE (after_line), |
| 2062 | NOTE_LINE_NUMBER (after_line), |
| 2063 | to); |
| 2064 | } |
| 2065 | \f |
| 2066 | /* Emit an insn of given code and pattern |
| 2067 | at a specified place within the doubly-linked list. */ |
| 2068 | |
| 2069 | /* Make an instruction with body PATTERN |
| 2070 | and output it before the instruction BEFORE. */ |
| 2071 | |
| 2072 | rtx |
| 2073 | emit_insn_before (pattern, before) |
| 2074 | register rtx pattern, before; |
| 2075 | { |
| 2076 | register rtx insn = before; |
| 2077 | |
| 2078 | if (GET_CODE (pattern) == SEQUENCE) |
| 2079 | { |
| 2080 | register int i; |
| 2081 | |
| 2082 | for (i = 0; i < XVECLEN (pattern, 0); i++) |
| 2083 | { |
| 2084 | insn = XVECEXP (pattern, 0, i); |
| 2085 | add_insn_after (insn, PREV_INSN (before)); |
| 2086 | } |
| 2087 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) |
| 2088 | sequence_result[XVECLEN (pattern, 0)] = pattern; |
| 2089 | } |
| 2090 | else |
| 2091 | { |
| 2092 | insn = make_insn_raw (pattern); |
| 2093 | add_insn_after (insn, PREV_INSN (before)); |
| 2094 | } |
| 2095 | |
| 2096 | return insn; |
| 2097 | } |
| 2098 | |
| 2099 | /* Make an instruction with body PATTERN and code JUMP_INSN |
| 2100 | and output it before the instruction BEFORE. */ |
| 2101 | |
| 2102 | rtx |
| 2103 | emit_jump_insn_before (pattern, before) |
| 2104 | register rtx pattern, before; |
| 2105 | { |
| 2106 | register rtx insn; |
| 2107 | |
| 2108 | if (GET_CODE (pattern) == SEQUENCE) |
| 2109 | insn = emit_insn_before (pattern, before); |
| 2110 | else |
| 2111 | { |
| 2112 | insn = make_jump_insn_raw (pattern); |
| 2113 | add_insn_after (insn, PREV_INSN (before)); |
| 2114 | } |
| 2115 | |
| 2116 | return insn; |
| 2117 | } |
| 2118 | |
| 2119 | /* Make an instruction with body PATTERN and code CALL_INSN |
| 2120 | and output it before the instruction BEFORE. */ |
| 2121 | |
| 2122 | rtx |
| 2123 | emit_call_insn_before (pattern, before) |
| 2124 | register rtx pattern, before; |
| 2125 | { |
| 2126 | rtx insn = emit_insn_before (pattern, before); |
| 2127 | PUT_CODE (insn, CALL_INSN); |
| 2128 | return insn; |
| 2129 | } |
| 2130 | |
| 2131 | /* Make an insn of code BARRIER |
| 2132 | and output it before the insn AFTER. */ |
| 2133 | |
| 2134 | rtx |
| 2135 | emit_barrier_before (before) |
| 2136 | register rtx before; |
| 2137 | { |
| 2138 | register rtx insn = rtx_alloc (BARRIER); |
| 2139 | |
| 2140 | INSN_UID (insn) = cur_insn_uid++; |
| 2141 | |
| 2142 | add_insn_after (insn, PREV_INSN (before)); |
| 2143 | return insn; |
| 2144 | } |
| 2145 | |
| 2146 | /* Emit a note of subtype SUBTYPE before the insn BEFORE. */ |
| 2147 | |
| 2148 | rtx |
| 2149 | emit_note_before (subtype, before) |
| 2150 | int subtype; |
| 2151 | rtx before; |
| 2152 | { |
| 2153 | register rtx note = rtx_alloc (NOTE); |
| 2154 | INSN_UID (note) = cur_insn_uid++; |
| 2155 | NOTE_SOURCE_FILE (note) = 0; |
| 2156 | NOTE_LINE_NUMBER (note) = subtype; |
| 2157 | |
| 2158 | add_insn_after (note, PREV_INSN (before)); |
| 2159 | return note; |
| 2160 | } |
| 2161 | \f |
| 2162 | /* Make an insn of code INSN with body PATTERN |
| 2163 | and output it after the insn AFTER. */ |
| 2164 | |
| 2165 | rtx |
| 2166 | emit_insn_after (pattern, after) |
| 2167 | register rtx pattern, after; |
| 2168 | { |
| 2169 | register rtx insn = after; |
| 2170 | |
| 2171 | if (GET_CODE (pattern) == SEQUENCE) |
| 2172 | { |
| 2173 | register int i; |
| 2174 | |
| 2175 | for (i = 0; i < XVECLEN (pattern, 0); i++) |
| 2176 | { |
| 2177 | insn = XVECEXP (pattern, 0, i); |
| 2178 | add_insn_after (insn, after); |
| 2179 | after = insn; |
| 2180 | } |
| 2181 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) |
| 2182 | sequence_result[XVECLEN (pattern, 0)] = pattern; |
| 2183 | } |
| 2184 | else |
| 2185 | { |
| 2186 | insn = make_insn_raw (pattern); |
| 2187 | add_insn_after (insn, after); |
| 2188 | } |
| 2189 | |
| 2190 | return insn; |
| 2191 | } |
| 2192 | |
| 2193 | /* Similar to emit_insn_after, except that line notes are to be inserted so |
| 2194 | as to act as if this insn were at FROM. */ |
| 2195 | |
| 2196 | void |
| 2197 | emit_insn_after_with_line_notes (pattern, after, from) |
| 2198 | rtx pattern, after, from; |
| 2199 | { |
| 2200 | rtx from_line = find_line_note (from); |
| 2201 | rtx after_line = find_line_note (after); |
| 2202 | rtx insn = emit_insn_after (pattern, after); |
| 2203 | |
| 2204 | if (from_line) |
| 2205 | emit_line_note_after (NOTE_SOURCE_FILE (from_line), |
| 2206 | NOTE_LINE_NUMBER (from_line), |
| 2207 | after); |
| 2208 | |
| 2209 | if (after_line) |
| 2210 | emit_line_note_after (NOTE_SOURCE_FILE (after_line), |
| 2211 | NOTE_LINE_NUMBER (after_line), |
| 2212 | insn); |
| 2213 | } |
| 2214 | |
| 2215 | /* Make an insn of code JUMP_INSN with body PATTERN |
| 2216 | and output it after the insn AFTER. */ |
| 2217 | |
| 2218 | rtx |
| 2219 | emit_jump_insn_after (pattern, after) |
| 2220 | register rtx pattern, after; |
| 2221 | { |
| 2222 | register rtx insn; |
| 2223 | |
| 2224 | if (GET_CODE (pattern) == SEQUENCE) |
| 2225 | insn = emit_insn_after (pattern, after); |
| 2226 | else |
| 2227 | { |
| 2228 | insn = make_jump_insn_raw (pattern); |
| 2229 | add_insn_after (insn, after); |
| 2230 | } |
| 2231 | |
| 2232 | return insn; |
| 2233 | } |
| 2234 | |
| 2235 | /* Make an insn of code BARRIER |
| 2236 | and output it after the insn AFTER. */ |
| 2237 | |
| 2238 | rtx |
| 2239 | emit_barrier_after (after) |
| 2240 | register rtx after; |
| 2241 | { |
| 2242 | register rtx insn = rtx_alloc (BARRIER); |
| 2243 | |
| 2244 | INSN_UID (insn) = cur_insn_uid++; |
| 2245 | |
| 2246 | add_insn_after (insn, after); |
| 2247 | return insn; |
| 2248 | } |
| 2249 | |
| 2250 | /* Emit the label LABEL after the insn AFTER. */ |
| 2251 | |
| 2252 | rtx |
| 2253 | emit_label_after (label, after) |
| 2254 | rtx label, after; |
| 2255 | { |
| 2256 | /* This can be called twice for the same label |
| 2257 | as a result of the confusion that follows a syntax error! |
| 2258 | So make it harmless. */ |
| 2259 | if (INSN_UID (label) == 0) |
| 2260 | { |
| 2261 | INSN_UID (label) = cur_insn_uid++; |
| 2262 | add_insn_after (label, after); |
| 2263 | } |
| 2264 | |
| 2265 | return label; |
| 2266 | } |
| 2267 | |
| 2268 | /* Emit a note of subtype SUBTYPE after the insn AFTER. */ |
| 2269 | |
| 2270 | rtx |
| 2271 | emit_note_after (subtype, after) |
| 2272 | int subtype; |
| 2273 | rtx after; |
| 2274 | { |
| 2275 | register rtx note = rtx_alloc (NOTE); |
| 2276 | INSN_UID (note) = cur_insn_uid++; |
| 2277 | NOTE_SOURCE_FILE (note) = 0; |
| 2278 | NOTE_LINE_NUMBER (note) = subtype; |
| 2279 | add_insn_after (note, after); |
| 2280 | return note; |
| 2281 | } |
| 2282 | |
| 2283 | /* Emit a line note for FILE and LINE after the insn AFTER. */ |
| 2284 | |
| 2285 | rtx |
| 2286 | emit_line_note_after (file, line, after) |
| 2287 | char *file; |
| 2288 | int line; |
| 2289 | rtx after; |
| 2290 | { |
| 2291 | register rtx note; |
| 2292 | |
| 2293 | if (no_line_numbers && line > 0) |
| 2294 | { |
| 2295 | cur_insn_uid++; |
| 2296 | return 0; |
| 2297 | } |
| 2298 | |
| 2299 | note = rtx_alloc (NOTE); |
| 2300 | INSN_UID (note) = cur_insn_uid++; |
| 2301 | NOTE_SOURCE_FILE (note) = file; |
| 2302 | NOTE_LINE_NUMBER (note) = line; |
| 2303 | add_insn_after (note, after); |
| 2304 | return note; |
| 2305 | } |
| 2306 | \f |
| 2307 | /* Make an insn of code INSN with pattern PATTERN |
| 2308 | and add it to the end of the doubly-linked list. |
| 2309 | If PATTERN is a SEQUENCE, take the elements of it |
| 2310 | and emit an insn for each element. |
| 2311 | |
| 2312 | Returns the last insn emitted. */ |
| 2313 | |
| 2314 | rtx |
| 2315 | emit_insn (pattern) |
| 2316 | rtx pattern; |
| 2317 | { |
| 2318 | rtx insn = last_insn; |
| 2319 | |
| 2320 | if (GET_CODE (pattern) == SEQUENCE) |
| 2321 | { |
| 2322 | register int i; |
| 2323 | |
| 2324 | for (i = 0; i < XVECLEN (pattern, 0); i++) |
| 2325 | { |
| 2326 | insn = XVECEXP (pattern, 0, i); |
| 2327 | add_insn (insn); |
| 2328 | } |
| 2329 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) |
| 2330 | sequence_result[XVECLEN (pattern, 0)] = pattern; |
| 2331 | } |
| 2332 | else |
| 2333 | { |
| 2334 | insn = make_insn_raw (pattern); |
| 2335 | add_insn (insn); |
| 2336 | } |
| 2337 | |
| 2338 | return insn; |
| 2339 | } |
| 2340 | |
| 2341 | /* Emit the insns in a chain starting with INSN. |
| 2342 | Return the last insn emitted. */ |
| 2343 | |
| 2344 | rtx |
| 2345 | emit_insns (insn) |
| 2346 | rtx insn; |
| 2347 | { |
| 2348 | rtx last = 0; |
| 2349 | |
| 2350 | while (insn) |
| 2351 | { |
| 2352 | rtx next = NEXT_INSN (insn); |
| 2353 | add_insn (insn); |
| 2354 | last = insn; |
| 2355 | insn = next; |
| 2356 | } |
| 2357 | |
| 2358 | return last; |
| 2359 | } |
| 2360 | |
| 2361 | /* Emit the insns in a chain starting with INSN and place them in front of |
| 2362 | the insn BEFORE. Return the last insn emitted. */ |
| 2363 | |
| 2364 | rtx |
| 2365 | emit_insns_before (insn, before) |
| 2366 | rtx insn; |
| 2367 | rtx before; |
| 2368 | { |
| 2369 | rtx last = 0; |
| 2370 | |
| 2371 | while (insn) |
| 2372 | { |
| 2373 | rtx next = NEXT_INSN (insn); |
| 2374 | add_insn_after (insn, PREV_INSN (before)); |
| 2375 | last = insn; |
| 2376 | insn = next; |
| 2377 | } |
| 2378 | |
| 2379 | return last; |
| 2380 | } |
| 2381 | |
| 2382 | /* Emit the insns in a chain starting with FIRST and place them in back of |
| 2383 | the insn AFTER. Return the last insn emitted. */ |
| 2384 | |
| 2385 | rtx |
| 2386 | emit_insns_after (first, after) |
| 2387 | register rtx first; |
| 2388 | register rtx after; |
| 2389 | { |
| 2390 | register rtx last; |
| 2391 | register rtx after_after; |
| 2392 | |
| 2393 | if (!after) |
| 2394 | abort (); |
| 2395 | |
| 2396 | if (!first) |
| 2397 | return first; |
| 2398 | |
| 2399 | for (last = first; NEXT_INSN (last); last = NEXT_INSN (last)) |
| 2400 | continue; |
| 2401 | |
| 2402 | after_after = NEXT_INSN (after); |
| 2403 | |
| 2404 | NEXT_INSN (after) = first; |
| 2405 | PREV_INSN (first) = after; |
| 2406 | NEXT_INSN (last) = after_after; |
| 2407 | if (after_after) |
| 2408 | PREV_INSN (after_after) = last; |
| 2409 | |
| 2410 | if (after == last_insn) |
| 2411 | last_insn = last; |
| 2412 | return last; |
| 2413 | } |
| 2414 | |
| 2415 | /* Make an insn of code JUMP_INSN with pattern PATTERN |
| 2416 | and add it to the end of the doubly-linked list. */ |
| 2417 | |
| 2418 | rtx |
| 2419 | emit_jump_insn (pattern) |
| 2420 | rtx pattern; |
| 2421 | { |
| 2422 | if (GET_CODE (pattern) == SEQUENCE) |
| 2423 | return emit_insn (pattern); |
| 2424 | else |
| 2425 | { |
| 2426 | register rtx insn = make_jump_insn_raw (pattern); |
| 2427 | add_insn (insn); |
| 2428 | return insn; |
| 2429 | } |
| 2430 | } |
| 2431 | |
| 2432 | /* Make an insn of code CALL_INSN with pattern PATTERN |
| 2433 | and add it to the end of the doubly-linked list. */ |
| 2434 | |
| 2435 | rtx |
| 2436 | emit_call_insn (pattern) |
| 2437 | rtx pattern; |
| 2438 | { |
| 2439 | if (GET_CODE (pattern) == SEQUENCE) |
| 2440 | return emit_insn (pattern); |
| 2441 | else |
| 2442 | { |
| 2443 | register rtx insn = make_insn_raw (pattern); |
| 2444 | add_insn (insn); |
| 2445 | PUT_CODE (insn, CALL_INSN); |
| 2446 | return insn; |
| 2447 | } |
| 2448 | } |
| 2449 | |
| 2450 | /* Add the label LABEL to the end of the doubly-linked list. */ |
| 2451 | |
| 2452 | rtx |
| 2453 | emit_label (label) |
| 2454 | rtx label; |
| 2455 | { |
| 2456 | /* This can be called twice for the same label |
| 2457 | as a result of the confusion that follows a syntax error! |
| 2458 | So make it harmless. */ |
| 2459 | if (INSN_UID (label) == 0) |
| 2460 | { |
| 2461 | INSN_UID (label) = cur_insn_uid++; |
| 2462 | add_insn (label); |
| 2463 | } |
| 2464 | return label; |
| 2465 | } |
| 2466 | |
| 2467 | /* Make an insn of code BARRIER |
| 2468 | and add it to the end of the doubly-linked list. */ |
| 2469 | |
| 2470 | rtx |
| 2471 | emit_barrier () |
| 2472 | { |
| 2473 | register rtx barrier = rtx_alloc (BARRIER); |
| 2474 | INSN_UID (barrier) = cur_insn_uid++; |
| 2475 | add_insn (barrier); |
| 2476 | return barrier; |
| 2477 | } |
| 2478 | |
| 2479 | /* Make an insn of code NOTE |
| 2480 | with data-fields specified by FILE and LINE |
| 2481 | and add it to the end of the doubly-linked list, |
| 2482 | but only if line-numbers are desired for debugging info. */ |
| 2483 | |
| 2484 | rtx |
| 2485 | emit_line_note (file, line) |
| 2486 | char *file; |
| 2487 | int line; |
| 2488 | { |
| 2489 | emit_filename = file; |
| 2490 | emit_lineno = line; |
| 2491 | |
| 2492 | #if 0 |
| 2493 | if (no_line_numbers) |
| 2494 | return 0; |
| 2495 | #endif |
| 2496 | |
| 2497 | return emit_note (file, line); |
| 2498 | } |
| 2499 | |
| 2500 | /* Make an insn of code NOTE |
| 2501 | with data-fields specified by FILE and LINE |
| 2502 | and add it to the end of the doubly-linked list. |
| 2503 | If it is a line-number NOTE, omit it if it matches the previous one. */ |
| 2504 | |
| 2505 | rtx |
| 2506 | emit_note (file, line) |
| 2507 | char *file; |
| 2508 | int line; |
| 2509 | { |
| 2510 | register rtx note; |
| 2511 | |
| 2512 | if (line > 0) |
| 2513 | { |
| 2514 | if (file && last_filename && !strcmp (file, last_filename) |
| 2515 | && line == last_linenum) |
| 2516 | return 0; |
| 2517 | last_filename = file; |
| 2518 | last_linenum = line; |
| 2519 | } |
| 2520 | |
| 2521 | if (no_line_numbers && line > 0) |
| 2522 | { |
| 2523 | cur_insn_uid++; |
| 2524 | return 0; |
| 2525 | } |
| 2526 | |
| 2527 | note = rtx_alloc (NOTE); |
| 2528 | INSN_UID (note) = cur_insn_uid++; |
| 2529 | NOTE_SOURCE_FILE (note) = file; |
| 2530 | NOTE_LINE_NUMBER (note) = line; |
| 2531 | add_insn (note); |
| 2532 | return note; |
| 2533 | } |
| 2534 | |
| 2535 | /* Emit a NOTE, and don't omit it even if LINE it the previous note. */ |
| 2536 | |
| 2537 | rtx |
| 2538 | emit_line_note_force (file, line) |
| 2539 | char *file; |
| 2540 | int line; |
| 2541 | { |
| 2542 | last_linenum = -1; |
| 2543 | return emit_line_note (file, line); |
| 2544 | } |
| 2545 | |
| 2546 | /* Cause next statement to emit a line note even if the line number |
| 2547 | has not changed. This is used at the beginning of a function. */ |
| 2548 | |
| 2549 | void |
| 2550 | force_next_line_note () |
| 2551 | { |
| 2552 | last_linenum = -1; |
| 2553 | } |
| 2554 | \f |
| 2555 | /* Return an indication of which type of insn should have X as a body. |
| 2556 | The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */ |
| 2557 | |
| 2558 | enum rtx_code |
| 2559 | classify_insn (x) |
| 2560 | rtx x; |
| 2561 | { |
| 2562 | if (GET_CODE (x) == CODE_LABEL) |
| 2563 | return CODE_LABEL; |
| 2564 | if (GET_CODE (x) == CALL) |
| 2565 | return CALL_INSN; |
| 2566 | if (GET_CODE (x) == RETURN) |
| 2567 | return JUMP_INSN; |
| 2568 | if (GET_CODE (x) == SET) |
| 2569 | { |
| 2570 | if (SET_DEST (x) == pc_rtx) |
| 2571 | return JUMP_INSN; |
| 2572 | else if (GET_CODE (SET_SRC (x)) == CALL) |
| 2573 | return CALL_INSN; |
| 2574 | else |
| 2575 | return INSN; |
| 2576 | } |
| 2577 | if (GET_CODE (x) == PARALLEL) |
| 2578 | { |
| 2579 | register int j; |
| 2580 | for (j = XVECLEN (x, 0) - 1; j >= 0; j--) |
| 2581 | if (GET_CODE (XVECEXP (x, 0, j)) == CALL) |
| 2582 | return CALL_INSN; |
| 2583 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET |
| 2584 | && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx) |
| 2585 | return JUMP_INSN; |
| 2586 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET |
| 2587 | && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL) |
| 2588 | return CALL_INSN; |
| 2589 | } |
| 2590 | return INSN; |
| 2591 | } |
| 2592 | |
| 2593 | /* Emit the rtl pattern X as an appropriate kind of insn. |
| 2594 | If X is a label, it is simply added into the insn chain. */ |
| 2595 | |
| 2596 | rtx |
| 2597 | emit (x) |
| 2598 | rtx x; |
| 2599 | { |
| 2600 | enum rtx_code code = classify_insn (x); |
| 2601 | |
| 2602 | if (code == CODE_LABEL) |
| 2603 | return emit_label (x); |
| 2604 | else if (code == INSN) |
| 2605 | return emit_insn (x); |
| 2606 | else if (code == JUMP_INSN) |
| 2607 | { |
| 2608 | register rtx insn = emit_jump_insn (x); |
| 2609 | if (simplejump_p (insn) || GET_CODE (x) == RETURN) |
| 2610 | return emit_barrier (); |
| 2611 | return insn; |
| 2612 | } |
| 2613 | else if (code == CALL_INSN) |
| 2614 | return emit_call_insn (x); |
| 2615 | else |
| 2616 | abort (); |
| 2617 | } |
| 2618 | \f |
| 2619 | /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */ |
| 2620 | |
| 2621 | void |
| 2622 | start_sequence () |
| 2623 | { |
| 2624 | struct sequence_stack *tem; |
| 2625 | |
| 2626 | if (sequence_element_free_list) |
| 2627 | { |
| 2628 | /* Reuse a previously-saved struct sequence_stack. */ |
| 2629 | tem = sequence_element_free_list; |
| 2630 | sequence_element_free_list = tem->next; |
| 2631 | } |
| 2632 | else |
| 2633 | tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack)); |
| 2634 | |
| 2635 | tem->next = sequence_stack; |
| 2636 | tem->first = first_insn; |
| 2637 | tem->last = last_insn; |
| 2638 | |
| 2639 | sequence_stack = tem; |
| 2640 | |
| 2641 | first_insn = 0; |
| 2642 | last_insn = 0; |
| 2643 | } |
| 2644 | |
| 2645 | /* Set up the insn chain starting with FIRST |
| 2646 | as the current sequence, saving the previously current one. */ |
| 2647 | |
| 2648 | void |
| 2649 | push_to_sequence (first) |
| 2650 | rtx first; |
| 2651 | { |
| 2652 | rtx last; |
| 2653 | |
| 2654 | start_sequence (); |
| 2655 | |
| 2656 | for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last)); |
| 2657 | |
| 2658 | first_insn = first; |
| 2659 | last_insn = last; |
| 2660 | } |
| 2661 | |
| 2662 | /* Set up the outer-level insn chain |
| 2663 | as the current sequence, saving the previously current one. */ |
| 2664 | |
| 2665 | void |
| 2666 | push_topmost_sequence () |
| 2667 | { |
| 2668 | struct sequence_stack *stack, *top; |
| 2669 | |
| 2670 | start_sequence (); |
| 2671 | |
| 2672 | for (stack = sequence_stack; stack; stack = stack->next) |
| 2673 | top = stack; |
| 2674 | |
| 2675 | first_insn = top->first; |
| 2676 | last_insn = top->last; |
| 2677 | } |
| 2678 | |
| 2679 | /* After emitting to the outer-level insn chain, update the outer-level |
| 2680 | insn chain, and restore the previous saved state. */ |
| 2681 | |
| 2682 | void |
| 2683 | pop_topmost_sequence () |
| 2684 | { |
| 2685 | struct sequence_stack *stack, *top; |
| 2686 | |
| 2687 | for (stack = sequence_stack; stack; stack = stack->next) |
| 2688 | top = stack; |
| 2689 | |
| 2690 | top->first = first_insn; |
| 2691 | top->last = last_insn; |
| 2692 | |
| 2693 | end_sequence (); |
| 2694 | } |
| 2695 | |
| 2696 | /* After emitting to a sequence, restore previous saved state. |
| 2697 | |
| 2698 | To get the contents of the sequence just made, |
| 2699 | you must call `gen_sequence' *before* calling here. */ |
| 2700 | |
| 2701 | void |
| 2702 | end_sequence () |
| 2703 | { |
| 2704 | struct sequence_stack *tem = sequence_stack; |
| 2705 | |
| 2706 | first_insn = tem->first; |
| 2707 | last_insn = tem->last; |
| 2708 | sequence_stack = tem->next; |
| 2709 | |
| 2710 | tem->next = sequence_element_free_list; |
| 2711 | sequence_element_free_list = tem; |
| 2712 | } |
| 2713 | |
| 2714 | /* Return 1 if currently emitting into a sequence. */ |
| 2715 | |
| 2716 | int |
| 2717 | in_sequence_p () |
| 2718 | { |
| 2719 | return sequence_stack != 0; |
| 2720 | } |
| 2721 | |
| 2722 | /* Generate a SEQUENCE rtx containing the insns already emitted |
| 2723 | to the current sequence. |
| 2724 | |
| 2725 | This is how the gen_... function from a DEFINE_EXPAND |
| 2726 | constructs the SEQUENCE that it returns. */ |
| 2727 | |
| 2728 | rtx |
| 2729 | gen_sequence () |
| 2730 | { |
| 2731 | rtx result; |
| 2732 | rtx tem; |
| 2733 | rtvec newvec; |
| 2734 | int i; |
| 2735 | int len; |
| 2736 | |
| 2737 | /* Count the insns in the chain. */ |
| 2738 | len = 0; |
| 2739 | for (tem = first_insn; tem; tem = NEXT_INSN (tem)) |
| 2740 | len++; |
| 2741 | |
| 2742 | /* If only one insn, return its pattern rather than a SEQUENCE. |
| 2743 | (Now that we cache SEQUENCE expressions, it isn't worth special-casing |
| 2744 | the case of an empty list.) */ |
| 2745 | if (len == 1 |
| 2746 | && (GET_CODE (first_insn) == INSN |
| 2747 | || GET_CODE (first_insn) == JUMP_INSN |
| 2748 | || GET_CODE (first_insn) == CALL_INSN)) |
| 2749 | return PATTERN (first_insn); |
| 2750 | |
| 2751 | /* Put them in a vector. See if we already have a SEQUENCE of the |
| 2752 | appropriate length around. */ |
| 2753 | if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0) |
| 2754 | sequence_result[len] = 0; |
| 2755 | else |
| 2756 | { |
| 2757 | /* Ensure that this rtl goes in saveable_obstack, since we may be |
| 2758 | caching it. */ |
| 2759 | push_obstacks_nochange (); |
| 2760 | rtl_in_saveable_obstack (); |
| 2761 | result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len)); |
| 2762 | pop_obstacks (); |
| 2763 | } |
| 2764 | |
| 2765 | for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++) |
| 2766 | XVECEXP (result, 0, i) = tem; |
| 2767 | |
| 2768 | return result; |
| 2769 | } |
| 2770 | \f |
| 2771 | /* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag |
| 2772 | according to the chain of insns starting with FIRST. |
| 2773 | |
| 2774 | Also set cur_insn_uid to exceed the largest uid in that chain. |
| 2775 | |
| 2776 | This is used when an inline function's rtl is saved |
| 2777 | and passed to rest_of_compilation later. */ |
| 2778 | |
| 2779 | static void restore_reg_data_1 (); |
| 2780 | |
| 2781 | void |
| 2782 | restore_reg_data (first) |
| 2783 | rtx first; |
| 2784 | { |
| 2785 | register rtx insn; |
| 2786 | int i; |
| 2787 | register int max_uid = 0; |
| 2788 | |
| 2789 | for (insn = first; insn; insn = NEXT_INSN (insn)) |
| 2790 | { |
| 2791 | if (INSN_UID (insn) >= max_uid) |
| 2792 | max_uid = INSN_UID (insn); |
| 2793 | |
| 2794 | switch (GET_CODE (insn)) |
| 2795 | { |
| 2796 | case NOTE: |
| 2797 | case CODE_LABEL: |
| 2798 | case BARRIER: |
| 2799 | break; |
| 2800 | |
| 2801 | case JUMP_INSN: |
| 2802 | case CALL_INSN: |
| 2803 | case INSN: |
| 2804 | restore_reg_data_1 (PATTERN (insn)); |
| 2805 | break; |
| 2806 | } |
| 2807 | } |
| 2808 | |
| 2809 | /* Don't duplicate the uids already in use. */ |
| 2810 | cur_insn_uid = max_uid + 1; |
| 2811 | |
| 2812 | /* If any regs are missing, make them up. |
| 2813 | |
| 2814 | ??? word_mode is not necessarily the right mode. Most likely these REGs |
| 2815 | are never used. At some point this should be checked. */ |
| 2816 | |
| 2817 | for (i = FIRST_PSEUDO_REGISTER; i < reg_rtx_no; i++) |
| 2818 | if (regno_reg_rtx[i] == 0) |
| 2819 | regno_reg_rtx[i] = gen_rtx (REG, word_mode, i); |
| 2820 | } |
| 2821 | |
| 2822 | static void |
| 2823 | restore_reg_data_1 (orig) |
| 2824 | rtx orig; |
| 2825 | { |
| 2826 | register rtx x = orig; |
| 2827 | register int i; |
| 2828 | register enum rtx_code code; |
| 2829 | register char *format_ptr; |
| 2830 | |
| 2831 | code = GET_CODE (x); |
| 2832 | |
| 2833 | switch (code) |
| 2834 | { |
| 2835 | case QUEUED: |
| 2836 | case CONST_INT: |
| 2837 | case CONST_DOUBLE: |
| 2838 | case SYMBOL_REF: |
| 2839 | case CODE_LABEL: |
| 2840 | case PC: |
| 2841 | case CC0: |
| 2842 | case LABEL_REF: |
| 2843 | return; |
| 2844 | |
| 2845 | case REG: |
| 2846 | if (REGNO (x) >= FIRST_PSEUDO_REGISTER) |
| 2847 | { |
| 2848 | /* Make sure regno_pointer_flag and regno_reg_rtx are large |
| 2849 | enough to have an element for this pseudo reg number. */ |
| 2850 | if (REGNO (x) >= reg_rtx_no) |
| 2851 | { |
| 2852 | reg_rtx_no = REGNO (x); |
| 2853 | |
| 2854 | if (reg_rtx_no >= regno_pointer_flag_length) |
| 2855 | { |
| 2856 | int newlen = MAX (regno_pointer_flag_length * 2, |
| 2857 | reg_rtx_no + 30); |
| 2858 | rtx *new1; |
| 2859 | char *new = (char *) oballoc (newlen); |
| 2860 | bzero (new, newlen); |
| 2861 | bcopy (regno_pointer_flag, new, regno_pointer_flag_length); |
| 2862 | |
| 2863 | new1 = (rtx *) oballoc (newlen * sizeof (rtx)); |
| 2864 | bzero (new1, newlen * sizeof (rtx)); |
| 2865 | bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx)); |
| 2866 | |
| 2867 | regno_pointer_flag = new; |
| 2868 | regno_reg_rtx = new1; |
| 2869 | regno_pointer_flag_length = newlen; |
| 2870 | } |
| 2871 | reg_rtx_no ++; |
| 2872 | } |
| 2873 | regno_reg_rtx[REGNO (x)] = x; |
| 2874 | } |
| 2875 | return; |
| 2876 | |
| 2877 | case MEM: |
| 2878 | if (GET_CODE (XEXP (x, 0)) == REG) |
| 2879 | mark_reg_pointer (XEXP (x, 0)); |
| 2880 | restore_reg_data_1 (XEXP (x, 0)); |
| 2881 | return; |
| 2882 | } |
| 2883 | |
| 2884 | /* Now scan the subexpressions recursively. */ |
| 2885 | |
| 2886 | format_ptr = GET_RTX_FORMAT (code); |
| 2887 | |
| 2888 | for (i = 0; i < GET_RTX_LENGTH (code); i++) |
| 2889 | { |
| 2890 | switch (*format_ptr++) |
| 2891 | { |
| 2892 | case 'e': |
| 2893 | restore_reg_data_1 (XEXP (x, i)); |
| 2894 | break; |
| 2895 | |
| 2896 | case 'E': |
| 2897 | if (XVEC (x, i) != NULL) |
| 2898 | { |
| 2899 | register int j; |
| 2900 | |
| 2901 | for (j = 0; j < XVECLEN (x, i); j++) |
| 2902 | restore_reg_data_1 (XVECEXP (x, i, j)); |
| 2903 | } |
| 2904 | break; |
| 2905 | } |
| 2906 | } |
| 2907 | } |
| 2908 | \f |
| 2909 | /* Initialize data structures and variables in this file |
| 2910 | before generating rtl for each function. */ |
| 2911 | |
| 2912 | void |
| 2913 | init_emit () |
| 2914 | { |
| 2915 | int i; |
| 2916 | |
| 2917 | first_insn = NULL; |
| 2918 | last_insn = NULL; |
| 2919 | cur_insn_uid = 1; |
| 2920 | reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; |
| 2921 | last_linenum = 0; |
| 2922 | last_filename = 0; |
| 2923 | first_label_num = label_num; |
| 2924 | last_label_num = 0; |
| 2925 | sequence_stack = NULL; |
| 2926 | |
| 2927 | /* Clear the start_sequence/gen_sequence cache. */ |
| 2928 | sequence_element_free_list = 0; |
| 2929 | for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) |
| 2930 | sequence_result[i] = 0; |
| 2931 | |
| 2932 | /* Init the tables that describe all the pseudo regs. */ |
| 2933 | |
| 2934 | regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101; |
| 2935 | |
| 2936 | regno_pointer_flag |
| 2937 | = (char *) oballoc (regno_pointer_flag_length); |
| 2938 | bzero (regno_pointer_flag, regno_pointer_flag_length); |
| 2939 | |
| 2940 | regno_reg_rtx |
| 2941 | = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx)); |
| 2942 | bzero (regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx)); |
| 2943 | |
| 2944 | /* Put copies of all the virtual register rtx into regno_reg_rtx. */ |
| 2945 | regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx; |
| 2946 | regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx; |
| 2947 | regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx; |
| 2948 | regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx; |
| 2949 | |
| 2950 | /* Indicate that the virtual registers and stack locations are |
| 2951 | all pointers. */ |
| 2952 | REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1; |
| 2953 | REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1; |
| 2954 | REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1; |
| 2955 | |
| 2956 | REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1; |
| 2957 | REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1; |
| 2958 | REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1; |
| 2959 | REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1; |
| 2960 | |
| 2961 | #ifdef INIT_EXPANDERS |
| 2962 | INIT_EXPANDERS; |
| 2963 | #endif |
| 2964 | } |
| 2965 | |
| 2966 | /* Create some permanent unique rtl objects shared between all functions. |
| 2967 | LINE_NUMBERS is nonzero if line numbers are to be generated. */ |
| 2968 | |
| 2969 | void |
| 2970 | init_emit_once (line_numbers) |
| 2971 | int line_numbers; |
| 2972 | { |
| 2973 | int i; |
| 2974 | enum machine_mode mode; |
| 2975 | |
| 2976 | no_line_numbers = ! line_numbers; |
| 2977 | |
| 2978 | sequence_stack = NULL; |
| 2979 | |
| 2980 | /* Create the unique rtx's for certain rtx codes and operand values. */ |
| 2981 | |
| 2982 | pc_rtx = gen_rtx (PC, VOIDmode); |
| 2983 | cc0_rtx = gen_rtx (CC0, VOIDmode); |
| 2984 | |
| 2985 | /* Don't use gen_rtx here since gen_rtx in this case |
| 2986 | tries to use these variables. */ |
| 2987 | for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++) |
| 2988 | { |
| 2989 | const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT); |
| 2990 | PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode); |
| 2991 | INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i; |
| 2992 | } |
| 2993 | |
| 2994 | /* These four calls obtain some of the rtx expressions made above. */ |
| 2995 | const0_rtx = GEN_INT (0); |
| 2996 | const1_rtx = GEN_INT (1); |
| 2997 | const2_rtx = GEN_INT (2); |
| 2998 | constm1_rtx = GEN_INT (-1); |
| 2999 | |
| 3000 | /* This will usually be one of the above constants, but may be a new rtx. */ |
| 3001 | const_true_rtx = GEN_INT (STORE_FLAG_VALUE); |
| 3002 | |
| 3003 | dconst0 = REAL_VALUE_ATOF ("0", DFmode); |
| 3004 | dconst1 = REAL_VALUE_ATOF ("1", DFmode); |
| 3005 | dconst2 = REAL_VALUE_ATOF ("2", DFmode); |
| 3006 | dconstm1 = REAL_VALUE_ATOF ("-1", DFmode); |
| 3007 | |
| 3008 | for (i = 0; i <= 2; i++) |
| 3009 | { |
| 3010 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; |
| 3011 | mode = GET_MODE_WIDER_MODE (mode)) |
| 3012 | { |
| 3013 | rtx tem = rtx_alloc (CONST_DOUBLE); |
| 3014 | union real_extract u; |
| 3015 | |
| 3016 | bzero (&u, sizeof u); /* Zero any holes in a structure. */ |
| 3017 | u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2; |
| 3018 | |
| 3019 | bcopy (&u, &CONST_DOUBLE_LOW (tem), sizeof u); |
| 3020 | CONST_DOUBLE_MEM (tem) = cc0_rtx; |
| 3021 | PUT_MODE (tem, mode); |
| 3022 | |
| 3023 | const_tiny_rtx[i][(int) mode] = tem; |
| 3024 | } |
| 3025 | |
| 3026 | const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i); |
| 3027 | |
| 3028 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; |
| 3029 | mode = GET_MODE_WIDER_MODE (mode)) |
| 3030 | const_tiny_rtx[i][(int) mode] = GEN_INT (i); |
| 3031 | |
| 3032 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT); |
| 3033 | mode != VOIDmode; |
| 3034 | mode = GET_MODE_WIDER_MODE (mode)) |
| 3035 | const_tiny_rtx[i][(int) mode] = GEN_INT (i); |
| 3036 | } |
| 3037 | |
| 3038 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode; |
| 3039 | mode = GET_MODE_WIDER_MODE (mode)) |
| 3040 | const_tiny_rtx[0][(int) mode] = const0_rtx; |
| 3041 | |
| 3042 | stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM); |
| 3043 | frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM); |
| 3044 | |
| 3045 | if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM) |
| 3046 | arg_pointer_rtx = frame_pointer_rtx; |
| 3047 | else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM) |
| 3048 | arg_pointer_rtx = stack_pointer_rtx; |
| 3049 | else |
| 3050 | arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM); |
| 3051 | |
| 3052 | /* Create the virtual registers. Do so here since the following objects |
| 3053 | might reference them. */ |
| 3054 | |
| 3055 | virtual_incoming_args_rtx = gen_rtx (REG, Pmode, |
| 3056 | VIRTUAL_INCOMING_ARGS_REGNUM); |
| 3057 | virtual_stack_vars_rtx = gen_rtx (REG, Pmode, |
| 3058 | VIRTUAL_STACK_VARS_REGNUM); |
| 3059 | virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode, |
| 3060 | VIRTUAL_STACK_DYNAMIC_REGNUM); |
| 3061 | virtual_outgoing_args_rtx = gen_rtx (REG, Pmode, |
| 3062 | VIRTUAL_OUTGOING_ARGS_REGNUM); |
| 3063 | |
| 3064 | #ifdef STRUCT_VALUE |
| 3065 | struct_value_rtx = STRUCT_VALUE; |
| 3066 | #else |
| 3067 | struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM); |
| 3068 | #endif |
| 3069 | |
| 3070 | #ifdef STRUCT_VALUE_INCOMING |
| 3071 | struct_value_incoming_rtx = STRUCT_VALUE_INCOMING; |
| 3072 | #else |
| 3073 | #ifdef STRUCT_VALUE_INCOMING_REGNUM |
| 3074 | struct_value_incoming_rtx |
| 3075 | = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM); |
| 3076 | #else |
| 3077 | struct_value_incoming_rtx = struct_value_rtx; |
| 3078 | #endif |
| 3079 | #endif |
| 3080 | |
| 3081 | #ifdef STATIC_CHAIN_REGNUM |
| 3082 | static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM); |
| 3083 | |
| 3084 | #ifdef STATIC_CHAIN_INCOMING_REGNUM |
| 3085 | if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM) |
| 3086 | static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM); |
| 3087 | else |
| 3088 | #endif |
| 3089 | static_chain_incoming_rtx = static_chain_rtx; |
| 3090 | #endif |
| 3091 | |
| 3092 | #ifdef STATIC_CHAIN |
| 3093 | static_chain_rtx = STATIC_CHAIN; |
| 3094 | |
| 3095 | #ifdef STATIC_CHAIN_INCOMING |
| 3096 | static_chain_incoming_rtx = STATIC_CHAIN_INCOMING; |
| 3097 | #else |
| 3098 | static_chain_incoming_rtx = static_chain_rtx; |
| 3099 | #endif |
| 3100 | #endif |
| 3101 | |
| 3102 | #ifdef PIC_OFFSET_TABLE_REGNUM |
| 3103 | pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM); |
| 3104 | #endif |
| 3105 | } |