BSD 4_3_Tahoe release

[unix-history] / usr / src / sys / vaxuba / uba.c

diff --git a/usr/src/sys/vaxuba/uba.c b/usr/src/sys/vaxuba/uba.c
index 2888b37..685673f 100644 (file)
--- a/usr/src/sys/vaxuba/uba.c
+++ b/usr/src/sys/vaxuba/uba.c
@@ -1,59 +1,94 @@
-/*     uba.c   6.1     83/08/21        */
+/*
+ * Copyright (c) 1982, 1986 Regents of the University of California.
+ * All rights reserved.  The Berkeley software License Agreement
+ * specifies the terms and conditions for redistribution.
+ *
+ *     @(#)uba.c       7.5 (Berkeley) 5/14/88
+ */

 
 #include "../machine/pte.h"
 
 
 #include "../machine/pte.h"
 

-#include "../h/param.h"
-#include "../h/systm.h"
-#include "../h/map.h"
-#include "../h/buf.h"
-#include "../h/vm.h"
-#include "../h/dir.h"
-#include "../h/user.h"
-#include "../h/proc.h"
-#include "../h/conf.h"
-#include "../h/dk.h"
-#include "../h/kernel.h"
+#include "param.h"
+#include "systm.h"
+#include "map.h"
+#include "buf.h"
+#include "vm.h"
+#include "dir.h"
+#include "user.h"
+#include "proc.h"
+#include "conf.h"
+#include "dkstat.h"
+#include "kernel.h"

 
 #include "../vax/cpu.h"
 #include "../vax/mtpr.h"
 #include "../vax/nexus.h"
 
 #include "../vax/cpu.h"
 #include "../vax/mtpr.h"
 #include "../vax/nexus.h"

-#include "../vaxuba/ubareg.h"
-#include "../vaxuba/ubavar.h"
+#include "ubareg.h"
+#include "ubavar.h"

 
 

-#if VAX780
+#ifdef DW780

 char   ubasr_bits[] = UBASR_BITS;
 #endif
 
 char   ubasr_bits[] = UBASR_BITS;
 #endif
 

+#define        spluba  spl7            /* IPL 17 */
+
+#define        BDPMASK 0xf0000000      /* see ubavar.h */
+

 /*
  * Do transfer on device argument.  The controller
  * and uba involved are implied by the device.
  * We queue for resource wait in the uba code if necessary.
  * We return 1 if the transfer was started, 0 if it was not.
 /*
  * Do transfer on device argument.  The controller
  * and uba involved are implied by the device.
  * We queue for resource wait in the uba code if necessary.
  * We return 1 if the transfer was started, 0 if it was not.

- * If you call this routine with the head of the queue for a
- * UBA, it will automatically remove the device from the UBA
- * queue before it returns.  If some other device is given
- * as argument, it will be added to the request queue if the
- * request cannot be started immediately.  This means that
- * passing a device which is on the queue but not at the head
- * of the request queue is likely to be a disaster.
+ *
+ * The onq argument must be zero iff the device is not on the
+ * queue for this UBA.  If onq is set, the device must be at the
+ * head of the queue.  In any case, if the transfer is started,
+ * the device will be off the queue, and if not, it will be on.
+ *
+ * Drivers that allocate one BDP and hold it for some time should
+ * set ud_keepbdp.  In this case um_bdp tells which BDP is allocated
+ * to the controller, unless it is zero, indicating that the controller
+ * does not now have a BDP.

  */
  */

-ubago(ui)
+ubaqueue(ui, onq)

        register struct uba_device *ui;
        register struct uba_device *ui;

+       int onq;

 {
        register struct uba_ctlr *um = ui->ui_mi;
        register struct uba_hd *uh;
 {
        register struct uba_ctlr *um = ui->ui_mi;
        register struct uba_hd *uh;

+       register struct uba_driver *ud;

        register int s, unit;
 
        uh = &uba_hd[um->um_ubanum];
        register int s, unit;
 
        uh = &uba_hd[um->um_ubanum];

-       s = spl6();
-       if (um->um_driver->ud_xclu && uh->uh_users > 0 || uh->uh_xclu)
+       ud = um->um_driver;
+       s = spluba();
+       /*
+        * Honor exclusive BDP use requests.
+        */
+       if (ud->ud_xclu && uh->uh_users > 0 || uh->uh_xclu)

                goto rwait;
                goto rwait;

-       um->um_ubinfo = ubasetup(um->um_ubanum, um->um_tab.b_actf->b_actf,
-           UBA_NEEDBDP|UBA_CANTWAIT);
+       if (ud->ud_keepbdp) {
+               /*
+                * First get just a BDP (though in fact it comes with
+                * one map register too).
+                */
+               if (um->um_bdp == 0) {
+                       um->um_bdp = uballoc(um->um_ubanum,
+                               (caddr_t)0, 0, UBA_NEEDBDP|UBA_CANTWAIT);
+                       if (um->um_bdp == 0)
+                               goto rwait;
+               }
+               /* now share it with this transfer */
+               um->um_ubinfo = ubasetup(um->um_ubanum,
+                       um->um_tab.b_actf->b_actf,
+                       um->um_bdp|UBA_HAVEBDP|UBA_CANTWAIT);
+       } else
+               um->um_ubinfo = ubasetup(um->um_ubanum,
+                       um->um_tab.b_actf->b_actf, UBA_NEEDBDP|UBA_CANTWAIT);

        if (um->um_ubinfo == 0)
                goto rwait;
        uh->uh_users++;
        if (um->um_ubinfo == 0)
                goto rwait;
        uh->uh_users++;

-       if (um->um_driver->ud_xclu)
+       if (ud->ud_xclu)

                uh->uh_xclu = 1;
        splx(s);
        if (ui->ui_dk >= 0) {
                uh->uh_xclu = 1;
        splx(s);
        if (ui->ui_dk >= 0) {


@@ -62,12 +97,12 @@ ubago(ui)
                dk_xfer[unit]++;
                dk_wds[unit] += um->um_tab.b_actf->b_actf->b_bcount>>6;
        }
                dk_xfer[unit]++;
                dk_wds[unit] += um->um_tab.b_actf->b_actf->b_bcount>>6;
        }

-       if (uh->uh_actf == ui)
+       if (onq)

                uh->uh_actf = ui->ui_forw;
                uh->uh_actf = ui->ui_forw;

-       (*um->um_driver->ud_dgo)(um);
+       (*ud->ud_dgo)(um);

        return (1);
 rwait:
        return (1);
 rwait:

-       if (uh->uh_actf != ui) {
+       if (!onq) {

                ui->ui_forw = NULL;
                if (uh->uh_actf == NULL)
                        uh->uh_actf = ui;
                ui->ui_forw = NULL;
                if (uh->uh_actf == NULL)
                        uh->uh_actf = ui;


@@ -87,6 +122,8 @@ ubadone(um)
        if (um->um_driver->ud_xclu)
                uh->uh_xclu = 0;
        uh->uh_users--;
        if (um->um_driver->ud_xclu)
                uh->uh_xclu = 0;
        uh->uh_users--;

+       if (um->um_driver->ud_keepbdp)
+               um->um_ubinfo &= ~BDPMASK;      /* keep BDP for misers */

        ubarelse(um->um_ubanum, &um->um_ubinfo);
 }
 
        ubarelse(um->um_ubanum, &um->um_ubinfo);
 }
 


@@ -102,24 +139,30 @@ ubadone(um)
  *     Bits 28-31      BDP no.
  */
 ubasetup(uban, bp, flags)
  *     Bits 28-31      BDP no.
  */
 ubasetup(uban, bp, flags)

-       struct buf *bp;
+       int uban;
+       register struct buf *bp;
+       register int flags;

 {
        register struct uba_hd *uh = &uba_hd[uban];
 {
        register struct uba_hd *uh = &uba_hd[uban];

-       register int temp;
-       int npf, reg, bdp;
-       unsigned v;

        register struct pte *pte, *io;
        register struct pte *pte, *io;

+       register int npf;
+       int pfnum, temp;
+       int reg, bdp;
+       unsigned v;

        struct proc *rp;
        int a, o, ubinfo;
 
        struct proc *rp;
        int a, o, ubinfo;
 

-#if VAX730
-       if (cpu == VAX_730)
+#ifdef DW730
+       if (uh->uh_type == DW730)
+               flags &= ~UBA_NEEDBDP;
+#endif
+#ifdef QBA
+       if (uh->uh_type == QBA)

                flags &= ~UBA_NEEDBDP;
 #endif
                flags &= ~UBA_NEEDBDP;
 #endif

-       v = btop(bp->b_un.b_addr);

        o = (int)bp->b_un.b_addr & PGOFSET;
        npf = btoc(bp->b_bcount + o) + 1;
        o = (int)bp->b_un.b_addr & PGOFSET;
        npf = btoc(bp->b_bcount + o) + 1;

-       a = spl6();
+       a = spluba();

        while ((reg = rmalloc(uh->uh_map, (long)npf)) == 0) {
                if (flags & UBA_CANTWAIT) {
                        splx(a);
        while ((reg = rmalloc(uh->uh_map, (long)npf)) == 0) {
                if (flags & UBA_CANTWAIT) {
                        splx(a);


@@ -128,9 +171,18 @@ ubasetup(uban, bp, flags)
                uh->uh_mrwant++;
                sleep((caddr_t)&uh->uh_mrwant, PSWP);
        }
                uh->uh_mrwant++;
                sleep((caddr_t)&uh->uh_mrwant, PSWP);
        }

+       if ((flags & UBA_NEED16) && reg + npf > 128) {
+               /*
+                * Could hang around and try again (if we can ever succeed).
+                * Won't help any current device...
+                */
+               rmfree(uh->uh_map, (long)npf, (long)reg);
+               splx(a);
+               return (0);
+       }

        bdp = 0;
        if (flags & UBA_NEEDBDP) {
        bdp = 0;
        if (flags & UBA_NEEDBDP) {

-               while ((bdp = ffs(uh->uh_bdpfree)) == 0) {
+               while ((bdp = ffs((long)uh->uh_bdpfree)) == 0) {

                        if (flags & UBA_CANTWAIT) {
                                rmfree(uh->uh_map, (long)npf, (long)reg);
                                splx(a);
                        if (flags & UBA_CANTWAIT) {
                                rmfree(uh->uh_map, (long)npf, (long)reg);
                                splx(a);


@@ -148,22 +200,27 @@ ubasetup(uban, bp, flags)
        temp = (bdp << 21) | UBAMR_MRV;
        if (bdp && (o & 01))
                temp |= UBAMR_BO;
        temp = (bdp << 21) | UBAMR_MRV;
        if (bdp && (o & 01))
                temp |= UBAMR_BO;

-       rp = bp->b_flags&B_DIRTY ? &proc[2] : bp->b_proc;

        if ((bp->b_flags & B_PHYS) == 0)
        if ((bp->b_flags & B_PHYS) == 0)

-               pte = &Sysmap[btop(((int)bp->b_un.b_addr)&0x7fffffff)];
-       else if (bp->b_flags & B_UAREA)
-               pte = &rp->p_addr[v];
+               pte = kvtopte(bp->b_un.b_addr);

        else if (bp->b_flags & B_PAGET)
                pte = &Usrptmap[btokmx((struct pte *)bp->b_un.b_addr)];
        else if (bp->b_flags & B_PAGET)
                pte = &Usrptmap[btokmx((struct pte *)bp->b_un.b_addr)];

-       else
-               pte = vtopte(rp, v);
-       io = &uh->uh_uba->uba_map[reg];
-       while (--npf != 0) {
-               if (pte->pg_pfnum == 0)
+       else {
+               rp = bp->b_flags&B_DIRTY ? &proc[2] : bp->b_proc;
+               v = btop(bp->b_un.b_addr);
+               if (bp->b_flags & B_UAREA)
+                       pte = &rp->p_addr[v];
+               else
+                       pte = vtopte(rp, v);
+       }
+       io = &uh->uh_mr[reg];
+       while (--npf > 0) {
+               pfnum = pte->pg_pfnum;
+               if (pfnum == 0)

                        panic("uba zero uentry");
                        panic("uba zero uentry");

-               *(int *)io++ = pte++->pg_pfnum | temp;
+               pte++;
+               *(int *)io++ = pfnum | temp;

        }
        }

-       *(int *)io++ = 0;
+       *(int *)io = 0;

        return (ubinfo);
 }
 
        return (ubinfo);
 }
 


@@ -200,7 +257,7 @@ ubarelse(uban, amr)
         * Carefully see if we should release the space, since
         * it may be released asynchronously at uba reset time.
         */
         * Carefully see if we should release the space, since
         * it may be released asynchronously at uba reset time.
         */

-       s = spl6();
+       s = spluba();

        mr = *amr;
        if (mr == 0) {
                /*
        mr = *amr;
        if (mr == 0) {
                /*


@@ -211,21 +268,27 @@ ubarelse(uban, amr)
                return;
        }
        *amr = 0;
                return;
        }
        *amr = 0;

-       splx(s);                /* let interrupts in, we're safe for a while */

        bdp = (mr >> 28) & 0x0f;
        if (bdp) {
        bdp = (mr >> 28) & 0x0f;
        if (bdp) {

-               switch (cpu) {
-#if VAX780
-               case VAX_780:
+               switch (uh->uh_type) {
+#ifdef DWBUA
+               case DWBUA:
+                       BUA(uh->uh_uba)->bua_dpr[bdp] |= BUADPR_PURGE;
+                       break;
+#endif
+#ifdef DW780
+               case DW780:

                        uh->uh_uba->uba_dpr[bdp] |= UBADPR_BNE;
                        break;
 #endif
                        uh->uh_uba->uba_dpr[bdp] |= UBADPR_BNE;
                        break;
 #endif

-#if VAX750
-               case VAX_750:
+#ifdef DW750
+               case DW750:

                        uh->uh_uba->uba_dpr[bdp] |=
                            UBADPR_PURGE|UBADPR_NXM|UBADPR_UCE;
                        break;
 #endif
                        uh->uh_uba->uba_dpr[bdp] |=
                            UBADPR_PURGE|UBADPR_NXM|UBADPR_UCE;
                        break;
 #endif

+               default:
+                       break;

                }
                uh->uh_bdpfree |= 1 << (bdp-1);         /* atomic */
                if (uh->uh_bdpwant) {
                }
                uh->uh_bdpfree |= 1 << (bdp-1);         /* atomic */
                if (uh->uh_bdpwant) {


@@ -235,12 +298,12 @@ ubarelse(uban, amr)
        }
        /*
         * Put back the registers in the resource map.
        }
        /*
         * Put back the registers in the resource map.

-        * The map code must not be reentered, so we do this
-        * at high ipl.
+        * The map code must not be reentered,
+        * nor can the registers be freed twice.
+        * Unblock interrupts once this is done.

         */
        npf = (mr >> 18) & 0x3ff;
        reg = ((mr >> 9) & 0x1ff) + 1;
         */
        npf = (mr >> 18) & 0x3ff;
        reg = ((mr >> 9) & 0x1ff) + 1;

-       s = spl6();

        rmfree(uh->uh_map, (long)npf, (long)reg);
        splx(s);
 
        rmfree(uh->uh_map, (long)npf, (long)reg);
        splx(s);
 


@@ -253,7 +316,7 @@ ubarelse(uban, amr)
                uh->uh_mrwant = 0;
                wakeup((caddr_t)&uh->uh_mrwant);
        }
                uh->uh_mrwant = 0;
                wakeup((caddr_t)&uh->uh_mrwant);
        }

-       while (uh->uh_actf && ubago(uh->uh_actf))
+       while (uh->uh_actf && ubaqueue(uh->uh_actf, 1))

                ;
 }
 
                ;
 }
 


@@ -263,17 +326,24 @@ ubapurge(um)
        register struct uba_hd *uh = um->um_hd;
        register int bdp = (um->um_ubinfo >> 28) & 0x0f;
 
        register struct uba_hd *uh = um->um_hd;
        register int bdp = (um->um_ubinfo >> 28) & 0x0f;
 

-       switch (cpu) {
-#if VAX780
-       case VAX_780:
+       switch (uh->uh_type) {
+#ifdef DWBUA
+       case DWBUA:
+               BUA(uh->uh_uba)->bua_dpr[bdp] |= BUADPR_PURGE;
+               break;
+#endif
+#ifdef DW780
+       case DW780:

                uh->uh_uba->uba_dpr[bdp] |= UBADPR_BNE;
                break;
 #endif
                uh->uh_uba->uba_dpr[bdp] |= UBADPR_BNE;
                break;
 #endif

-#if VAX750
-       case VAX_750:
+#ifdef DW750
+       case DW750:

                uh->uh_uba->uba_dpr[bdp] |= UBADPR_PURGE|UBADPR_NXM|UBADPR_UCE;
                break;
 #endif
                uh->uh_uba->uba_dpr[bdp] |= UBADPR_PURGE|UBADPR_NXM|UBADPR_UCE;
                break;
 #endif

+       default:
+               break;

        }
 }
 
        }
 }
 


@@ -281,22 +351,25 @@ ubainitmaps(uhp)
        register struct uba_hd *uhp;
 {
 
        register struct uba_hd *uhp;
 {
 

-       rminit(uhp->uh_map, (long)NUBMREG, (long)1, "uba", UAMSIZ);
-       switch (cpu) {
-#if VAX780
-       case VAX_780:
+       rminit(uhp->uh_map, (long)uhp->uh_memsize, (long)1, "uba", UAMSIZ);
+       switch (uhp->uh_type) {
+#ifdef DWBUA
+       case DWBUA:
+               uhp->uh_bdpfree = (1<<NBDPBUA) - 1;
+               break;
+#endif
+#ifdef DW780
+       case DW780:

                uhp->uh_bdpfree = (1<<NBDP780) - 1;
                break;
 #endif
                uhp->uh_bdpfree = (1<<NBDP780) - 1;
                break;
 #endif

-#if VAX750
-       case VAX_750:
+#ifdef DW750
+       case DW750:

                uhp->uh_bdpfree = (1<<NBDP750) - 1;
                break;
 #endif
                uhp->uh_bdpfree = (1<<NBDP750) - 1;
                break;
 #endif

-#if VAX730
-       case VAX_730:
+       default:

                break;
                break;

-#endif

        }
 }
 
        }
 }
 


@@ -312,7 +385,7 @@ ubareset(uban)
        register struct uba_hd *uh = &uba_hd[uban];
        int s;
 
        register struct uba_hd *uh = &uba_hd[uban];
        int s;
 

-       s = spl6();
+       s = spluba();

        uh->uh_users = 0;
        uh->uh_zvcnt = 0;
        uh->uh_xclu = 0;
        uh->uh_users = 0;
        uh->uh_zvcnt = 0;
        uh->uh_xclu = 0;


@@ -324,11 +397,10 @@ ubareset(uban)
        wakeup((caddr_t)&uh->uh_mrwant);
        printf("uba%d: reset", uban);
        ubainit(uh->uh_uba);
        wakeup((caddr_t)&uh->uh_mrwant);
        printf("uba%d: reset", uban);
        ubainit(uh->uh_uba);

+       ubameminit(uban);

        for (cdp = cdevsw; cdp < cdevsw + nchrdev; cdp++)
                (*cdp->d_reset)(uban);
        for (cdp = cdevsw; cdp < cdevsw + nchrdev; cdp++)
                (*cdp->d_reset)(uban);

-#ifdef INET

        ifubareset(uban);
        ifubareset(uban);

-#endif

        printf("\n");
        splx(s);
 }
        printf("\n");
        splx(s);
 }


@@ -340,64 +412,123 @@ ubareset(uban)
  * In these cases we really don't need the interrupts
  * enabled, but since we run with ipl high, we don't care
  * if they are, they will never happen anyways.
  * In these cases we really don't need the interrupts
  * enabled, but since we run with ipl high, we don't care
  * if they are, they will never happen anyways.

+ * SHOULD GET POINTER TO UBA_HD INSTEAD OF UBA.

  */
 ubainit(uba)
        register struct uba_regs *uba;
 {
  */
 ubainit(uba)
        register struct uba_regs *uba;
 {

+       register struct uba_hd *uhp;
+#ifdef QBA
+       int isphys = 0;
+#endif

 
 

-       switch (cpu) {
-#if VAX780
-       case VAX_780:
+       for (uhp = uba_hd; uhp < uba_hd + numuba; uhp++) {
+               if (uhp->uh_uba == uba)
+                       break;
+               if (uhp->uh_physuba == uba) {
+#ifdef QBA
+                       isphys++;
+#endif
+                       break;
+               }
+       }
+       if (uhp >= uba_hd + numuba) {
+               printf("init unknown uba\n");
+               return;
+       }
+
+       switch (uhp->uh_type) {
+#ifdef DWBUA
+       case DWBUA:
+               BUA(uba)->bua_csr |= BUACSR_UPI;
+               /* give devices time to recover from power fail */
+               DELAY(500000);
+               break;
+#endif
+#ifdef DW780
+       case DW780:

                uba->uba_cr = UBACR_ADINIT;
                uba->uba_cr = UBACR_IFS|UBACR_BRIE|UBACR_USEFIE|UBACR_SUEFIE;
                while ((uba->uba_cnfgr & UBACNFGR_UBIC) == 0)
                        ;
                break;
 #endif
                uba->uba_cr = UBACR_ADINIT;
                uba->uba_cr = UBACR_IFS|UBACR_BRIE|UBACR_USEFIE|UBACR_SUEFIE;
                while ((uba->uba_cnfgr & UBACNFGR_UBIC) == 0)
                        ;
                break;
 #endif

-#if VAX750
-       case VAX_750:
+#ifdef DW750
+       case DW750:

 #endif
 #endif

-#if VAX730
-       case VAX_730:
+#ifdef DW730
+       case DW730:

 #endif
 #endif

-#if defined(VAX750) || defined(VAX730)
+#ifdef QBA
+       case QBA:
+#endif
+#if DW750 || DW730 || QBA

                mtpr(IUR, 0);
                /* give devices time to recover from power fail */
 /* THIS IS PROBABLY UNNECESSARY */
                DELAY(500000);
 /* END PROBABLY UNNECESSARY */
                mtpr(IUR, 0);
                /* give devices time to recover from power fail */
 /* THIS IS PROBABLY UNNECESSARY */
                DELAY(500000);
 /* END PROBABLY UNNECESSARY */

+#ifdef QBA
+               /*
+                * Re-enable local memory access
+                * from the Q-bus.
+                */
+               if (uhp->uh_type == QBA) {
+                       if (isphys)
+                               *((char *)QIOPAGE630 + QIPCR) = Q_LMEAE;
+                       else
+                               *(uhp->uh_iopage + QIPCR) = Q_LMEAE;
+               }
+#endif QBA

                break;
                break;

-#endif
+#endif DW750 || DW730 || QBA

        }
 }
 
        }
 }
 

-#ifdef VAX780
+#ifdef DW780

 int    ubawedgecnt = 10;
 int    ubacrazy = 500;
 int    ubawedgecnt = 10;
 int    ubacrazy = 500;

+int    zvcnt_max = 5000;       /* in 8 sec */

 /*
 /*

- * This routine is called by the locore code to
- * process a UBA error on an 11/780.  The arguments are passed
+ * This routine is called by the locore code to process a UBA
+ * error on an 11/780 or 8600.  The arguments are passed

  * on the stack, and value-result (through some trickery).
  * In particular, the uvec argument is used for further
  * uba processing so the result aspect of it is very important.
  * It must not be declared register.
  */
 /*ARGSUSED*/
  * on the stack, and value-result (through some trickery).
  * In particular, the uvec argument is used for further
  * uba processing so the result aspect of it is very important.
  * It must not be declared register.
  */
 /*ARGSUSED*/

-ubaerror(uban, uh, xx, uvec, uba)
+ubaerror(uban, uh, ipl, uvec, uba)

        register int uban;
        register struct uba_hd *uh;
        register int uban;
        register struct uba_hd *uh;

-       int uvec;
+       int ipl, uvec;

        register struct uba_regs *uba;
 {
        register sr, s;
 
        if (uvec == 0) {
        register struct uba_regs *uba;
 {
        register sr, s;
 
        if (uvec == 0) {

-               uh->uh_zvcnt++;
-               if (uh->uh_zvcnt > 250000) {
-                       printf("uba%d: too many zero vectors\n");
+               /*
+                * Declare dt as unsigned so that negative values
+                * are handled as >8 below, in case time was set back.
+                */
+               u_long  dt = time.tv_sec - uh->uh_zvtime;
+
+               uh->uh_zvtotal++;
+               if (dt > 8) {
+                       uh->uh_zvtime = time.tv_sec;
+                       uh->uh_zvcnt = 0;
+               }
+               if (++uh->uh_zvcnt > zvcnt_max) {
+                       printf("uba%d: too many zero vectors (%d in <%d sec)\n",
+                               uban, uh->uh_zvcnt, dt + 1);
+                       printf("\tIPL 0x%x\n\tcnfgr: %b  Adapter Code: 0x%x\n",
+                               ipl, uba->uba_cnfgr&(~0xff), UBACNFGR_BITS,
+                               uba->uba_cnfgr&0xff);
+                       printf("\tsr: %b\n\tdcr: %x (MIC %sOK)\n",
+                               uba->uba_sr, ubasr_bits, uba->uba_dcr,
+                               (uba->uba_dcr&0x8000000)?"":"NOT ");

                        ubareset(uban);
                }
                        ubareset(uban);
                }

-               uvec = 0;

                return;
        }
        if (uba->uba_cnfgr & NEX_CFGFLT) {
                return;
        }
        if (uba->uba_cnfgr & NEX_CFGFLT) {


@@ -409,7 +540,7 @@ ubaerror(uban, uh, xx, uvec, uba)
                return;
        }
        sr = uba->uba_sr;
                return;
        }
        sr = uba->uba_sr;

-       s = spl7();
+       s = spluba();

        printf("uba%d: uba error sr=%b fmer=%x fubar=%o\n",
            uban, uba->uba_sr, ubasr_bits, uba->uba_fmer, 4*uba->uba_fubar);
        splx(s);
        printf("uba%d: uba error sr=%b fmer=%x fubar=%o\n",
            uban, uba->uba_sr, ubasr_bits, uba->uba_fmer, 4*uba->uba_fubar);
        splx(s);


@@ -427,43 +558,105 @@ ubaerror(uban, uh, xx, uvec, uba)
 }
 #endif
 
 }
 #endif
 

+/*
+ * Look for devices with unibus memory, allow them to configure, then disable
+ * map registers as necessary.  Called during autoconfiguration and ubareset.
+ * The device ubamem routine returns 0 on success, 1 on success if it is fully
+ * configured (has no csr or interrupt, so doesn't need to be probed),
+ * and -1 on failure.
+ */
+ubameminit(uban)
+{
+       register struct uba_device *ui;
+       register struct uba_hd *uh = &uba_hd[uban];
+       caddr_t umembase = umem[uban] + 0x3e000, addr;
+#define        ubaoff(off)     ((int)(off) & 0x1fff)
+
+       uh->uh_lastmem = 0;
+       for (ui = ubdinit; ui->ui_driver; ui++) {
+               if (ui->ui_ubanum != uban && ui->ui_ubanum != '?')
+                       continue;
+               if (ui->ui_driver->ud_ubamem) {
+                       /*
+                        * During autoconfiguration, need to fudge ui_addr.
+                        */
+                       addr = ui->ui_addr;
+                       ui->ui_addr = umembase + ubaoff(addr);
+                       switch ((*ui->ui_driver->ud_ubamem)(ui, uban)) {
+                       case 1:
+                               ui->ui_alive = 1;
+                               /* FALLTHROUGH */
+                       case 0:
+                               ui->ui_ubanum = uban;
+                               break;
+                       }
+                       ui->ui_addr = addr;
+               }
+       }
+#ifdef DW780
+       /*
+        * On a DW780, throw away any map registers disabled by rounding
+        * the map disable in the configuration register
+        * up to the next 8K boundary, or below the last unibus memory.
+        */
+       if (uh->uh_type == DW780) {
+               register i;
+
+               i = btop(((uh->uh_lastmem + 8191) / 8192) * 8192);
+               while (i)
+                       (void) rmget(uh->uh_map, 1, i--);
+       }
+#endif
+}
+

 /*
  * Allocate UNIBUS memory.  Allocates and initializes
  * sufficient mapping registers for access.  On a 780,
  * the configuration register is setup to disable UBA
  * response on DMA transfers to addresses controlled
  * by the disabled mapping registers.
 /*
  * Allocate UNIBUS memory.  Allocates and initializes
  * sufficient mapping registers for access.  On a 780,
  * the configuration register is setup to disable UBA
  * response on DMA transfers to addresses controlled
  * by the disabled mapping registers.

+ * On a DW780, should only be called from ubameminit, or in ascending order
+ * from 0 with 8K-sized and -aligned addresses; freeing memory that isn't
+ * the last unibus memory would free unusable map registers.
+ * Doalloc is 1 to allocate, 0 to deallocate.

  */
 ubamem(uban, addr, npg, doalloc)
        int uban, addr, npg, doalloc;
 {
        register struct uba_hd *uh = &uba_hd[uban];
        register int a;
  */
 ubamem(uban, addr, npg, doalloc)
        int uban, addr, npg, doalloc;
 {
        register struct uba_hd *uh = &uba_hd[uban];
        register int a;

+       int s;

 
 

-       if (doalloc) {
-               int s = spl6();
-               a = rmget(uh->uh_map, npg, (addr >> 9) + 1);
-               splx(s);
-       } else
-               a = (addr >> 9) + 1;
+       a = (addr >> 9) + 1;
+       s = spluba();
+       if (doalloc)
+               a = rmget(uh->uh_map, npg, a);
+       else
+               rmfree(uh->uh_map, (long)npg, (long)a);
+       splx(s);

        if (a) {
                register int i, *m;
 
        if (a) {
                register int i, *m;
 

-               m = (int *)&uh->uh_uba->uba_map[a - 1];
+               m = (int *)&uh->uh_mr[a - 1];

                for (i = 0; i < npg; i++)
                        *m++ = 0;       /* All off, especially 'valid' */
                for (i = 0; i < npg; i++)
                        *m++ = 0;       /* All off, especially 'valid' */

-#if VAX780
+               i = addr + npg * 512;
+               if (doalloc && i > uh->uh_lastmem)
+                       uh->uh_lastmem = i;
+               else if (doalloc == 0 && i == uh->uh_lastmem)
+                       uh->uh_lastmem = addr;
+#ifdef DW780

                /*
                 * On a 780, set up the map register disable
                 * field in the configuration register.  Beware
                /*
                 * On a 780, set up the map register disable
                 * field in the configuration register.  Beware

-                * of callers that request memory ``out of order''.
+                * of callers that request memory ``out of order''
+                * or in sections other than 8K multiples.
+                * Ubameminit handles such requests properly, however.

                 */
                 */

-               if (cpu == VAX_780) {
-                       int cr = uh->uh_uba->uba_cr;
-
-                       i = (addr + npg * 512 + 8191) / 8192;
-                       if (i > (cr >> 26))
-                               uh->uh_uba->uba_cr |= i << 26;
+               if (uh->uh_type == DW780) {
+                       i = uh->uh_uba->uba_cr &~ 0x7c000000;
+                       i |= ((uh->uh_lastmem + 8191) / 8192) << 26;
+                       uh->uh_uba->uba_cr = i;

                }
 #endif
        }
                }
 #endif
        }


@@ -471,7 +664,8 @@ ubamem(uban, addr, npg, doalloc)
 }
 
 #include "ik.h"
 }
 
 #include "ik.h"

-#if NIK > 0
+#include "vs.h"
+#if NIK > 0 || NVS > 0

 /*
  * Map a virtual address into users address space. Actually all we
  * do is turn on the user mode write protection bits for the particular
 /*
  * Map a virtual address into users address space. Actually all we
  * do is turn on the user mode write protection bits for the particular


@@ -481,13 +675,13 @@ maptouser(vaddress)
        caddr_t vaddress;
 {
 
        caddr_t vaddress;
 {
 

-       Sysmap[(((unsigned)(vaddress))-0x80000000) >> 9].pg_prot = (PG_UW>>27);
+       kvtopte(vaddress)->pg_prot = (PG_UW >> 27);

 }
 
 unmaptouser(vaddress)
        caddr_t vaddress;
 {
 
 }
 
 unmaptouser(vaddress)
        caddr_t vaddress;
 {
 

-       Sysmap[(((unsigned)(vaddress))-0x80000000) >> 9].pg_prot = (PG_KW>>27);
+       kvtopte(vaddress)->pg_prot = (PG_KW >> 27);

 }
 #endif
 }
 #endif