merged constants for receive and xmit status registers

[unix-history] / usr / src / sys / vax / uba / uureg.h

diff --git a/usr/src/sys/vax/uba/uureg.h b/usr/src/sys/vax/uba/uureg.h
index 98f0072..2828430 100644 (file)
--- a/usr/src/sys/vax/uba/uureg.h
+++ b/usr/src/sys/vax/uba/uureg.h
@@ -5,17 +5,20 @@
  * DL11-E/DL11-W UNIBUS (for TU58) controller registers
  */
 struct uudevice {
  * DL11-E/DL11-W UNIBUS (for TU58) controller registers
  */
 struct uudevice {

-       short   uurcs;  /* receiver status register */
-       short   uurdb;  /* receiver data buffer register */
-       short   uutcs;  /* transmitter status register */
-       short   uutdb;  /* transmitter data buffer register */
+       short   rcs;    /* receiver status register */
+       short   rdb;    /* receiver data buffer register */
+       short   tcs;    /* transmitter status register */
+       short   tdb;    /* transmitter data buffer register */

 };
 
 /*
 };
 
 /*

- * Receiver status register status/command bits
+ * Receiver/transmitter status register status/command bits

  */
  */

-#define UURCS_DONE     0x80    /* Receiver done (byte ready) */
-#define UURCS_INTR     0x40    /* Receiver interrupt enable */
+#define UUCS_DONE      0x80    /* done/ready */
+#define        UUCS_READY      0x80
+#define UUCS_INTR      0x40    /* interrupt enable */
+#define        UUCS_MAINT      0x02    /* maintenance check (xmitter only) */
+#define        UUCS_BREAK      0x01    /* send break (xmitter only) */

 
 /*
  * Receiver data buffer register status bits
 
 /*
  * Receiver data buffer register status bits


@@ -24,13 +27,5 @@ struct uudevice {
 #define UURDB_ORUN     0x4000  /* Data overrun error */
 #define        UURDB_BREAK     0x2000  /* TU58 break */
 
 #define UURDB_ORUN     0x4000  /* Data overrun error */
 #define        UURDB_BREAK     0x2000  /* TU58 break */
 

-/*
- * Transmitter status register status/command bits
- */
-#define        UUTCS_READY     0x80    /* transmitter ready */
-#define        UUTCS_INTR      0x40    /* transmitter interrupt enable */
-#define        UUTCS_MAINT     0x02    /* maintenance check */
-#define        UUTCS_BREAK     0x01    /* send break */
-

 #define        UUDB_DMASK      0x00ff  /* data mask (send and receive data) */
 
 #define        UUDB_DMASK      0x00ff  /* data mask (send and receive data) */