almost working ubago version (tm.c problems)

[unix-history] / usr / src / sys / vax / uba / uba.c

diff --git a/usr/src/sys/vax/uba/uba.c b/usr/src/sys/vax/uba/uba.c
index 0c1a08d..bd2b65b 100644 (file)
--- a/usr/src/sys/vax/uba/uba.c
+++ b/usr/src/sys/vax/uba/uba.c
@@ -1,4 +1,6 @@
-/*     uba.c   4.8     %G%     */
+/*     uba.c   4.11    %G%     */
+
+#define        DELAY(N)        { register int d; d = N; while (--d > 0); }

 
 #include "../h/param.h"
 #include "../h/systm.h"
 
 #include "../h/param.h"
 #include "../h/systm.h"


@@ -6,21 +8,73 @@
 #include "../h/map.h"
 #include "../h/pte.h"
 #include "../h/buf.h"
 #include "../h/map.h"
 #include "../h/pte.h"
 #include "../h/buf.h"

+#include "../h/vm.h"

 #include "../h/uba.h"
 #include "../h/dir.h"
 #include "../h/user.h"
 #include "../h/proc.h"
 #include "../h/uba.h"
 #include "../h/dir.h"
 #include "../h/user.h"
 #include "../h/proc.h"

-#include "../h/vm.h"

 #include "../h/conf.h"
 #include "../h/mtpr.h"
 #include "../h/nexus.h"
 #include "../h/conf.h"
 #include "../h/mtpr.h"
 #include "../h/nexus.h"

+#include "../h/dk.h"
+
+/*
+ * Do transfer on device argument.  The controller
+ * and uba involved are implied by the device.
+ * We queue for resource wait in the uba code if necessary.
+ * We return 1 if the transfer was started, 0 if it was not.
+ * If you call this routine with the head of the queue for a
+ * UBA, it will automatically remove the device from the UBA
+ * queue before it returns.  If some other device is given
+ * as argument, it will be added to the request queue if the
+ * request cannot be started immediately.  This means that
+ * passing a device which is on the queue but not at the head
+ * of the request queue is likely to be a disaster.
+ */
+ubago(ui)
+       register struct uba_dinfo *ui;
+{
+       register struct uba_minfo *um = ui->ui_mi;
+       register struct uba_hd *uh;
+       register int s, unit;
+
+       uh = &uba_hd[um->um_ubanum];
+       s = spl6();
+       um->um_ubinfo = ubasetup(um->um_ubanum, um->um_tab.b_actf->b_actf,
+           UBA_NEEDBDP|UBA_CANTWAIT);
+       if (um->um_ubinfo == 0) {
+               if (uh->uh_actf != ui) {
+                       ui->ui_forw = NULL;
+                       if (uh->uh_actf == NULL)
+                               uh->uh_actf = ui;
+                       else
+                               uh->uh_actl->ui_forw = ui;
+                       uh->uh_actl = ui;
+               }
+               splx(s);
+               return (0);
+       }
+       splx(s);
+       if (ui->ui_dk >= 0) {
+               unit = ui->ui_dk;
+               dk_busy |= 1<<unit;
+       }
+       if (uh->uh_actf == ui)
+               uh->uh_actf = ui->ui_forw;
+       (*um->um_driver->ud_dgo)(um);
+       if (ui->ui_dk >= 0) {
+               dk_xfer[unit]++;
+               dk_wds[unit] += um->um_tab.b_actf->b_bcount>>6;
+       }
+       return (1);
+}

 
 /*
  * Allocate and setup UBA map registers, and bdp's
  * Flags says whether bdp is needed, whether the caller can't
  * wait (e.g. if the caller is at interrupt level).
  *
 
 /*
  * Allocate and setup UBA map registers, and bdp's
  * Flags says whether bdp is needed, whether the caller can't
  * wait (e.g. if the caller is at interrupt level).
  *

- * Return value (cruft):
+ * Return value:

  *     Bits 0-8        Byte offset
  *     Bits 9-17       Start map reg. no.
  *     Bits 18-27      No. mapping reg's
  *     Bits 0-8        Byte offset
  *     Bits 9-17       Start map reg. no.
  *     Bits 18-27      No. mapping reg's


@@ -47,7 +101,6 @@ ubasetup(uban, bp, flags)
                uh->uh_mrwant++;
                sleep((caddr_t)uh->uh_map, PSWP);
        }
                uh->uh_mrwant++;
                sleep((caddr_t)uh->uh_map, PSWP);
        }

-       reg--;

        bdp = 0;
        if (flags & UBA_NEEDBDP) {
                while ((bdp = ffs(uh->uh_bdpfree)) == 0) {
        bdp = 0;
        if (flags & UBA_NEEDBDP) {
                while ((bdp = ffs(uh->uh_bdpfree)) == 0) {


@@ -58,9 +111,10 @@ ubasetup(uban, bp, flags)
                        uh->uh_bdpwant++;
                        sleep((caddr_t)uh->uh_map, PSWP);
                }
                        uh->uh_bdpwant++;
                        sleep((caddr_t)uh->uh_map, PSWP);
                }

-               uh->uh_bdpfree &= ~ (1<<bdp);
+               uh->uh_bdpfree &= ~(1 << (bdp-1));

        }
        splx(a);
        }
        splx(a);

+       reg--;

        ubinfo = (bdp << 28) | (npf << 18) | (reg << 9) | o;
        io = &uh->uh_uba->uba_map[reg];
        temp = (bdp << 21) | UBA_MRV;
        ubinfo = (bdp << 28) | (npf << 18) | (reg << 9) | o;
        io = &uh->uh_uba->uba_map[reg];
        temp = (bdp << 21) | UBA_MRV;


@@ -93,7 +147,7 @@ ubasetup(uban, bp, flags)
 }
 
 /*
 }
 
 /*

- * Non buffer unibus interface... set up a buffer and call ubasetup.
+ * Non buffer setup interface... set up a buffer and call ubasetup.

  */
 uballoc(uban, addr, bcnt, flags)
        caddr_t addr;
  */
 uballoc(uban, addr, bcnt, flags)
        caddr_t addr;


@@ -109,22 +163,33 @@ uballoc(uban, addr, bcnt, flags)
 }
  
 /*
 }
  
 /*

- * Old ubafree(info) is now ubarelse(&info) to avoid races.
+ * Release resources on uba uban, and then unblock resource waiters.
+ * The map register parameter is by value since we need to block
+ * against uba resets on 11/780's.

  */
 ubarelse(uban, amr)
        int *amr;
 {
        register struct uba_hd *uh = &uba_hd[uban];
  */
 ubarelse(uban, amr)
        int *amr;
 {
        register struct uba_hd *uh = &uba_hd[uban];

-       register int bdp, reg, npf, a;
+       register int bdp, reg, npf, s;

        int mr;
  
        int mr;
  

-       a = spl6();
+       /*
+        * Carefully see if we should release the space, since
+        * it may be released asynchronously at uba reset time.
+        */
+       s = spl6();

        mr = *amr;
        if (mr == 0) {
        mr = *amr;
        if (mr == 0) {

-               splx(a);
+               /*
+                * A ubareset() occurred before we got around
+                * to releasing the space... no need to bother.
+                */
+               splx(s);

                return;
        }
        *amr = 0;
                return;
        }
        *amr = 0;

+       splx(s);                /* let interrupts in, we're safe for a while */

        bdp = (mr >> 28) & 0x0f;
        if (bdp) {
                switch (cpu)
        bdp = (mr >> 28) & 0x0f;
        if (bdp) {
                switch (cpu)


@@ -140,25 +205,43 @@ ubarelse(uban, amr)
                        break;
 #endif
                }
                        break;
 #endif
                }

-               uh->uh_bdpfree |= 1 << bdp;
+               uh->uh_bdpfree |= 1 << (bdp-1);         /* atomic */

                if (uh->uh_bdpwant) {
                        uh->uh_bdpwant = 0;
                        wakeup((caddr_t)uh->uh_map);
                }
        }
                if (uh->uh_bdpwant) {
                        uh->uh_bdpwant = 0;
                        wakeup((caddr_t)uh->uh_map);
                }
        }

+       /*
+        * Put back the registers in the resource map.
+        * The map code must not be reentered, so we do this
+        * at high ipl.
+        */

        npf = (mr >> 18) & 0x3ff;
        reg = ((mr >> 9) & 0x1ff) + 1;
        npf = (mr >> 18) & 0x3ff;
        reg = ((mr >> 9) & 0x1ff) + 1;

+       s = spl6();

        mfree(uh->uh_map, npf, reg);
        mfree(uh->uh_map, npf, reg);

+       splx(s);
+
+       /*
+        * Wakeup sleepers for map registers,
+        * and also, if there are processes blocked in dgo(),
+        * give them a chance at the UNIBUS.
+        */

        if (uh->uh_mrwant) {
                uh->uh_mrwant = 0;
                wakeup((caddr_t)uh->uh_map);
        }
        if (uh->uh_mrwant) {
                uh->uh_mrwant = 0;
                wakeup((caddr_t)uh->uh_map);
        }

-       splx(a);
+       while (uh->uh_actf && ubago(uh->uh_actf))
+               ;

 }
 
 }
 

-#define        DELAY(N)        { register int d; d = N; while (--d > 0); }
-
+/*
+ * Generate a reset on uba number uban.  Then
+ * call each device in the character device table,
+ * giving it a chance to clean up so as to be able to continue.
+ */

 ubareset(uban)
 ubareset(uban)

+       int uban;

 {
        register struct cdevsw *cdp;
        int s;
 {
        register struct cdevsw *cdp;
        int s;


@@ -185,7 +268,14 @@ ubareset(uban)
        splx(s);
 }
 
        splx(s);
 }
 

-/* pointer rather than number so we can be called with virt and phys addrs */
+/*
+ * Init a uba.  This is called with a pointer
+ * rather than a virtual address since it is called
+ * by code which runs with memory mapping disabled.
+ * In these cases we really don't need the interrupts
+ * enabled, but since we run with ipl high, we don't care
+ * if they are, they will never happen anyways.
+ */

 ubainit(uba)
        register struct uba_regs *uba;
 {
 ubainit(uba)
        register struct uba_regs *uba;
 {


@@ -197,6 +287,11 @@ ubainit(uba)
 }
 
 #if VAX780
 }
 
 #if VAX780

+/*
+ * Check to make sure the UNIBUS adaptor is not hung,
+ * with an interrupt in the register to be presented,
+ * but not presenting it for an extended period (5 seconds).
+ */

 unhang()
 {
        register int uban;
 unhang()
 {
        register int uban;


@@ -216,8 +311,12 @@ unhang()
        }
 }
 
        }
 }
 

-/* timeout routine to decrement ``i forgot to interrupt counts */
-/* this prevents the counts from growing slowly, which isn't interesting */
+/*
+ * This is a timeout routine which decrements the ``i forgot to
+ * interrupt'' counts, on an 11/780.  This prevents slowly growing
+ * counts from causing a UBA reset since we are interested only
+ * in hang situations.
+ */

 ubawatch()
 {
        register struct uba_hd *uh;
 ubawatch()
 {
        register struct uba_hd *uh;


@@ -230,7 +329,14 @@ ubawatch()
        }
 }
 
        }
 }
 

-/* called from locore.s; parameters here (i.e. uvec) are value-result! */
+/*
+ * This routine is called by the locore code to
+ * process a UBA error on an 11/780.  The arguments are passed
+ * on the stack, and value-result (through some trickery).
+ * In particular, the uvec argument is used for further
+ * uba processing so the result aspect of it is very important.
+ * It must not be declared register.
+ */

 /*ARGSUSED*/
 ubaerror(uban, uh, xx, uvec, uba)
        register int uban;
 /*ARGSUSED*/
 ubaerror(uban, uh, xx, uvec, uba)
        register int uban;


@@ -259,7 +365,7 @@ ubaerror(uban, uh, xx, uvec, uba)
        sr = uba->uba_sr;
        s = spl7();
        printf("UBA%d ERROR SR %x FMER %x FUBAR %o\n",
        sr = uba->uba_sr;
        s = spl7();
        printf("UBA%d ERROR SR %x FMER %x FUBAR %o\n",

-           uban, uba->uba_sr, uba->uba_fmer, uba->uba_fubar);
+           uban, uba->uba_sr, uba->uba_fmer, 4*uba->uba_fubar);

        splx(s);
        uba->uba_sr = sr;
        uvec &= UBA_DIV;
        splx(s);
        uba->uba_sr = sr;
        uvec &= UBA_DIV;