+
+/*
+ * Allocate UNIBUS memory. Allocates and initializes
+ * sufficient mapping registers for access. On a 780,
+ * the configuration register is setup to disable UBA
+ * response on DMA transfers to addresses controlled
+ * by the disabled mapping registers.
+ */
+ubamem(uban, addr, npg, doalloc)
+ int uban, addr, npg, doalloc;
+{
+ register struct uba_hd *uh = &uba_hd[uban];
+ register int a;
+
+ if (doalloc) {
+ int s = spl6();
+ a = rmget(uh->uh_map, npg, (addr >> 9) + 1);
+ splx(s);
+ } else
+ a = (addr >> 9) + 1;
+ if (a) {
+ register int i, *m;
+
+ m = (int *)&uh->uh_uba->uba_map[a - 1];
+ for (i = 0; i < npg; i++)
+ *m++ = 0; /* All off, especially 'valid' */
+#if VAX780
+ /*
+ * On a 780, set up the map register disable
+ * field in the configuration register. Beware
+ * of callers that request memory ``out of order''.
+ */
+ if (cpu == VAX_780) {
+ int cr = uh->uh_uba->uba_cr;
+
+ i = (addr + npg * 512 + 8191) / 8192;
+ if (i > (cr >> 26))
+ uh->uh_uba->uba_cr |= i << 26;
+ }
+#endif
+ }
+ return (a);
+}
+
+#include "ik.h"
+#if NIK > 0
+/*
+ * Map a virtual address into users address space. Actually all we
+ * do is turn on the user mode write protection bits for the particular
+ * page of memory involved.
+ */
+maptouser(vaddress)
+ caddr_t vaddress;
+{
+
+ Sysmap[(((unsigned)(vaddress))-0x80000000) >> 9].pg_prot = (PG_UW>>27);
+}
+
+unmaptouser(vaddress)
+ caddr_t vaddress;
+{
+
+ Sysmap[(((unsigned)(vaddress))-0x80000000) >> 9].pg_prot = (PG_KW>>27);
+}
+#endif