+
+/*
+ * Init a uba. This is called with a pointer
+ * rather than a virtual address since it is called
+ * by code which runs with memory mapping disabled.
+ * In these cases we really don't need the interrupts
+ * enabled, but since we run with ipl high, we don't care
+ * if they are, they will never happen anyways.
+ */
+ubainit(uba)
+ register struct uba_regs *uba;
+{
+
+ switch (cpu) {
+#if VAX780
+ case VAX_780:
+ uba->uba_cr = UBACR_ADINIT;
+ uba->uba_cr = UBACR_IFS|UBACR_BRIE|UBACR_USEFIE|UBACR_SUEFIE;
+ while ((uba->uba_cnfgr & UBACNFGR_UBIC) == 0)
+ ;
+ break;
+#endif
+#if VAX750
+ case VAX_750:
+#endif
+#if VAX730
+ case VAX_730:
+#endif
+#if defined(VAX750) || defined(VAX730)
+ mtpr(IUR, 0);
+ /* give devices time to recover from power fail */
+/* THIS IS PROBABLY UNNECESSARY */
+ DELAY(500000);
+/* END PROBABLY UNNECESSARY */
+ break;
+#endif
+ }
+}
+
+#ifdef VAX780
+int ubawedgecnt = 10;
+int ubacrazy = 500;
+/*
+ * This routine is called by the locore code to
+ * process a UBA error on an 11/780. The arguments are passed
+ * on the stack, and value-result (through some trickery).
+ * In particular, the uvec argument is used for further
+ * uba processing so the result aspect of it is very important.
+ * It must not be declared register.
+ */
+/*ARGSUSED*/
+ubaerror(uban, uh, xx, uvec, uba)
+ register int uban;
+ register struct uba_hd *uh;
+ int uvec;
+ register struct uba_regs *uba;
+{
+ register sr, s;
+
+ if (uvec == 0) {
+ uh->uh_zvcnt++;
+ if (uh->uh_zvcnt > 250000) {
+ printf("uba%d: too many zero vectors\n");
+ ubareset(uban);
+ }
+ uvec = 0;
+ return;
+ }
+ if (uba->uba_cnfgr & NEX_CFGFLT) {
+ printf("uba%d: sbi fault sr=%b cnfgr=%b\n",
+ uban, uba->uba_sr, ubasr_bits,
+ uba->uba_cnfgr, NEXFLT_BITS);
+ ubareset(uban);
+ uvec = 0;
+ return;
+ }
+ sr = uba->uba_sr;
+ s = spl7();
+ printf("uba%d: uba error sr=%b fmer=%x fubar=%o\n",
+ uban, uba->uba_sr, ubasr_bits, uba->uba_fmer, 4*uba->uba_fubar);
+ splx(s);
+ uba->uba_sr = sr;
+ uvec &= UBABRRVR_DIV;
+ if (++uh->uh_errcnt % ubawedgecnt == 0) {
+ if (uh->uh_errcnt > ubacrazy)
+ panic("uba crazy");
+ printf("ERROR LIMIT ");
+ ubareset(uban);
+ uvec = 0;
+ return;
+ }
+ return;
+}
+#endif
+
+/*
+ * Allocate UNIBUS memory. Allocates and initializes
+ * sufficient mapping registers for access. On a 780,
+ * the configuration register is setup to disable UBA
+ * response on DMA transfers to addresses controlled
+ * by the disabled mapping registers.
+ */
+ubamem(uban, addr, npg, doalloc)
+ int uban, addr, npg, doalloc;
+{
+ register struct uba_hd *uh = &uba_hd[uban];
+ register int a;
+
+ if (doalloc) {
+ int s = spl6();
+ a = rmget(uh->uh_map, npg, (addr >> 9) + 1);
+ splx(s);
+ } else
+ a = (addr >> 9) + 1;
+ if (a) {
+ register int i, *m;
+
+ m = (int *)&uh->uh_uba->uba_map[a - 1];
+ for (i = 0; i < npg; i++)
+ *m++ = 0; /* All off, especially 'valid' */
+#if VAX780
+ /*
+ * On a 780, set up the map register disable
+ * field in the configuration register. Beware
+ * of callers that request memory ``out of order''.
+ */
+ if (cpu == VAX_780) {
+ int cr = uh->uh_uba->uba_cr;
+
+ i = (addr + npg * 512 + 8191) / 8192;
+ if (i > (cr >> 26))
+ uh->uh_uba->uba_cr |= i << 26;
+ }
+#endif
+ }
+ return (a);
+}
+
+#include "ik.h"
+#if NIK > 0
+/*
+ * Map a virtual address into users address space. Actually all we
+ * do is turn on the user mode write protection bits for the particular
+ * page of memory involved.
+ */
+maptouser(vaddress)
+ caddr_t vaddress;
+{
+
+ Sysmap[(((unsigned)(vaddress))-0x80000000) >> 9].pg_prot = (PG_UW>>27);
+}
+
+unmaptouser(vaddress)
+ caddr_t vaddress;
+{
+
+ Sysmap[(((unsigned)(vaddress))-0x80000000) >> 9].pg_prot = (PG_KW>>27);
+}
+#endif