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1 | /* |
2 | * Copyright 2010-2017 Intel Corporation. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License, version 2, | |
6 | * as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, | |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | * | |
13 | * Disclaimer: The codes contained in these modules may be specific to | |
14 | * the Intel Software Development Platform codenamed Knights Ferry, | |
15 | * and the Intel product codenamed Knights Corner, and are not backward | |
16 | * compatible with other Intel products. Additionally, Intel will NOT | |
17 | * support the codes or instruction set in future products. | |
18 | * | |
19 | * Intel offers no warranty of any kind regarding the code. This code is | |
20 | * licensed on an "AS IS" basis and Intel is not obligated to provide | |
21 | * any support, assistance, installation, training, or other services | |
22 | * of any kind. Intel is also not obligated to provide any updates, | |
23 | * enhancements or extensions. Intel specifically disclaims any warranty | |
24 | * of merchantability, non-infringement, fitness for any particular | |
25 | * purpose, and any other warranty. | |
26 | * | |
27 | * Further, Intel disclaims all liability of any kind, including but | |
28 | * not limited to liability for infringement of any proprietary rights, | |
29 | * relating to the use of the code, even if Intel is notified of the | |
30 | * possibility of such liability. Except as expressly stated in an Intel | |
31 | * license agreement provided with this code and agreed upon with Intel, | |
32 | * no license, express or implied, by estoppel or otherwise, to any | |
33 | * intellectual property rights is granted herein. | |
34 | */ | |
35 | ||
36 | #ifndef MICDLDR_H | |
37 | #define MICDLDR_H | |
38 | ||
39 | #define MIC_DECONS_DISABLE 0 | |
40 | #define MIC_DECONS_ENABLE 1 | |
41 | ||
42 | typedef struct mic_upload { | |
43 | int up_brdnum; | |
44 | int up_uossize; | |
45 | char *up_uosbuf; | |
46 | int up_dcons; | |
47 | int up_uoslog; | |
48 | int up_uosreserve; | |
49 | } mic_upload_t; | |
50 | ||
51 | typedef struct mic_sys_config { | |
52 | int sc_numCards; | |
53 | } mic_sys_config_t; | |
54 | ||
55 | #define UOS_NOT_BOOTED 0 | |
56 | #define UOS_BOOTING 1 | |
57 | #define UOS_BOOT_FAILED 2 | |
58 | #define UOS_BOOT_SUCCEED 3 | |
59 | #define UOS_RUNNING 4 | |
60 | #define UOS_WEDGED 5 | |
61 | #define UOS_UNKNOWN 6 | |
62 | ||
63 | #define PCI_VENDOR_INTEL 0x8086 | |
64 | ||
65 | #define PCI_SPEED_GEN1 1 | |
66 | #define PCI_SPEED_GEN2 2 | |
67 | ||
68 | #define GDDR_VENDOR_SAMSUNG 1 | |
69 | #define GDDR_VENDOR_QIMONDA 2 | |
70 | #define GDDR_VENDOR_HYNIX 6 | |
71 | ||
72 | #define GDDR_DENSITY_512MB 0 | |
73 | #define GDDR_DENSITY_1GB 1 | |
74 | ||
75 | typedef struct mic_brd_config { | |
76 | int bc_brdnum; | |
77 | struct { | |
78 | char step[4]; | |
79 | int freqMhz; | |
80 | int vid; | |
81 | int uvolts; | |
82 | } bc_core; | |
83 | struct { | |
84 | unsigned short vendor; | |
85 | unsigned short device; | |
86 | unsigned int class; | |
87 | char capableSpeed; | |
88 | char capableWidth; | |
89 | char currentSpeed; | |
90 | char currentWidth; | |
91 | } bc_pcie; | |
92 | struct { | |
93 | char vendor; | |
94 | char density; | |
95 | char fifoDepth; | |
96 | short freq; // MT/sec | |
97 | int size; // Mbytes | |
98 | } bc_gddr; | |
99 | int bc_uOSstate; | |
100 | } mic_brd_config_t; | |
101 | ||
102 | #define MIC_UPLOAD_UOS _IOWR('l', 1, struct mic_upload) | |
103 | #define MIC_RESET_UOS _IOWR('l', 2, int) | |
104 | #define MIC_SYS_CONFIG _IOWR('l', 3, struct mic_sys_config) | |
105 | #define MIC_BRD_CONFIG _IOWR('l', 4, struct mic_brd_config) | |
106 | ||
107 | #endif // MICDLDR_H | |
108 |