| 1 | /* |
| 2 | * Copyright 2010-2017 Intel Corporation. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License, version 2, |
| 6 | * as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 11 | * General Public License for more details. |
| 12 | * |
| 13 | * Disclaimer: The codes contained in these modules may be specific to |
| 14 | * the Intel Software Development Platform codenamed Knights Ferry, |
| 15 | * and the Intel product codenamed Knights Corner, and are not backward |
| 16 | * compatible with other Intel products. Additionally, Intel will NOT |
| 17 | * support the codes or instruction set in future products. |
| 18 | * |
| 19 | * Intel offers no warranty of any kind regarding the code. This code is |
| 20 | * licensed on an "AS IS" basis and Intel is not obligated to provide |
| 21 | * any support, assistance, installation, training, or other services |
| 22 | * of any kind. Intel is also not obligated to provide any updates, |
| 23 | * enhancements or extensions. Intel specifically disclaims any warranty |
| 24 | * of merchantability, non-infringement, fitness for any particular |
| 25 | * purpose, and any other warranty. |
| 26 | * |
| 27 | * Further, Intel disclaims all liability of any kind, including but |
| 28 | * not limited to liability for infringement of any proprietary rights, |
| 29 | * relating to the use of the code, even if Intel is notified of the |
| 30 | * possibility of such liability. Except as expressly stated in an Intel |
| 31 | * license agreement provided with this code and agreed upon with Intel, |
| 32 | * no license, express or implied, by estoppel or otherwise, to any |
| 33 | * intellectual property rights is granted herein. |
| 34 | */ |
| 35 | |
| 36 | /* Contains common definitions for Windows and Linux IO Interface */ |
| 37 | |
| 38 | #ifndef __IO_INTERFACE_H__ |
| 39 | #define __IO_INTERFACE_H__ |
| 40 | |
| 41 | /* |
| 42 | * The host driver exports sysfs entries in |
| 43 | * /sys/class/mic/micX/ |
| 44 | * The "/sys/class/mic/micX/state" entry reflects the state of the |
| 45 | * card as it transitions from hardware reset through booting an image |
| 46 | * |
| 47 | * All the other entries have valid values when the state entry is either |
| 48 | * "ready" or "online" |
| 49 | */ |
| 50 | |
| 51 | /* |
| 52 | * ----------------------------------------- |
| 53 | * IOCTL interface information |
| 54 | * ----------------------------------------- |
| 55 | */ |
| 56 | |
| 57 | #define IOCTL_FLASHCMD _IOWR('c', 5, struct ctrlioctl_flashcmd *) |
| 58 | #define IOCTL_CARDMEMCPY _IOWR('c', 8, struct ctrlioctl_cardmemcpy *) |
| 59 | |
| 60 | typedef enum _product_knc_stepping_t |
| 61 | { |
| 62 | KNC_A_STEP, |
| 63 | KNC_B0_STEP, |
| 64 | KNC_C_STEP, |
| 65 | KNC_B1_STEP |
| 66 | } product_knc_stepping_t; |
| 67 | |
| 68 | typedef enum { |
| 69 | FLASH_CMD_ABORT, |
| 70 | FLASH_CMD_READ, |
| 71 | FLASH_CMD_WRITE, |
| 72 | FLASH_CMD_VERSION, |
| 73 | RAS_CMD, |
| 74 | RAS_CMD_INJECT_REPAIR, |
| 75 | RAS_CMD_CORE_DISABLE, |
| 76 | RAS_CMD_CORE_ENABLE, |
| 77 | RAS_CMD_ECC_DISABLE = 0xD, |
| 78 | RAS_CMD_ECC_ENABLE = 0xE, |
| 79 | RAS_CMD_EXIT = 0xF, |
| 80 | /* Driver only commands that are not passed to RASMM */ |
| 81 | FLASH_CMD_READ_DATA, |
| 82 | FLASH_CMD_STATUS, |
| 83 | } MIC_FLASH_CMD_TYPE; |
| 84 | |
| 85 | /** |
| 86 | * struct ctrlioctl_flashcmd: |
| 87 | * |
| 88 | * \param brdnum board for which IOCLT is requested |
| 89 | * \param type arguments needed for the uos escape call |
| 90 | * \param data size of escape arguments |
| 91 | * \param len uos escape opecode |
| 92 | * |
| 93 | * This structure is used for IOCTL_FLASHCMD. |
| 94 | * |
| 95 | * This IOCTL can only be issued when /sys/class/mic/mic0/state returns "online" |
| 96 | * after it has been set to "boot:flash" |
| 97 | */ |
| 98 | struct ctrlioctl_flashcmd { |
| 99 | uint32_t brdnum; |
| 100 | MIC_FLASH_CMD_TYPE type; |
| 101 | void *data; |
| 102 | uint32_t len; |
| 103 | }; |
| 104 | |
| 105 | |
| 106 | /* |
| 107 | * IN/OUT structure used by MIC_FLASH_CMD_TYPE FLASH_CMD_VERSION |
| 108 | * This structure is passed in as data in above command |
| 109 | */ |
| 110 | #define MAX_FLASH_VER_STRLEN 16 |
| 111 | struct version_struct { |
| 112 | uint16_t hdr_ver; |
| 113 | uint16_t odm_ver;//revision for ODM change for flash |
| 114 | uint64_t upd_time_bcd; |
| 115 | uint8_t upd_ver[MAX_FLASH_VER_STRLEN]; // 16 bytes for flash version |
| 116 | uint64_t mfg_time_bcd; |
| 117 | uint8_t mfg_ver[MAX_FLASH_VER_STRLEN]; // 16 bytes for flash version |
| 118 | }; |
| 119 | |
| 120 | /* |
| 121 | * status values returned in MIC_FLASH_CMD_TYPE FLASH_CMD_STATUS |
| 122 | */ |
| 123 | typedef enum { |
| 124 | FLASH_IDLE, |
| 125 | FLASH_CMD_IN_PROGRESS, |
| 126 | FLASH_CMD_COMPLETED, |
| 127 | FLASH_CMD_FAILED, |
| 128 | FLASH_CMD_AUTH_FAILED, |
| 129 | FLASH_SMC_CMD_IN_PROGRESS, |
| 130 | FLASH_SMC_CMD_COMPLETE, |
| 131 | FLASH_SMC_CMD_FAILED, |
| 132 | FLASH_SMC_CMD_AUTH_FAILED, |
| 133 | FLASH_CMD_INVALID = 0xF, |
| 134 | } MIC_FLASH_STATUS; |
| 135 | |
| 136 | struct flash_stat { |
| 137 | MIC_FLASH_STATUS status; |
| 138 | uint32_t percent; |
| 139 | uint32_t smc_status; |
| 140 | uint32_t cmd_data; |
| 141 | uint32_t mm_debug; |
| 142 | }; |
| 143 | |
| 144 | typedef enum { |
| 145 | DBOX, |
| 146 | SBOX, |
| 147 | } MMIO_REGISTER_TYPE; |
| 148 | |
| 149 | /** |
| 150 | * struct ctrlioctl_cardmemcpy: |
| 151 | * |
| 152 | * \param brdnum board for which IOCLT is requested |
| 153 | * \param start card side physical address from which the copy will start |
| 154 | * \param size offset of the register from data is to be read |
| 155 | * \param dest user buffer in which data is to be copied |
| 156 | * |
| 157 | * This structure is used for IOCTL_MMIOREAD. |
| 158 | */ |
| 159 | struct ctrlioctl_cardmemcpy { |
| 160 | uint32_t brdnum; |
| 161 | uint64_t start; |
| 162 | uint64_t size; |
| 163 | void *dest; |
| 164 | }; |
| 165 | |
| 166 | /* |
| 167 | * FIXME:: All the typedefines and structures below and their references need |
| 168 | * to be cleaned up from the driver code |
| 169 | *--------------------------------------------------------------------------- |
| 170 | */ |
| 171 | |
| 172 | typedef enum _product_family_t |
| 173 | { |
| 174 | FAMILY_UNKNOWN = 0, |
| 175 | FAMILY_ABR, |
| 176 | FAMILY_KNC |
| 177 | } product_family_t; |
| 178 | |
| 179 | typedef enum { |
| 180 | USAGE_MODE_NORMAL = 0, |
| 181 | USAGE_MODE_MAINTENANCE, |
| 182 | USAGE_MODE_ZOMBIE, |
| 183 | USAGE_MODE_MEMDIAG, |
| 184 | USAGE_MODE_NORMAL_RESTRICTED, |
| 185 | USAGE_MODE_NOP, |
| 186 | USAGE_MODE_MAX, |
| 187 | |
| 188 | } CARD_USAGE_MODE; |
| 189 | |
| 190 | /* |
| 191 | * SBOX register definitions |
| 192 | * TODO: Remove the bit fields and replace them with bitwise operators |
| 193 | */ |
| 194 | typedef union sbox_scratch1_reg { |
| 195 | uint32_t value; |
| 196 | struct { |
| 197 | uint32_t percent : 7; |
| 198 | uint32_t status : 4; |
| 199 | uint32_t command : 4; |
| 200 | uint32_t smc_status : 4; |
| 201 | uint32_t reserved : 5; |
| 202 | uint32_t cmd_data : 7; |
| 203 | uint32_t mm_debug : 1; |
| 204 | } bits; |
| 205 | } sbox_scratch1_reg_t; |
| 206 | |
| 207 | typedef union sbox_scratch2_reg { |
| 208 | uint32_t value; |
| 209 | struct { |
| 210 | uint32_t bootstrap_ready : 1; |
| 211 | uint32_t bsp_apic_id : 9; |
| 212 | uint32_t reserved : 2; |
| 213 | uint32_t image_addr : 20; |
| 214 | } bits; |
| 215 | } sbox_scratch2_reg_t; |
| 216 | |
| 217 | #endif //!__IO_INTERFACE_H__ |