[OpenSPARC-T2-DV] / design / sys / iop / spc / ifu / rtl / ifu_cmu.v

// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: ifu_cmu.v
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
// 
// For the avoidance of doubt, and except that if any non-GPL license 
// choice is available it will apply instead, Sun elects to use only 
// the General Public License version 2 (GPLv2) at this time for any 
// software where a choice of GPL license versions is made 
// available with the language indicating that GPLv2 or any later version 
// may be used, or where a choice of which version of the GPL is applied is 
// otherwise unspecified. 
//
// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
// CA 95054 USA or visit www.sun.com if you need additional information or 
// have any questions. 
// 
// ========== Copyright Header End ============================================
module ifu_cmu (
  tcu_scan_en, 
  l2clk, 
  spc_aclk, 
  spc_bclk, 
  tcu_pce_ov, 
  scan_in, 
  const_cpuid, 
  lsu_ifu_cmu_pmen, 
  ftu_paddr, 
  ftu_rep_way, 
  ftu_thrx_un_cacheable, 
  ftu_curr_fetch_thr_f, 
  ftu_agc_thr0_cmiss_c, 
  ftu_agc_thr1_cmiss_c, 
  ftu_agc_thr2_cmiss_c, 
  ftu_agc_thr3_cmiss_c, 
  ftu_agc_thr4_cmiss_c, 
  ftu_agc_thr5_cmiss_c, 
  ftu_agc_thr6_cmiss_c, 
  ftu_agc_thr7_cmiss_c, 
  ftu_thr0_inv_req_c, 
  ftu_thr1_inv_req_c, 
  ftu_thr2_inv_req_c, 
  ftu_thr3_inv_req_c, 
  ftu_thr4_inv_req_c, 
  ftu_thr5_inv_req_c, 
  ftu_thr6_inv_req_c, 
  ftu_thr7_inv_req_c, 
  ftu_thr0_redirect_bf, 
  ftu_thr1_redirect_bf, 
  ftu_thr2_redirect_bf, 
  ftu_thr3_redirect_bf, 
  ftu_thr4_redirect_bf, 
  ftu_thr5_redirect_bf, 
  ftu_thr6_redirect_bf, 
  ftu_thr7_redirect_bf, 
  lsu_ifu_ld_index, 
  l15_spc_cpkt, 
  l15_spc_data1, 
  l15_ifu_valid, 
  l15_ifu_grant, 
  gkt_ifu_legal, 
  gkt_ifu_flip_parity, 
  cmu_l2miss, 
  cmu_any_data_ready, 
  cmu_thr0_data_ready, 
  cmu_thr1_data_ready, 
  cmu_thr2_data_ready, 
  cmu_thr3_data_ready, 
  cmu_thr4_data_ready, 
  cmu_thr5_data_ready, 
  cmu_thr6_data_ready, 
  cmu_thr7_data_ready, 
  cmu_any_un_cacheable, 
  cmu_null_st, 
  cmu_dupmiss_st, 
  cmu_rst_dupmiss, 
  cmu_inst0_v, 
  cmu_inst1_v, 
  cmu_inst2_v, 
  cmu_inst3_v, 
  cmu_fill_wrway, 
  cmu_fill_paddr, 
  cmu_fill_inst0, 
  cmu_fill_inst1, 
  cmu_fill_inst2, 
  cmu_fill_inst3, 
  cmu_ic_data, 
  cmu_icache_invalidate, 
  cmu_icache_invalidate_way, 
  cmu_icache_invalidate_index, 
  cmu_icache_inv_way1, 
  cmu_evic_invalidate, 
  cmu_inval_ack, 
  cmu_l2_err, 
  ifu_l15_valid, 
  ifu_l15_cpkt, 
  ifu_l15_addr, 
  ifu_lsu_if_vld, 
  ifu_lsu_if_tid, 
  ifu_lsu_if_addr, 
  scan_out) ;
wire [7:0] ftu_cmiss;
wire [7:0] ftu_inv_req;
wire [7:0] ftu_redirect;
wire [7:0] cmu_data_ready;
wire [7:0] mct_rst_dupmiss;
wire [7:0] ftu_fetch_f;
wire [7:0] csm_valid_req;
wire [7:0] cmu_req_st;
wire [7:0] cmu_canleave_st;
wire cmsm_top_scanin;
wire cmsm_top_scanout;
wire [7:0] mct_fill_complete;
wire [7:0] lsc_l15_valid;
wire [7:0] cmu_has_dup_miss;
wire mct_ignore_cmiss;
wire lsc_fill_rtn1;
wire lsc_fill_rtn2;
wire [7:0] lsc_req_sel;
wire lsc_pending_req;
wire lsi_ctl_scanin;
wire lsi_ctl_scanout;
wire mct_early_req;
wire mdp_lsi_nc_bit;
wire mdp_lsi_inv_bit;
wire [2:0] mdp_lsi_rway;
wire lsi_dp_scanin;
wire lsi_dp_scanout;
wire [7:0] mct_clken;
wire [7:0] mct_upd_addr;
wire [7:0] mct_real_wom;
wire missbuff_ctl_scanin;
wire missbuff_ctl_scanout;
wire [7:0] mdp_mbhit_q;
wire missbuff_dp_scanin;
wire missbuff_dp_scanout;
wire [7:0] lsc_data_sel;
wire lsc_clken;


input tcu_scan_en ;
input l2clk;
input spc_aclk;
input spc_bclk;
input tcu_pce_ov;
input scan_in;

input [2:0] const_cpuid;
input       lsu_ifu_cmu_pmen;

input [39:0] ftu_paddr;
input [2:0]  ftu_rep_way;  
input        ftu_thrx_un_cacheable;

input [7:0]  ftu_curr_fetch_thr_f;


input        ftu_agc_thr0_cmiss_c;
input        ftu_agc_thr1_cmiss_c;
input        ftu_agc_thr2_cmiss_c;
input        ftu_agc_thr3_cmiss_c;
input        ftu_agc_thr4_cmiss_c;
input        ftu_agc_thr5_cmiss_c;
input        ftu_agc_thr6_cmiss_c;
input        ftu_agc_thr7_cmiss_c;

input        ftu_thr0_inv_req_c;  
input        ftu_thr1_inv_req_c;  
input        ftu_thr2_inv_req_c;  
input        ftu_thr3_inv_req_c;  
input        ftu_thr4_inv_req_c;  
input        ftu_thr5_inv_req_c;  
input        ftu_thr6_inv_req_c;  
input        ftu_thr7_inv_req_c;  


input        ftu_thr0_redirect_bf;
input        ftu_thr1_redirect_bf;
input        ftu_thr2_redirect_bf;
input        ftu_thr3_redirect_bf;
input        ftu_thr4_redirect_bf;
input        ftu_thr5_redirect_bf;
input        ftu_thr6_redirect_bf;
input        ftu_thr7_redirect_bf;


input [10:5] lsu_ifu_ld_index;

input [17:0] l15_spc_cpkt;                                               
input [127:0] l15_spc_data1;                                               
input         l15_ifu_valid;                                               
input         l15_ifu_grant;
input [3:0]   gkt_ifu_legal;
input [3:0]   gkt_ifu_flip_parity;


output        cmu_l2miss;


output        cmu_any_data_ready;
output        cmu_thr0_data_ready;   
output        cmu_thr1_data_ready;  
output        cmu_thr2_data_ready;  
output        cmu_thr3_data_ready;  
output        cmu_thr4_data_ready;  
output        cmu_thr5_data_ready;  
output        cmu_thr6_data_ready;  
output        cmu_thr7_data_ready;

output        cmu_any_un_cacheable;


output [7:0] cmu_null_st;
output [7:0] cmu_dupmiss_st;
output [7:0] cmu_rst_dupmiss;
   
output        cmu_inst0_v;                            
output        cmu_inst1_v;                            
output        cmu_inst2_v;                            
output        cmu_inst3_v;                            

output [2:0]  cmu_fill_wrway;                    //MB to ??
output [39:0] cmu_fill_paddr;
output [32:0] cmu_fill_inst0;
output [32:0] cmu_fill_inst1;
output [32:0] cmu_fill_inst2;
output [32:0] cmu_fill_inst3;
output [263:0] cmu_ic_data;

output         cmu_icache_invalidate;
output [2:0]   cmu_icache_invalidate_way;
output [10:5]  cmu_icache_invalidate_index;
output [2:0]   cmu_icache_inv_way1;
output         cmu_evic_invalidate;
output [7:0]   cmu_inval_ack;
output [1:0]   cmu_l2_err;

// **** gkt Interface ****
output        ifu_l15_valid;                   // Valid to L15
output [7:0] ifu_l15_cpkt;                    // Control packet to L15
output [39:0] ifu_l15_addr;                    // Address to L15


// **** LSU Interface ****
output         ifu_lsu_if_vld;
output [2:0]   ifu_lsu_if_tid;
output [10:5]  ifu_lsu_if_addr;


output         scan_out;


assign ftu_cmiss[7:0] = {ftu_agc_thr7_cmiss_c,ftu_agc_thr6_cmiss_c,ftu_agc_thr5_cmiss_c,ftu_agc_thr4_cmiss_c,
                         ftu_agc_thr3_cmiss_c,ftu_agc_thr2_cmiss_c,ftu_agc_thr1_cmiss_c,ftu_agc_thr0_cmiss_c};

assign ftu_inv_req[7:0] = {ftu_thr7_inv_req_c,ftu_thr6_inv_req_c,ftu_thr5_inv_req_c,ftu_thr4_inv_req_c,
                           ftu_thr3_inv_req_c,ftu_thr2_inv_req_c,ftu_thr1_inv_req_c,ftu_thr0_inv_req_c};

assign ftu_redirect[7:0] = {ftu_thr7_redirect_bf,ftu_thr6_redirect_bf,ftu_thr5_redirect_bf,ftu_thr4_redirect_bf,
                            ftu_thr3_redirect_bf,ftu_thr2_redirect_bf,ftu_thr1_redirect_bf,ftu_thr0_redirect_bf};

assign {cmu_thr7_data_ready,cmu_thr6_data_ready,cmu_thr5_data_ready,cmu_thr4_data_ready,
        cmu_thr3_data_ready,cmu_thr2_data_ready,cmu_thr1_data_ready,cmu_thr0_data_ready} = cmu_data_ready[7:0];

assign cmu_rst_dupmiss[7:0] = mct_rst_dupmiss[7:0];

assign ftu_fetch_f[7:0] = ftu_curr_fetch_thr_f[7:0];

   
ifu_cmu_cmt_ctl cmt (
                          /*AUTOINST*/
                          // Outputs
                          .csm_valid_req(csm_valid_req[7:0]),
                          .cmu_null_st(cmu_null_st[7:0]),
                          .cmu_req_st(cmu_req_st[7:0]),
                          .cmu_canleave_st(cmu_canleave_st[7:0]),
                          .cmu_dupmiss_st(cmu_dupmiss_st[7:0]),
                          // Inputs
                          .tcu_pce_ov   (tcu_pce_ov),
                          .spc_aclk (spc_aclk),
                          .spc_bclk (spc_bclk),
                          .scan_in(cmsm_top_scanin),
                          .scan_out(cmsm_top_scanout),
                          .l2clk        (l2clk),
                          .ftu_cmiss    (ftu_cmiss[7:0]),
                          .ftu_redirect (ftu_redirect[7:0]),
                          .mct_fill_complete(mct_fill_complete[7:0]),
                          .ftu_inv_req  (ftu_inv_req[7:0]),
                          .lsc_l15_valid(lsc_l15_valid[7:0]),
                          .cmu_data_ready(cmu_data_ready[7:0]),
                          .cmu_has_dup_miss(cmu_has_dup_miss[7:0]),
                          .mct_rst_dupmiss(mct_rst_dupmiss[7:0]),
                          .mct_ignore_cmiss(mct_ignore_cmiss),
  .tcu_scan_en(tcu_scan_en),
  .mdp_mbhit_q(mdp_mbhit_q[7:0]));


ifu_cmu_lsi_ctl lsc (
                         /*AUTOINST*/
                         // Outputs
                         .lsc_fill_rtn1 (lsc_fill_rtn1),
                         .lsc_fill_rtn2 (lsc_fill_rtn2),
                         .lsc_req_sel   (lsc_req_sel[7:0]),
                         .lsc_pending_req(lsc_pending_req),
                         .lsc_l15_valid (lsc_l15_valid[7:0]),
                         .cmu_any_data_ready(cmu_any_data_ready),
                         .cmu_any_un_cacheable(cmu_any_un_cacheable),
                         .cmu_data_ready(cmu_data_ready[7:0]),
                         .cmu_inst0_v   (cmu_inst0_v),
                         .cmu_inst1_v   (cmu_inst1_v),
                         .cmu_inst2_v   (cmu_inst2_v),
                         .cmu_inst3_v   (cmu_inst3_v),
                         .cmu_icache_invalidate(cmu_icache_invalidate),
                         .cmu_icache_invalidate_way(cmu_icache_invalidate_way[2:0]),
                         .cmu_icache_invalidate_index(cmu_icache_invalidate_index[10:5]),
                         .cmu_evic_invalidate(cmu_evic_invalidate),
                         .cmu_icache_inv_way1(cmu_icache_inv_way1[2:0]),
                         .cmu_inval_ack (cmu_inval_ack[7:0]),
                         .cmu_l2_err    (cmu_l2_err[1:0]),
                         .cmu_l2miss    (cmu_l2miss),
                         .ifu_l15_valid (ifu_l15_valid),
                         .ifu_l15_cpkt  (ifu_l15_cpkt[7:0]),
                         .ifu_lsu_if_vld(ifu_lsu_if_vld),
                         .ifu_lsu_if_tid(ifu_lsu_if_tid[2:0]),
                         .ifu_lsu_if_addr(ifu_lsu_if_addr[10:5]),
                         // Inputs
                         .scan_in(lsi_ctl_scanin),
                         .scan_out(lsi_ctl_scanout),
                         .l2clk         (l2clk),
                         .tcu_pce_ov    (tcu_pce_ov),
                         .spc_aclk  (spc_aclk),
                         .spc_bclk  (spc_bclk),
                         .const_cpuid   (const_cpuid[2:0]),
                         .lsu_ifu_cmu_pmen   (lsu_ifu_cmu_pmen),
                         .ftu_cmiss(ftu_cmiss[7:0]),
                         .mct_early_req (mct_early_req),
                         .ftu_rep_way   (ftu_rep_way[2:0]),
                         .ftu_thrx_un_cacheable(ftu_thrx_un_cacheable),
                         .ifu_l15_addr  (ifu_l15_addr[10:5]),
                         .csm_valid_req (csm_valid_req[7:0]),
                         .l15_spc_data1 (l15_spc_data1[127:0]),
                         .l15_spc_cpkt  (l15_spc_cpkt[17:0]),
                         .l15_ifu_valid (l15_ifu_valid),
                         .l15_ifu_grant (l15_ifu_grant),
                         .lsu_ifu_ld_index(lsu_ifu_ld_index[10:5]),
                         .cmu_fill_paddr(cmu_fill_paddr[4:2]),
                         .mdp_lsi_nc_bit(mdp_lsi_nc_bit),
                         .mdp_lsi_inv_bit(mdp_lsi_inv_bit),
                         .mdp_lsi_rway  (mdp_lsi_rway[2:0]),
  .tcu_scan_en(tcu_scan_en),
  .lsc_data_sel(lsc_data_sel[7:0]),
  .lsc_clken(lsc_clken));


ifu_cmu_lsi_dp  lsd (
                        /*AUTOINST*/
                        // Outputs
                        .cmu_ic_data    (cmu_ic_data[263:0]),
                        .cmu_fill_inst0 (cmu_fill_inst0[32:0]),
                        .cmu_fill_inst1 (cmu_fill_inst1[32:0]),
                        .cmu_fill_inst2 (cmu_fill_inst2[32:0]),
                        .cmu_fill_inst3 (cmu_fill_inst3[32:0]),
                        // Inputs
                        .scan_in(lsi_dp_scanin),
                        .scan_out(lsi_dp_scanout),
                        .l2clk          (l2clk),
                        .spc_aclk   (spc_aclk),
                        .spc_bclk   (spc_bclk),
                        .tcu_pce_ov     (tcu_pce_ov),
                        .l15_spc_data1  (l15_spc_data1[127:0]),
                        .lsc_fill_rtn1  (lsc_fill_rtn1),
                     .lsc_fill_rtn2  (lsc_fill_rtn2),
  .tcu_scan_en(tcu_scan_en),
  .lsc_clken(lsc_clken),
  .lsc_data_sel(lsc_data_sel[7:0]),
  .gkt_ifu_legal(gkt_ifu_legal[3:0]),
  .gkt_ifu_flip_parity(gkt_ifu_flip_parity[3:0]));


ifu_cmu_msb_ctl mct (
                              /*AUTOINST*/
                              // Outputs
                              .mct_clken(mct_clken[7:0]),
                              .mct_early_req(mct_early_req),
                              .mct_upd_addr(mct_upd_addr[7:0]),
                              .mct_real_wom(mct_real_wom[7:0]),
                              .cmu_has_dup_miss(cmu_has_dup_miss[7:0]),
                              .mct_rst_dupmiss(mct_rst_dupmiss[7:0]),
                              .mct_fill_complete(mct_fill_complete[7:0]),
                              .mct_ignore_cmiss(mct_ignore_cmiss),
                              // Inputs
                              .scan_in(missbuff_ctl_scanin),
                              .scan_out(missbuff_ctl_scanout),
                              .l2clk    (l2clk),
                              .tcu_pce_ov(tcu_pce_ov),
                              .spc_aclk(spc_aclk),
                              .spc_bclk(spc_bclk),
                              .lsu_ifu_cmu_pmen   (lsu_ifu_cmu_pmen),
                              .ftu_cmiss(ftu_cmiss[7:0]),
                              .ftu_fetch_f(ftu_fetch_f[7:0]),
                              .ftu_inv_req(ftu_inv_req[7:0]),
                              .ftu_redirect(ftu_redirect[7:0]),
                              .l15_spc_cpkt(l15_spc_cpkt[8:6]),
                              .cmu_req_st(cmu_req_st[7:0]),
                              .cmu_canleave_st(cmu_canleave_st[7:0]),
                              .lsc_l15_valid(lsc_l15_valid[7:0]),
                              .cmu_data_ready(cmu_data_ready[7:0]),
                              .lsc_fill_rtn2(lsc_fill_rtn2),
                              .mdp_mbhit_q(mdp_mbhit_q[7:0]),
  .tcu_scan_en(tcu_scan_en));


ifu_cmu_msb_dp mdp (
                            /*AUTOINST*/
                            // Outputs
                            .mdp_mbhit_q(mdp_mbhit_q[7:0]),
                            .mdp_lsi_rway(mdp_lsi_rway[2:0]),
                            .ifu_l15_addr(ifu_l15_addr[39:0]),
                            .mdp_lsi_nc_bit(mdp_lsi_nc_bit),
                            .mdp_lsi_inv_bit(mdp_lsi_inv_bit),
                            .cmu_fill_wrway(cmu_fill_wrway[2:0]),
                            .cmu_fill_paddr(cmu_fill_paddr[39:0]),
                            // Inputs
                            .scan_in(missbuff_dp_scanin),
                            .scan_out(missbuff_dp_scanout),
                            .l2clk      (l2clk),
                            .tcu_pce_ov (tcu_pce_ov),
                            .spc_aclk(spc_aclk),
                            .spc_bclk(spc_bclk),
                            .l15_spc_cpkt(l15_spc_cpkt[8:6]),
                            .ftu_paddr  (ftu_paddr[39:0]),
                            .ftu_rep_way(ftu_rep_way[2:0]),
                            .ftu_inv_req(ftu_inv_req[7:0]),
                            .ftu_thrx_un_cacheable(ftu_thrx_un_cacheable),
                            .lsc_pending_req(lsc_pending_req),
                            .lsc_req_sel(lsc_req_sel[7:0]),
                              .mct_real_wom(mct_real_wom[7:0]),
                    .mct_upd_addr(mct_upd_addr[7:0]),
  .tcu_scan_en(tcu_scan_en),
  .mct_clken(mct_clken[7:0]));


// fixscan start:
assign cmsm_top_scanin           = scan_in                  ;
assign lsi_ctl_scanin            = cmsm_top_scanout         ;
assign lsi_dp_scanin             = lsi_ctl_scanout          ;
assign missbuff_ctl_scanin       = lsi_dp_scanout           ;
assign missbuff_dp_scanin        = missbuff_ctl_scanout     ;
assign scan_out                  = missbuff_dp_scanout      ;
// fixscan end:
endmodule
Commit	Line	Data
86530b38 AT	1	// ========== Copyright Header Begin ==========================================
	2	//
	3	// OpenSPARC T2 Processor File: ifu_cmu.v
	4	// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
	5	// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
	6	//
	7	// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
	8	//
	9	// This program is free software; you can redistribute it and/or modify
	10	// it under the terms of the GNU General Public License as published by
	11	// the Free Software Foundation; version 2 of the License.
	12	//
	13	// This program is distributed in the hope that it will be useful,
	14	// but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	// GNU General Public License for more details.
	17	//
	18	// You should have received a copy of the GNU General Public License
	19	// along with this program; if not, write to the Free Software
	20	// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	21	//
	22	// For the avoidance of doubt, and except that if any non-GPL license
	23	// choice is available it will apply instead, Sun elects to use only
	24	// the General Public License version 2 (GPLv2) at this time for any
	25	// software where a choice of GPL license versions is made
	26	// available with the language indicating that GPLv2 or any later version
	27	// may be used, or where a choice of which version of the GPL is applied is
	28	// otherwise unspecified.
	29	//
	30	// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
	31	// CA 95054 USA or visit www.sun.com if you need additional information or
	32	// have any questions.
	33	//
	34	// ========== Copyright Header End ============================================
	35	module ifu_cmu (
	36	tcu_scan_en,
	37	l2clk,
	38	spc_aclk,
	39	spc_bclk,
	40	tcu_pce_ov,
	41	scan_in,
	42	const_cpuid,
	43	lsu_ifu_cmu_pmen,
	44	ftu_paddr,
	45	ftu_rep_way,
	46	ftu_thrx_un_cacheable,
	47	ftu_curr_fetch_thr_f,
	48	ftu_agc_thr0_cmiss_c,
	49	ftu_agc_thr1_cmiss_c,
	50	ftu_agc_thr2_cmiss_c,
	51	ftu_agc_thr3_cmiss_c,
	52	ftu_agc_thr4_cmiss_c,
	53	ftu_agc_thr5_cmiss_c,
	54	ftu_agc_thr6_cmiss_c,
	55	ftu_agc_thr7_cmiss_c,
	56	ftu_thr0_inv_req_c,
	57	ftu_thr1_inv_req_c,
	58	ftu_thr2_inv_req_c,
	59	ftu_thr3_inv_req_c,
	60	ftu_thr4_inv_req_c,
	61	ftu_thr5_inv_req_c,
	62	ftu_thr6_inv_req_c,
	63	ftu_thr7_inv_req_c,
	64	ftu_thr0_redirect_bf,
65	ftu_thr1_redirect_bf,
66	ftu_thr2_redirect_bf,
67	ftu_thr3_redirect_bf,
68	ftu_thr4_redirect_bf,
69	ftu_thr5_redirect_bf,
70	ftu_thr6_redirect_bf,
71	ftu_thr7_redirect_bf,
72	lsu_ifu_ld_index,
73	l15_spc_cpkt,
74	l15_spc_data1,
75	l15_ifu_valid,
76	l15_ifu_grant,
77	gkt_ifu_legal,
78	gkt_ifu_flip_parity,
79	cmu_l2miss,
80	cmu_any_data_ready,
81	cmu_thr0_data_ready,
82	cmu_thr1_data_ready,
83	cmu_thr2_data_ready,
84	cmu_thr3_data_ready,
85	cmu_thr4_data_ready,
86	cmu_thr5_data_ready,
87	cmu_thr6_data_ready,
88	cmu_thr7_data_ready,
89	cmu_any_un_cacheable,
90	cmu_null_st,
91	cmu_dupmiss_st,
92	cmu_rst_dupmiss,
93	cmu_inst0_v,
94	cmu_inst1_v,
95	cmu_inst2_v,
96	cmu_inst3_v,
97	cmu_fill_wrway,
98	cmu_fill_paddr,
99	cmu_fill_inst0,
100	cmu_fill_inst1,
101	cmu_fill_inst2,
102	cmu_fill_inst3,
103	cmu_ic_data,
104	cmu_icache_invalidate,
105	cmu_icache_invalidate_way,
106	cmu_icache_invalidate_index,
107	cmu_icache_inv_way1,
108	cmu_evic_invalidate,
109	cmu_inval_ack,
110	cmu_l2_err,
111	ifu_l15_valid,
112	ifu_l15_cpkt,
113	ifu_l15_addr,
114	ifu_lsu_if_vld,
115	ifu_lsu_if_tid,
116	ifu_lsu_if_addr,
117	scan_out) ;
118	wire [7:0] ftu_cmiss;
119	wire [7:0] ftu_inv_req;
120	wire [7:0] ftu_redirect;
121	wire [7:0] cmu_data_ready;
122	wire [7:0] mct_rst_dupmiss;
123	wire [7:0] ftu_fetch_f;
124	wire [7:0] csm_valid_req;
125	wire [7:0] cmu_req_st;
126	wire [7:0] cmu_canleave_st;
127	wire cmsm_top_scanin;
128	wire cmsm_top_scanout;
129	wire [7:0] mct_fill_complete;
130	wire [7:0] lsc_l15_valid;
131	wire [7:0] cmu_has_dup_miss;
132	wire mct_ignore_cmiss;
133	wire lsc_fill_rtn1;
134	wire lsc_fill_rtn2;
135	wire [7:0] lsc_req_sel;
136	wire lsc_pending_req;
137	wire lsi_ctl_scanin;
138	wire lsi_ctl_scanout;
139	wire mct_early_req;
140	wire mdp_lsi_nc_bit;
141	wire mdp_lsi_inv_bit;
142	wire [2:0] mdp_lsi_rway;
143	wire lsi_dp_scanin;
144	wire lsi_dp_scanout;
145	wire [7:0] mct_clken;
146	wire [7:0] mct_upd_addr;
147	wire [7:0] mct_real_wom;
148	wire missbuff_ctl_scanin;
149	wire missbuff_ctl_scanout;
150	wire [7:0] mdp_mbhit_q;
151	wire missbuff_dp_scanin;
152	wire missbuff_dp_scanout;
153	wire [7:0] lsc_data_sel;
154	wire lsc_clken;
155
156
157
158	input tcu_scan_en ;
159	input l2clk;
160	input spc_aclk;
161	input spc_bclk;
162	input tcu_pce_ov;
163	input scan_in;
164
165	input [2:0] const_cpuid;
166	input lsu_ifu_cmu_pmen;
167
168	input [39:0] ftu_paddr;
169	input [2:0] ftu_rep_way;
170	input ftu_thrx_un_cacheable;
171
172	input [7:0] ftu_curr_fetch_thr_f;
173
174
175	input ftu_agc_thr0_cmiss_c;
176	input ftu_agc_thr1_cmiss_c;
177	input ftu_agc_thr2_cmiss_c;
178	input ftu_agc_thr3_cmiss_c;
179	input ftu_agc_thr4_cmiss_c;
180	input ftu_agc_thr5_cmiss_c;
181	input ftu_agc_thr6_cmiss_c;
182	input ftu_agc_thr7_cmiss_c;
183
184	input ftu_thr0_inv_req_c;
185	input ftu_thr1_inv_req_c;
186	input ftu_thr2_inv_req_c;
187	input ftu_thr3_inv_req_c;
188	input ftu_thr4_inv_req_c;
189	input ftu_thr5_inv_req_c;
190	input ftu_thr6_inv_req_c;
191	input ftu_thr7_inv_req_c;
192
193
194	input ftu_thr0_redirect_bf;
195	input ftu_thr1_redirect_bf;
196	input ftu_thr2_redirect_bf;
197	input ftu_thr3_redirect_bf;
198	input ftu_thr4_redirect_bf;
199	input ftu_thr5_redirect_bf;
200	input ftu_thr6_redirect_bf;
201	input ftu_thr7_redirect_bf;
202
203
204	input [10:5] lsu_ifu_ld_index;
205
206	input [17:0] l15_spc_cpkt;
207	input [127:0] l15_spc_data1;
208	input l15_ifu_valid;
209	input l15_ifu_grant;
210	input [3:0] gkt_ifu_legal;
211	input [3:0] gkt_ifu_flip_parity;
212
213
214
215	output cmu_l2miss;
216
217
218	output cmu_any_data_ready;
219	output cmu_thr0_data_ready;
220	output cmu_thr1_data_ready;
221	output cmu_thr2_data_ready;
222	output cmu_thr3_data_ready;
223	output cmu_thr4_data_ready;
224	output cmu_thr5_data_ready;
225	output cmu_thr6_data_ready;
226	output cmu_thr7_data_ready;
227
228	output cmu_any_un_cacheable;
229
230
231
232
233	output [7:0] cmu_null_st;
234	output [7:0] cmu_dupmiss_st;
235	output [7:0] cmu_rst_dupmiss;
236
237	output cmu_inst0_v;
238	output cmu_inst1_v;
239	output cmu_inst2_v;
240	output cmu_inst3_v;
241
242	output [2:0] cmu_fill_wrway; //MB to ??
243	output [39:0] cmu_fill_paddr;
244	output [32:0] cmu_fill_inst0;
245	output [32:0] cmu_fill_inst1;
246	output [32:0] cmu_fill_inst2;
247	output [32:0] cmu_fill_inst3;
248	output [263:0] cmu_ic_data;
249
250	output cmu_icache_invalidate;
251	output [2:0] cmu_icache_invalidate_way;
252	output [10:5] cmu_icache_invalidate_index;
253	output [2:0] cmu_icache_inv_way1;
254	output cmu_evic_invalidate;
255	output [7:0] cmu_inval_ack;
256	output [1:0] cmu_l2_err;
257
258	// ** gkt Interface **
259	output ifu_l15_valid; // Valid to L15
260	output [7:0] ifu_l15_cpkt; // Control packet to L15
261	output [39:0] ifu_l15_addr; // Address to L15
262
263
264	// ** LSU Interface **
265	output ifu_lsu_if_vld;
266	output [2:0] ifu_lsu_if_tid;
267	output [10:5] ifu_lsu_if_addr;
268
269
270
271	output scan_out;
272
273
274
275
276	assign ftu_cmiss[7:0] = {ftu_agc_thr7_cmiss_c,ftu_agc_thr6_cmiss_c,ftu_agc_thr5_cmiss_c,ftu_agc_thr4_cmiss_c,
277	ftu_agc_thr3_cmiss_c,ftu_agc_thr2_cmiss_c,ftu_agc_thr1_cmiss_c,ftu_agc_thr0_cmiss_c};
278
279	assign ftu_inv_req[7:0] = {ftu_thr7_inv_req_c,ftu_thr6_inv_req_c,ftu_thr5_inv_req_c,ftu_thr4_inv_req_c,
280	ftu_thr3_inv_req_c,ftu_thr2_inv_req_c,ftu_thr1_inv_req_c,ftu_thr0_inv_req_c};
281
282	assign ftu_redirect[7:0] = {ftu_thr7_redirect_bf,ftu_thr6_redirect_bf,ftu_thr5_redirect_bf,ftu_thr4_redirect_bf,
283	ftu_thr3_redirect_bf,ftu_thr2_redirect_bf,ftu_thr1_redirect_bf,ftu_thr0_redirect_bf};
284
285	assign {cmu_thr7_data_ready,cmu_thr6_data_ready,cmu_thr5_data_ready,cmu_thr4_data_ready,
286	cmu_thr3_data_ready,cmu_thr2_data_ready,cmu_thr1_data_ready,cmu_thr0_data_ready} = cmu_data_ready[7:0];
287
288	assign cmu_rst_dupmiss[7:0] = mct_rst_dupmiss[7:0];
289
290	assign ftu_fetch_f[7:0] = ftu_curr_fetch_thr_f[7:0];
291
292
293
294
295	ifu_cmu_cmt_ctl cmt (
296	/AUTOINST/
297	// Outputs
298	.csm_valid_req(csm_valid_req[7:0]),
299	.cmu_null_st(cmu_null_st[7:0]),
300	.cmu_req_st(cmu_req_st[7:0]),
301	.cmu_canleave_st(cmu_canleave_st[7:0]),
302	.cmu_dupmiss_st(cmu_dupmiss_st[7:0]),
303	// Inputs
304	.tcu_pce_ov (tcu_pce_ov),
305	.spc_aclk (spc_aclk),
306	.spc_bclk (spc_bclk),
307	.scan_in(cmsm_top_scanin),
308	.scan_out(cmsm_top_scanout),
309	.l2clk (l2clk),
310	.ftu_cmiss (ftu_cmiss[7:0]),
311	.ftu_redirect (ftu_redirect[7:0]),
312	.mct_fill_complete(mct_fill_complete[7:0]),
313	.ftu_inv_req (ftu_inv_req[7:0]),
314	.lsc_l15_valid(lsc_l15_valid[7:0]),
315	.cmu_data_ready(cmu_data_ready[7:0]),
316	.cmu_has_dup_miss(cmu_has_dup_miss[7:0]),
317	.mct_rst_dupmiss(mct_rst_dupmiss[7:0]),
318	.mct_ignore_cmiss(mct_ignore_cmiss),
319	.tcu_scan_en(tcu_scan_en),
320	.mdp_mbhit_q(mdp_mbhit_q[7:0]));
321
322
323
324	ifu_cmu_lsi_ctl lsc (
325	/AUTOINST/
326	// Outputs
327	.lsc_fill_rtn1 (lsc_fill_rtn1),
328	.lsc_fill_rtn2 (lsc_fill_rtn2),
329	.lsc_req_sel (lsc_req_sel[7:0]),
330	.lsc_pending_req(lsc_pending_req),
331	.lsc_l15_valid (lsc_l15_valid[7:0]),
332	.cmu_any_data_ready(cmu_any_data_ready),
333	.cmu_any_un_cacheable(cmu_any_un_cacheable),
334	.cmu_data_ready(cmu_data_ready[7:0]),
335	.cmu_inst0_v (cmu_inst0_v),
336	.cmu_inst1_v (cmu_inst1_v),
337	.cmu_inst2_v (cmu_inst2_v),
338	.cmu_inst3_v (cmu_inst3_v),
339	.cmu_icache_invalidate(cmu_icache_invalidate),
340	.cmu_icache_invalidate_way(cmu_icache_invalidate_way[2:0]),
341	.cmu_icache_invalidate_index(cmu_icache_invalidate_index[10:5]),
342	.cmu_evic_invalidate(cmu_evic_invalidate),
343	.cmu_icache_inv_way1(cmu_icache_inv_way1[2:0]),
344	.cmu_inval_ack (cmu_inval_ack[7:0]),
345	.cmu_l2_err (cmu_l2_err[1:0]),
346	.cmu_l2miss (cmu_l2miss),
347	.ifu_l15_valid (ifu_l15_valid),
348	.ifu_l15_cpkt (ifu_l15_cpkt[7:0]),
349	.ifu_lsu_if_vld(ifu_lsu_if_vld),
350	.ifu_lsu_if_tid(ifu_lsu_if_tid[2:0]),
351	.ifu_lsu_if_addr(ifu_lsu_if_addr[10:5]),
352	// Inputs
353	.scan_in(lsi_ctl_scanin),
354	.scan_out(lsi_ctl_scanout),
355	.l2clk (l2clk),
356	.tcu_pce_ov (tcu_pce_ov),
357	.spc_aclk (spc_aclk),
358	.spc_bclk (spc_bclk),
359	.const_cpuid (const_cpuid[2:0]),
360	.lsu_ifu_cmu_pmen (lsu_ifu_cmu_pmen),
361	.ftu_cmiss(ftu_cmiss[7:0]),
362	.mct_early_req (mct_early_req),
363	.ftu_rep_way (ftu_rep_way[2:0]),
364	.ftu_thrx_un_cacheable(ftu_thrx_un_cacheable),
365	.ifu_l15_addr (ifu_l15_addr[10:5]),
366	.csm_valid_req (csm_valid_req[7:0]),
367	.l15_spc_data1 (l15_spc_data1[127:0]),
368	.l15_spc_cpkt (l15_spc_cpkt[17:0]),
369	.l15_ifu_valid (l15_ifu_valid),
370	.l15_ifu_grant (l15_ifu_grant),
371	.lsu_ifu_ld_index(lsu_ifu_ld_index[10:5]),
372	.cmu_fill_paddr(cmu_fill_paddr[4:2]),
373	.mdp_lsi_nc_bit(mdp_lsi_nc_bit),
374	.mdp_lsi_inv_bit(mdp_lsi_inv_bit),
375	.mdp_lsi_rway (mdp_lsi_rway[2:0]),
376	.tcu_scan_en(tcu_scan_en),
377	.lsc_data_sel(lsc_data_sel[7:0]),
378	.lsc_clken(lsc_clken));
379
380
381	ifu_cmu_lsi_dp lsd (
382	/AUTOINST/
383	// Outputs
384	.cmu_ic_data (cmu_ic_data[263:0]),
385	.cmu_fill_inst0 (cmu_fill_inst0[32:0]),
386	.cmu_fill_inst1 (cmu_fill_inst1[32:0]),
387	.cmu_fill_inst2 (cmu_fill_inst2[32:0]),
388	.cmu_fill_inst3 (cmu_fill_inst3[32:0]),
389	// Inputs
390	.scan_in(lsi_dp_scanin),
391	.scan_out(lsi_dp_scanout),
392	.l2clk (l2clk),
393	.spc_aclk (spc_aclk),
394	.spc_bclk (spc_bclk),
395	.tcu_pce_ov (tcu_pce_ov),
396	.l15_spc_data1 (l15_spc_data1[127:0]),
397	.lsc_fill_rtn1 (lsc_fill_rtn1),
398	.lsc_fill_rtn2 (lsc_fill_rtn2),
399	.tcu_scan_en(tcu_scan_en),
400	.lsc_clken(lsc_clken),
401	.lsc_data_sel(lsc_data_sel[7:0]),
402	.gkt_ifu_legal(gkt_ifu_legal[3:0]),
403	.gkt_ifu_flip_parity(gkt_ifu_flip_parity[3:0]));
404
405
406
407
408	ifu_cmu_msb_ctl mct (
409	/AUTOINST/
410	// Outputs
411	.mct_clken(mct_clken[7:0]),
412	.mct_early_req(mct_early_req),
413	.mct_upd_addr(mct_upd_addr[7:0]),
414	.mct_real_wom(mct_real_wom[7:0]),
415	.cmu_has_dup_miss(cmu_has_dup_miss[7:0]),
416	.mct_rst_dupmiss(mct_rst_dupmiss[7:0]),
417	.mct_fill_complete(mct_fill_complete[7:0]),
418	.mct_ignore_cmiss(mct_ignore_cmiss),
419	// Inputs
420	.scan_in(missbuff_ctl_scanin),
421	.scan_out(missbuff_ctl_scanout),
422	.l2clk (l2clk),
423	.tcu_pce_ov(tcu_pce_ov),
424	.spc_aclk(spc_aclk),
425	.spc_bclk(spc_bclk),
426	.lsu_ifu_cmu_pmen (lsu_ifu_cmu_pmen),
427	.ftu_cmiss(ftu_cmiss[7:0]),
428	.ftu_fetch_f(ftu_fetch_f[7:0]),
429	.ftu_inv_req(ftu_inv_req[7:0]),
430	.ftu_redirect(ftu_redirect[7:0]),
431	.l15_spc_cpkt(l15_spc_cpkt[8:6]),
432	.cmu_req_st(cmu_req_st[7:0]),
433	.cmu_canleave_st(cmu_canleave_st[7:0]),
434	.lsc_l15_valid(lsc_l15_valid[7:0]),
435	.cmu_data_ready(cmu_data_ready[7:0]),
436	.lsc_fill_rtn2(lsc_fill_rtn2),
437	.mdp_mbhit_q(mdp_mbhit_q[7:0]),
438	.tcu_scan_en(tcu_scan_en));
439
440
441
442
443
444	ifu_cmu_msb_dp mdp (
445	/AUTOINST/
446	// Outputs
447	.mdp_mbhit_q(mdp_mbhit_q[7:0]),
448	.mdp_lsi_rway(mdp_lsi_rway[2:0]),
449	.ifu_l15_addr(ifu_l15_addr[39:0]),
450	.mdp_lsi_nc_bit(mdp_lsi_nc_bit),
451	.mdp_lsi_inv_bit(mdp_lsi_inv_bit),
452	.cmu_fill_wrway(cmu_fill_wrway[2:0]),
453	.cmu_fill_paddr(cmu_fill_paddr[39:0]),
454	// Inputs
455	.scan_in(missbuff_dp_scanin),
456	.scan_out(missbuff_dp_scanout),
457	.l2clk (l2clk),
458	.tcu_pce_ov (tcu_pce_ov),
459	.spc_aclk(spc_aclk),
460	.spc_bclk(spc_bclk),
461	.l15_spc_cpkt(l15_spc_cpkt[8:6]),
462	.ftu_paddr (ftu_paddr[39:0]),
463	.ftu_rep_way(ftu_rep_way[2:0]),
464	.ftu_inv_req(ftu_inv_req[7:0]),
465	.ftu_thrx_un_cacheable(ftu_thrx_un_cacheable),
466	.lsc_pending_req(lsc_pending_req),
467	.lsc_req_sel(lsc_req_sel[7:0]),
468	.mct_real_wom(mct_real_wom[7:0]),
469	.mct_upd_addr(mct_upd_addr[7:0]),
470	.tcu_scan_en(tcu_scan_en),
471	.mct_clken(mct_clken[7:0]));
472
473
474
475	// fixscan start:
476	assign cmsm_top_scanin = scan_in ;
477	assign lsi_ctl_scanin = cmsm_top_scanout ;
478	assign lsi_dp_scanin = lsi_ctl_scanout ;
479	assign missbuff_ctl_scanin = lsi_dp_scanout ;
480	assign missbuff_dp_scanin = missbuff_ctl_scanout ;
481	assign scan_out = missbuff_dp_scanout ;
482	// fixscan end:
483	endmodule