// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: ifu_cmu.v
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
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// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
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// ========== Copyright Header End ============================================
cmu_icache_invalidate_way,
cmu_icache_invalidate_index,
wire [7:0] cmu_data_ready;
wire [7:0] mct_rst_dupmiss;
wire [7:0] csm_valid_req;
wire [7:0] cmu_canleave_st;
wire [7:0] mct_fill_complete;
wire [7:0] lsc_l15_valid;
wire [7:0] cmu_has_dup_miss;
wire missbuff_ctl_scanin;
wire missbuff_ctl_scanout;
wire missbuff_dp_scanout;
input ftu_thrx_un_cacheable;
input [7:0] ftu_curr_fetch_thr_f;
input ftu_agc_thr0_cmiss_c;
input ftu_agc_thr1_cmiss_c;
input ftu_agc_thr2_cmiss_c;
input ftu_agc_thr3_cmiss_c;
input ftu_agc_thr4_cmiss_c;
input ftu_agc_thr5_cmiss_c;
input ftu_agc_thr6_cmiss_c;
input ftu_agc_thr7_cmiss_c;
input ftu_thr0_inv_req_c;
input ftu_thr1_inv_req_c;
input ftu_thr2_inv_req_c;
input ftu_thr3_inv_req_c;
input ftu_thr4_inv_req_c;
input ftu_thr5_inv_req_c;
input ftu_thr6_inv_req_c;
input ftu_thr7_inv_req_c;
input ftu_thr0_redirect_bf;
input ftu_thr1_redirect_bf;
input ftu_thr2_redirect_bf;
input ftu_thr3_redirect_bf;
input ftu_thr4_redirect_bf;
input ftu_thr5_redirect_bf;
input ftu_thr6_redirect_bf;
input ftu_thr7_redirect_bf;
input [10:5] lsu_ifu_ld_index;
input [17:0] l15_spc_cpkt;
input [127:0] l15_spc_data1;
input [3:0] gkt_ifu_legal;
input [3:0] gkt_ifu_flip_parity;
output cmu_any_data_ready;
output cmu_thr0_data_ready;
output cmu_thr1_data_ready;
output cmu_thr2_data_ready;
output cmu_thr3_data_ready;
output cmu_thr4_data_ready;
output cmu_thr5_data_ready;
output cmu_thr6_data_ready;
output cmu_thr7_data_ready;
output cmu_any_un_cacheable;
output [7:0] cmu_null_st;
output [7:0] cmu_dupmiss_st;
output [7:0] cmu_rst_dupmiss;
output [2:0] cmu_fill_wrway; //MB to ??
output [39:0] cmu_fill_paddr;
output [32:0] cmu_fill_inst0;
output [32:0] cmu_fill_inst1;
output [32:0] cmu_fill_inst2;
output [32:0] cmu_fill_inst3;
output [263:0] cmu_ic_data;
output cmu_icache_invalidate;
output [2:0] cmu_icache_invalidate_way;
output [10:5] cmu_icache_invalidate_index;
output [2:0] cmu_icache_inv_way1;
output cmu_evic_invalidate;
output [7:0] cmu_inval_ack;
// **** gkt Interface ****
output ifu_l15_valid; // Valid to L15
output [7:0] ifu_l15_cpkt; // Control packet to L15
output [39:0] ifu_l15_addr; // Address to L15
// **** LSU Interface ****
output [2:0] ifu_lsu_if_tid;
output [10:5] ifu_lsu_if_addr;
assign ftu_cmiss[7:0] = {ftu_agc_thr7_cmiss_c,ftu_agc_thr6_cmiss_c,ftu_agc_thr5_cmiss_c,ftu_agc_thr4_cmiss_c,
ftu_agc_thr3_cmiss_c,ftu_agc_thr2_cmiss_c,ftu_agc_thr1_cmiss_c,ftu_agc_thr0_cmiss_c};
assign ftu_inv_req[7:0] = {ftu_thr7_inv_req_c,ftu_thr6_inv_req_c,ftu_thr5_inv_req_c,ftu_thr4_inv_req_c,
ftu_thr3_inv_req_c,ftu_thr2_inv_req_c,ftu_thr1_inv_req_c,ftu_thr0_inv_req_c};
assign ftu_redirect[7:0] = {ftu_thr7_redirect_bf,ftu_thr6_redirect_bf,ftu_thr5_redirect_bf,ftu_thr4_redirect_bf,
ftu_thr3_redirect_bf,ftu_thr2_redirect_bf,ftu_thr1_redirect_bf,ftu_thr0_redirect_bf};
assign {cmu_thr7_data_ready,cmu_thr6_data_ready,cmu_thr5_data_ready,cmu_thr4_data_ready,
cmu_thr3_data_ready,cmu_thr2_data_ready,cmu_thr1_data_ready,cmu_thr0_data_ready} = cmu_data_ready[7:0];
assign cmu_rst_dupmiss[7:0] = mct_rst_dupmiss[7:0];
assign ftu_fetch_f[7:0] = ftu_curr_fetch_thr_f[7:0];
.csm_valid_req(csm_valid_req[7:0]),
.cmu_null_st(cmu_null_st[7:0]),
.cmu_req_st(cmu_req_st[7:0]),
.cmu_canleave_st(cmu_canleave_st[7:0]),
.cmu_dupmiss_st(cmu_dupmiss_st[7:0]),
.tcu_pce_ov (tcu_pce_ov),
.scan_in(cmsm_top_scanin),
.scan_out(cmsm_top_scanout),
.ftu_cmiss (ftu_cmiss[7:0]),
.ftu_redirect (ftu_redirect[7:0]),
.mct_fill_complete(mct_fill_complete[7:0]),
.ftu_inv_req (ftu_inv_req[7:0]),
.lsc_l15_valid(lsc_l15_valid[7:0]),
.cmu_data_ready(cmu_data_ready[7:0]),
.cmu_has_dup_miss(cmu_has_dup_miss[7:0]),
.mct_rst_dupmiss(mct_rst_dupmiss[7:0]),
.mct_ignore_cmiss(mct_ignore_cmiss),
.tcu_scan_en(tcu_scan_en),
.mdp_mbhit_q(mdp_mbhit_q[7:0]));
.lsc_fill_rtn1 (lsc_fill_rtn1),
.lsc_fill_rtn2 (lsc_fill_rtn2),
.lsc_req_sel (lsc_req_sel[7:0]),
.lsc_pending_req(lsc_pending_req),
.lsc_l15_valid (lsc_l15_valid[7:0]),
.cmu_any_data_ready(cmu_any_data_ready),
.cmu_any_un_cacheable(cmu_any_un_cacheable),
.cmu_data_ready(cmu_data_ready[7:0]),
.cmu_inst0_v (cmu_inst0_v),
.cmu_inst1_v (cmu_inst1_v),
.cmu_inst2_v (cmu_inst2_v),
.cmu_inst3_v (cmu_inst3_v),
.cmu_icache_invalidate(cmu_icache_invalidate),
.cmu_icache_invalidate_way(cmu_icache_invalidate_way[2:0]),
.cmu_icache_invalidate_index(cmu_icache_invalidate_index[10:5]),
.cmu_evic_invalidate(cmu_evic_invalidate),
.cmu_icache_inv_way1(cmu_icache_inv_way1[2:0]),
.cmu_inval_ack (cmu_inval_ack[7:0]),
.cmu_l2_err (cmu_l2_err[1:0]),
.cmu_l2miss (cmu_l2miss),
.ifu_l15_valid (ifu_l15_valid),
.ifu_l15_cpkt (ifu_l15_cpkt[7:0]),
.ifu_lsu_if_vld(ifu_lsu_if_vld),
.ifu_lsu_if_tid(ifu_lsu_if_tid[2:0]),
.ifu_lsu_if_addr(ifu_lsu_if_addr[10:5]),
.scan_in(lsi_ctl_scanin),
.scan_out(lsi_ctl_scanout),
.tcu_pce_ov (tcu_pce_ov),
.const_cpuid (const_cpuid[2:0]),
.lsu_ifu_cmu_pmen (lsu_ifu_cmu_pmen),
.ftu_cmiss(ftu_cmiss[7:0]),
.mct_early_req (mct_early_req),
.ftu_rep_way (ftu_rep_way[2:0]),
.ftu_thrx_un_cacheable(ftu_thrx_un_cacheable),
.ifu_l15_addr (ifu_l15_addr[10:5]),
.csm_valid_req (csm_valid_req[7:0]),
.l15_spc_data1 (l15_spc_data1[127:0]),
.l15_spc_cpkt (l15_spc_cpkt[17:0]),
.l15_ifu_valid (l15_ifu_valid),
.l15_ifu_grant (l15_ifu_grant),
.lsu_ifu_ld_index(lsu_ifu_ld_index[10:5]),
.cmu_fill_paddr(cmu_fill_paddr[4:2]),
.mdp_lsi_nc_bit(mdp_lsi_nc_bit),
.mdp_lsi_inv_bit(mdp_lsi_inv_bit),
.mdp_lsi_rway (mdp_lsi_rway[2:0]),
.tcu_scan_en(tcu_scan_en),
.lsc_data_sel(lsc_data_sel[7:0]),
.cmu_ic_data (cmu_ic_data[263:0]),
.cmu_fill_inst0 (cmu_fill_inst0[32:0]),
.cmu_fill_inst1 (cmu_fill_inst1[32:0]),
.cmu_fill_inst2 (cmu_fill_inst2[32:0]),
.cmu_fill_inst3 (cmu_fill_inst3[32:0]),
.scan_out(lsi_dp_scanout),
.tcu_pce_ov (tcu_pce_ov),
.l15_spc_data1 (l15_spc_data1[127:0]),
.lsc_fill_rtn1 (lsc_fill_rtn1),
.lsc_fill_rtn2 (lsc_fill_rtn2),
.tcu_scan_en(tcu_scan_en),
.lsc_data_sel(lsc_data_sel[7:0]),
.gkt_ifu_legal(gkt_ifu_legal[3:0]),
.gkt_ifu_flip_parity(gkt_ifu_flip_parity[3:0]));
.mct_clken(mct_clken[7:0]),
.mct_early_req(mct_early_req),
.mct_upd_addr(mct_upd_addr[7:0]),
.mct_real_wom(mct_real_wom[7:0]),
.cmu_has_dup_miss(cmu_has_dup_miss[7:0]),
.mct_rst_dupmiss(mct_rst_dupmiss[7:0]),
.mct_fill_complete(mct_fill_complete[7:0]),
.mct_ignore_cmiss(mct_ignore_cmiss),
.scan_in(missbuff_ctl_scanin),
.scan_out(missbuff_ctl_scanout),
.lsu_ifu_cmu_pmen (lsu_ifu_cmu_pmen),
.ftu_cmiss(ftu_cmiss[7:0]),
.ftu_fetch_f(ftu_fetch_f[7:0]),
.ftu_inv_req(ftu_inv_req[7:0]),
.ftu_redirect(ftu_redirect[7:0]),
.l15_spc_cpkt(l15_spc_cpkt[8:6]),
.cmu_req_st(cmu_req_st[7:0]),
.cmu_canleave_st(cmu_canleave_st[7:0]),
.lsc_l15_valid(lsc_l15_valid[7:0]),
.cmu_data_ready(cmu_data_ready[7:0]),
.lsc_fill_rtn2(lsc_fill_rtn2),
.mdp_mbhit_q(mdp_mbhit_q[7:0]),
.tcu_scan_en(tcu_scan_en));
.mdp_mbhit_q(mdp_mbhit_q[7:0]),
.mdp_lsi_rway(mdp_lsi_rway[2:0]),
.ifu_l15_addr(ifu_l15_addr[39:0]),
.mdp_lsi_nc_bit(mdp_lsi_nc_bit),
.mdp_lsi_inv_bit(mdp_lsi_inv_bit),
.cmu_fill_wrway(cmu_fill_wrway[2:0]),
.cmu_fill_paddr(cmu_fill_paddr[39:0]),
.scan_in(missbuff_dp_scanin),
.scan_out(missbuff_dp_scanout),
.tcu_pce_ov (tcu_pce_ov),
.l15_spc_cpkt(l15_spc_cpkt[8:6]),
.ftu_paddr (ftu_paddr[39:0]),
.ftu_rep_way(ftu_rep_way[2:0]),
.ftu_inv_req(ftu_inv_req[7:0]),
.ftu_thrx_un_cacheable(ftu_thrx_un_cacheable),
.lsc_pending_req(lsc_pending_req),
.lsc_req_sel(lsc_req_sel[7:0]),
.mct_real_wom(mct_real_wom[7:0]),
.mct_upd_addr(mct_upd_addr[7:0]),
.tcu_scan_en(tcu_scan_en),
.mct_clken(mct_clken[7:0]));
assign cmsm_top_scanin = scan_in ;
assign lsi_ctl_scanin = cmsm_top_scanout ;
assign lsi_dp_scanin = lsi_ctl_scanout ;
assign missbuff_ctl_scanin = lsi_dp_scanout ;
assign missbuff_dp_scanin = missbuff_ctl_scanout ;
assign scan_out = missbuff_dp_scanout ;