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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: fc8_mode.diaglist | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | <sys(mode8) name=sys(mode8)> | |
36 | <sys(all)> | |
37 | ||
38 | ||
39 | //Add sas later | |
40 | ||
41 | //Core1 | |
42 | <runargs -nosas -vcs_run -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=02 > | |
43 | ||
44 | cores1_allbanks_atomic allcores_allbanks_atomic.s -midas_args=-DCMP_THREAD_START=0x0100 -finish_mask=0100 -vcs_run_args=+threads=0100 | |
45 | ||
46 | allbanks_cores1 allbanks_allcores.s -midas_args=-DCMP_THREAD_START=0xff00 -finish_mask=ff00 -vcs_run_args=+threads=ff00 | |
47 | ||
48 | </runargs> | |
49 | ||
50 | //Core2 | |
51 | <runargs -nosas -vcs_run -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=04 > | |
52 | ||
53 | cores2_allbanks_atomic allcores_allbanks_atomic.s -midas_args=-DCMP_THREAD_START=0x010000 -finish_mask=010000 -vcs_run_args=+threads=010000 | |
54 | ||
55 | allbanks_cores2 allbanks_allcores.s -midas_args=-DCMP_THREAD_START=0xff0000 -finish_mask=ff0000 -vcs_run_args=+threads=ff0000 | |
56 | </runargs> | |
57 | ||
58 | //Core3 | |
59 | <runargs -nosas -vcs_run -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=08> | |
60 | ||
61 | cores3_allbanks_atomic allcores_allbanks_atomic.s -midas_args=-DCMP_THREAD_START=0x01000000 -finish_mask=01000000 | |
62 | ||
63 | allbanks_cores3 allbanks_allcores.s -midas_args=-DCMP_THREAD_START=0xff000000 -finish_mask=ff000000 -vcs_run_args=+threads=ff000000 | |
64 | </runargs> | |
65 | ||
66 | //Core4 | |
67 | <runargs -nosas -vcs_run -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=10 > | |
68 | ||
69 | cores4_allbanks_atomic allcores_allbanks_atomic.s -midas_args=-DCMP_THREAD_START=0x0000000100000000 -finish_mask=0000000100000000 -vcs_run_args=+threads=0000000100000000 | |
70 | ||
71 | allbanks_cores4 allbanks_allcores.s -midas_args=-DCMP_THREAD_START=0xff00000000 -finish_mask=ff00000000 -vcs_run_args=+threads=ff00000000 | |
72 | </runargs> | |
73 | ||
74 | //Core5 | |
75 | <runargs -nosas -vcs_run -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=20 > | |
76 | ||
77 | cores5_allbanks_atomic allcores_allbanks_atomic.s -midas_args=-DCMP_THREAD_START=0x0000010000000000 -finish_mask=0000010000000000 -vcs_run_args=+threads=0000010000000000 | |
78 | ||
79 | allbanks_cores5 allbanks_allcores.s -midas_args=-DCMP_THREAD_START=0xff0000000000 -finish_mask=ff0000000000 -vcs_run_args=+threads=ff0000000000 | |
80 | ||
81 | </runargs> | |
82 | //Core 6 | |
83 | <runargs -nosas -vcs_run -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=40 > | |
84 | ||
85 | cores6_allbanks_atomic allcores_allbanks_atomic.s -midas_args=-DCMP_THREAD_START=0x0001000000000000 -finish_mask=0001000000000000 -vcs_run_args=+threads=0001000000000000 | |
86 | ||
87 | allbanks_cores6 allbanks_allcores.s -midas_args=-DCMP_THREAD_START=0xff000000000000 -finish_mask=ff000000000000 -vcs_run_args=+threads=ff000000000000 | |
88 | </runargs> | |
89 | ||
90 | //Core 7 | |
91 | <runargs -nosas -vcs_run -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=80 > | |
92 | ||
93 | cores7_allbanks_atomic allcores_allbanks_atomic.s -midas_args=-DCMP_THREAD_START=0x0100000000000000 -finish_mask=0100000000000000 | |
94 | ||
95 | allbanks_cores7 allbanks_allcores.s -midas_args=-DCMP_THREAD_START=0xff00000000000000 -finish_mask=ff00000000000000 -vcs_run_args=+threads=ff00000000000000 | |
96 | </runargs> | |
97 | ||
98 | ||
99 | //L2 Partial Bank 01 | |
100 | <runargs -nosas -vcs_run -vcs_run_args=+bank_set_mask=1 -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=03 > | |
101 | ||
102 | memop_ccx_packets_pm01 memop_ccx_packets.s | |
103 | ||
104 | memop_word_byte_mask_pm01 memop_word_byte_mask.s | |
105 | ||
106 | allcores_allbanks_atomic_pm01 allcores_allbanks_atomic.s | |
107 | ||
108 | n2_l2_fc_bank0_wayb_f_ldx_pm01 n2_l2_fc_bank0_wayb_f_ldx.s | |
109 | ||
110 | n2_l2_fc_bank1_wayb_f_ldx_pm01 n2_l2_fc_bank1_wayb_f_ldx.s | |
111 | ||
112 | </runargs> | |
113 | ||
114 | //L2 Partial Bank 23 | |
115 | <runargs -nosas -vcs_run -vcs_run_args=+bank_set_mask=2 -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=03 > | |
116 | ||
117 | memop_ccx_packets_pm23 memop_ccx_packets.s | |
118 | ||
119 | memop_word_byte_mask_pm23 memop_word_byte_mask.s | |
120 | ||
121 | allcores_allbanks_atomic_pm23 allcores_allbanks_atomic.s | |
122 | ||
123 | n2_l2_fc_bank2_wayb_f_ldx_pm23 n2_l2_fc_bank2_wayb_f_ldx.s | |
124 | ||
125 | n2_l2_fc_bank3_wayb_f_ldx_pm23 n2_l2_fc_bank3_wayb_f_ldx.s | |
126 | ||
127 | </runargs> | |
128 | ||
129 | //L2 Partial Bank 45 | |
130 | <runargs -nosas -vcs_run -vcs_run_args=+bank_set_mask=4 -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=03 > | |
131 | ||
132 | memop_ccx_packets_pm45 memop_ccx_packets.s | |
133 | ||
134 | memop_word_byte_mask_pm45 memop_word_byte_mask.s | |
135 | ||
136 | allcores_allbanks_atomic_pm45 allcores_allbanks_atomic.s | |
137 | ||
138 | n2_l2_fc_bank4_wayb_f_ldx_pm45 n2_l2_fc_bank4_wayb_f_ldx.s | |
139 | ||
140 | n2_l2_fc_bank5_wayb_f_ldx_pm45 n2_l2_fc_bank5_wayb_f_ldx.s | |
141 | ||
142 | </runargs> | |
143 | ||
144 | //L2 Partial Bank 67 | |
145 | <runargs -nosas -vcs_run -vcs_run_args=+bank_set_mask=8 -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=03 > | |
146 | ||
147 | memop_ccx_packets_pm67 memop_ccx_packets.s | |
148 | ||
149 | memop_word_byte_mask_pm67 memop_word_byte_mask.s | |
150 | ||
151 | allcores_allbanks_atomic_pm67 allcores_allbanks_atomic.s | |
152 | ||
153 | n2_l2_fc_bank6_wayb_f_ldx_pm67 n2_l2_fc_bank6_wayb_f_ldx.s | |
154 | ||
155 | n2_l2_fc_bank7_wayb_f_ldx_pm67 n2_l2_fc_bank7_wayb_f_ldx.s | |
156 | ||
157 | </runargs> | |
158 | ||
159 | //L2 Partial Bank 01 23 | |
160 | <runargs -nosas -vcs_run -vcs_run_args=+bank_set_mask=3 -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=03 > | |
161 | ||
162 | memop_ccx_packets_pm0123 memop_ccx_packets.s | |
163 | ||
164 | memop_word_byte_mask_pm0123 memop_word_byte_mask.s | |
165 | ||
166 | allcores_allbanks_atomic_pm0123 allcores_allbanks_atomic.s | |
167 | ||
168 | n2_l2_fc_bank0_wayb_f_ldx_pm0123 n2_l2_fc_bank0_wayb_f_ldx.s | |
169 | ||
170 | n2_l2_fc_bank2_wayb_f_ldx_pm0123 n2_l2_fc_bank2_wayb_f_ldx.s | |
171 | ||
172 | </runargs> | |
173 | ||
174 | //L2 Partial Bank 01 45 | |
175 | <runargs -nosas -vcs_run -vcs_run_args=+bank_set_mask=5 -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=03 > | |
176 | ||
177 | memop_ccx_packets_pm0145 memop_ccx_packets.s | |
178 | ||
179 | memop_word_byte_mask_pm0145 memop_word_byte_mask.s | |
180 | ||
181 | allcores_allbanks_atomic_pm0145 allcores_allbanks_atomic.s | |
182 | ||
183 | n2_l2_fc_bank0_wayb_f_ldx_pm0145 n2_l2_fc_bank0_wayb_f_ldx.s | |
184 | ||
185 | n2_l2_fc_bank5_wayb_f_ldx_pm0145 n2_l2_fc_bank5_wayb_f_ldx.s | |
186 | ||
187 | </runargs> | |
188 | ||
189 | //L2 Partial Bank 01 67 | |
190 | <runargs -nosas -vcs_run -vcs_run_args=+bank_set_mask=9 -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=0f > | |
191 | ||
192 | memop_ccx_packets_pm0167 memop_ccx_packets.s | |
193 | ||
194 | memop_word_byte_mask_pm0167 memop_word_byte_mask.s | |
195 | ||
196 | allcores_allbanks_atomic_pm0167 allcores_allbanks_atomic.s | |
197 | ||
198 | n2_l2_fc_bank6_wayb_f_ldx_pm0167 n2_l2_fc_bank6_wayb_f_ldx.s | |
199 | ||
200 | n2_l2_fc_bank1_wayb_f_ldx_pm0167 n2_l2_fc_bank1_wayb_f_ldx.s | |
201 | ||
202 | </runargs> | |
203 | ||
204 | //L2 Partial Bank 23 45 | |
205 | <runargs -nosas -vcs_run -vcs_run_args=+bank_set_mask=6 -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=0f > | |
206 | ||
207 | memop_ccx_packets_pm2345 memop_ccx_packets.s | |
208 | ||
209 | memop_word_byte_mask_pm2345 memop_word_byte_mask.s | |
210 | ||
211 | allcores_allbanks_atomic_pm2345 allcores_allbanks_atomic.s | |
212 | ||
213 | n2_l2_fc_bank3_wayb_f_ldx_pm2345 n2_l2_fc_bank3_wayb_f_ldx.s | |
214 | ||
215 | n2_l2_fc_bank5_wayb_f_ldx_pm2345 n2_l2_fc_bank5_wayb_f_ldx.s | |
216 | ||
217 | </runargs> | |
218 | ||
219 | //L2 Partial Bank 23 67 | |
220 | <runargs -nosas -vcs_run -vcs_run_args=+bank_set_mask=a -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=03 > | |
221 | ||
222 | memop_ccx_packets_pm2367 memop_ccx_packets.s | |
223 | ||
224 | memop_word_byte_mask_pm2367 memop_word_byte_mask.s | |
225 | ||
226 | allcores_allbanks_atomic_pm2367 allcores_allbanks_atomic.s | |
227 | ||
228 | n2_l2_fc_bank2_wayb_f_ldx_pm2367 n2_l2_fc_bank2_wayb_f_ldx.s | |
229 | ||
230 | n2_l2_fc_bank7_wayb_f_ldx_pm2367 n2_l2_fc_bank7_wayb_f_ldx.s | |
231 | ||
232 | </runargs> | |
233 | ||
234 | //L2 Partial Bank 45 67 | |
235 | ||
236 | <runargs -nosas -vcs_run -vcs_run_args=+bank_set_mask=c -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=03 > | |
237 | ||
238 | memop_ccx_packets_pm4567 memop_ccx_packets.s | |
239 | ||
240 | memop_word_byte_mask_pm4567 memop_word_byte_mask.s | |
241 | ||
242 | allcores_allbanks_atomic_pm4567 allcores_allbanks_atomic.s | |
243 | ||
244 | n2_l2_fc_bank6_wayb_f_ldx_pm4567 n2_l2_fc_bank6_wayb_f_ldx.s | |
245 | ||
246 | n2_l2_fc_bank5_wayb_f_ldx_pm4567 n2_l2_fc_bank5_wayb_f_ldx.s | |
247 | ||
248 | </runargs> | |
249 | ||
250 | </sys(all)> | |
251 | ||
252 | <sys(daily)> | |
253 | ||
254 | <runargs -nosas -vcs_run -vcs_run_args=+bank_set_mask=c -vcs_run_args=+l2esr_mon_off -vcs_run_args=+core_set_mask=03 > | |
255 | ||
256 | memop_ccx_packets_pm4567 memop_ccx_packets.s | |
257 | allcores_allbanks_atomic_pm4567 allcores_allbanks_atomic.s | |
258 | ||
259 | </runargs> | |
260 | </sys(daily)> | |
261 | ||
262 | ||
263 | ||
264 | </sys(mode8)> | |
265 |