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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: fc_crc_err.diaglist | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | <sys(fc_all)> | |
36 | <sys(all)> | |
37 | <sys(daily)> | |
38 | <crc_err_adv_mcu name=crc_err_adv_mcu> | |
39 | ||
40 | <runargs -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_errmon_off -vcs_run_args=+l2cpx_mon_off> | |
41 | <runargs -vcs_run_args=+debug -vcs_run_args=+ccxPktPrint=spc -vcs_run_args=+info -config_cpp_args=-DIDT_AMB> | |
42 | <runargs -vcs_run_args=+mcu_errmon_disable -vcs_run_args=+nb_crc_mon_disable> | |
43 | <runargs -vcs_run_args=+show_delta -nosas> | |
44 | <runargs -vcs_run_args=+MCU0_DISABLE_CH1_FBD_ERRINJ> | |
45 | <runargs -vcs_run_args=+bad_trap=00000000a0 -vcs_run_args=+bad_trap=0000000040 -vcs_run_args=+bad_trap=0000080040> | |
46 | <runargs -vcs_run_args=+bad_trap=0000083420> | |
47 | ||
48 | ||
49 | //NB | |
50 | n2_crc_err_adv_mcu___MCU0_NB_FBR_ENABLE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_NB_ERR_ENABLE -midas_args=-DCRC_RE -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -midas_args=-DCRC_NB -vcs_run_args=+DUMP_CRC | |
51 | ||
52 | n2_crc_err_adv_mcu___MCU0_NB_FBU_ENABLE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_NB_ERR_ENABLE -vcs_run_args=+MCU0_INJECT_FBU_ERR -midas_args=-DCRC_UE -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -midas_args=-DCRC_NB -vcs_run_args=+DUMP_CRC | |
53 | ||
54 | n2_crc_err_adv_mcu___MCU0_NB_FBR_RANDOM_MBIT n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_NB_ERR_RANDOM -vcs_run_args=+MCU0_NB_CRC_MULTIPLE_BIT_TIMES -midas_args=-DCRC_RE -midas_args=-DCRC_NB | |
55 | //n2_crc_err_adv_mcu___MCU0_NB_FBU_RANDOM_MBIT n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_NB_ERR_RANDOM -vcs_run_args=+MCU0_INJECT_FBU_ERR -vcs_run_args=+MCU0_NB_CRC_MULTIPLE_BIT_TIMES -midas_args=-DCRC_UE -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -midas_args=-DCRC_NB -vcs_run_args=+DUMP_CRC | |
56 | ||
57 | n2_crc_err_adv_mcu___MCU0_NB_FBR_RANDOM_MLANE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_NB_ERR_RANDOM -vcs_run_args=+MCU0_NB_CRC_MULTIPLE_LANES -midas_args=-DCRC_RE -midas_args=-DCRC_NB | |
58 | //n2_crc_err_adv_mcu___MCU0_NB_FBU_RANDOM_MLANE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_NB_ERR_RANDOM -vcs_run_args=+MCU0_INJECT_FBU_ERR -vcs_run_args=+MCU0_NB_CRC_MULTIPLE_LANES -midas_args=-DCRC_UE -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -midas_args=-DCRC_NB -vcs_run_args=+DUMP_CRC | |
59 | ||
60 | n2_crc_err_adv_mcu___MCU0_NB_FBR_RANDOM_MBIT_MLANE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_NB_ERR_RANDOM -vcs_run_args=+MCU0_NB_CRC_MULTIPLE_BIT_TIMES -vcs_run_args=+MCU0_NB_CRC_MULTIPLE_LANES -midas_args=-DCRC_RE -midas_args=-DCRC_NB | |
61 | //n2_crc_err_adv_mcu___MCU0_NB_FBU_RANDOM_MBIT_MLANE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_NB_ERR_RANDOM -vcs_run_args=+MCU0_INJECT_FBU_ERR -vcs_run_args=+MCU0_NB_CRC_MULTIPLE_BIT_TIMES -vcs_run_args=+MCU0_NB_CRC_MULTIPLE_LANES -midas_args=-DCRC_UE -midas_args=-DCRC_NB -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -vcs_run_args=+DUMP_CRC | |
62 | ||
63 | ||
64 | //SB | |
65 | n2_crc_err_adv_mcu___MCU0_SB_FBR_ENABLE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_SB_ERR_ENABLE -midas_args=-DCRC_RE -midas_args=-DCRC_SB -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -vcs_run_args=+DUMP_CRC | |
66 | //n2_crc_err_adv_mcu___MCU0_SB_FBU_ENABLE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_SB_ERR_ENABLE -vcs_run_args=+MCU0_INJECT_FBU_ERR -midas_args=-DCRC_UE -midas_args=-DCRC_SB -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -vcs_run_args=+DUMP_CRC | |
67 | ||
68 | //n2_crc_err_adv_mcu___MCU0_SB_FBR_RANDOM_MBIT n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_SB_ERR_RANDOM -vcs_run_args=+MCU0_SB_CRC_MULTIPLE_BIT_TIMES -midas_args=-DCRC_RE -midas_args=-DCRC_SB | |
69 | //n2_crc_err_adv_mcu___MCU0_SB_FBU_RANDOM_MBIT n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_SB_ERR_RANDOM -vcs_run_args=+MCU0_INJECT_FBU_ERR -vcs_run_args=+MCU0_SB_CRC_MULTIPLE_BIT_TIMES -midas_args=-DCRC_UE -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -midas_args=-DCRC_SB -vcs_run_args=+DUMP_CRC | |
70 | ||
71 | //n2_crc_err_adv_mcu___MCU0_SB_FBR_RANDOM_MLANE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_SB_ERR_RANDOM -vcs_run_args=+MCU0_SB_CRC_MULTIPLE_LANES -midas_args=-DCRC_RE -midas_args=-DCRC_SB | |
72 | //n2_crc_err_adv_mcu___MCU0_SB_FBU_RANDOM_MLANE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_SB_ERR_RANDOM -vcs_run_args=+MCU0_INJECT_FBU_ERR -vcs_run_args=+MCU0_SB_CRC_MULTIPLE_LANES -midas_args=-DCRC_UE -midas_args=-DCRC_SB -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -vcs_run_args=+DUMP_CRC | |
73 | ||
74 | n2_crc_err_adv_mcu___MCU0_SB_FBR_RANDOM_MBIT_MLANE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_SB_ERR_RANDOM -vcs_run_args=+MCU0_SB_CRC_MULTIPLE_BIT_TIMES -vcs_run_args=+MCU0_SB_CRC_MULTIPLE_LANES -midas_args=-DCRC_RE -midas_args=-DCRC_SB | |
75 | //n2_crc_err_adv_mcu___MCU0_SB_FBU_RANDOM_MBIT_MLANE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_SB_ERR_RANDOM -vcs_run_args=+MCU0_INJECT_FBU_ERR -vcs_run_args=+MCU0_SB_CRC_MULTIPLE_BIT_TIMES -vcs_run_args=+MCU0_SB_CRC_MULTIPLE_LANES -midas_args=-DCRC_UE -midas_args=-DCRC_SB -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -vcs_run_args=+DUMP_CRC | |
76 | ||
77 | ||
78 | </runargs> | |
79 | </runargs> | |
80 | </runargs> | |
81 | </runargs> | |
82 | </runargs> | |
83 | </runargs> | |
84 | </runargs> | |
85 | ||
86 | </crc_err_adv_mcu> | |
87 | </sys(daily)> | |
88 | </sys(all)> | |
89 | </sys(fc_all)> |