Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / cmp / vera / include / defines.vri
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: defines.vri
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
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8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
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31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35#include <vera_defines.vrh>
36
37///////////////////////////////////////////////////////////////
38// Vera defines used in this testbench
39///////////////////////////////////////////////////////////////
40
41#define STD_DISP gDbg
42
43// Defines for bit positions for sim_status
44#define ASM_PASS 0
45#define ASM_ERR 1
46
47// #define OUTPUT_SKEW #10 if PHOLD
48// #define INPUT_SKEW #-10
49#define OUTPUT_SKEW #0
50#define INPUT_SKEW #-0
51#define OUTPUT_EDGE NHOLD
52#define INPUT_EDGE NSAMPLE
53#define BOTH_DIR NSAMPLE NHOLD
54
55//#define IDLE_DATA {urandom(),urandom(),urandom(),urandom()}
56// #define IDLE_DATA 128'hDEAD_BEEF_DEAD_BEEF_DEAD_BEEF_DEAD_BEEF
57
58#define PP_CPX 0
59#define PP_PCX 1
60#define PP_MEM 2
61#define PP_SPC 3
62#define PP_TRG 4
63//
64// #define READ 0
65// #define WRITE 1
66//
67// #define PASSIVE 1
68// #define ACTIVE 0
69//
70// // ccx devices
71// #define DEV_SPC0 0
72// #define DEV_SPC1 1
73// #define DEV_SPC2 2
74// #define DEV_SPC3 3
75// #define DEV_SPC4 4
76// #define DEV_SPC5 5
77// #define DEV_SPC6 6
78// #define DEV_SPC7 7
79// #define DEV_MEM0 8
80// #define DEV_MEM1 9
81// #define DEV_MEM2 10
82// #define DEV_MEM3 11
83// #define DEV_MEM4 12
84// #define DEV_MEM5 13
85// #define DEV_MEM6 14
86// #define DEV_MEM7 15
87//
88// #define DEV_MEM8 16
89// #define DEV_NCU 16
90
91// "same cache line address". is it PA[38:6] or PA[17:6] ?
92// [8:6] is bank number.
93// [38:6] marks choice
94// #define CACHE_LINE_MASK 64'h0000007fffffffc0
95// [17:6] my choice
96// #define CACHE_LINE_MASK 64'h000000000003ffc0
97// [17:9]
98// #define CACHE_LINE_MASK 64'h000000000003fe00
99// [17:4]
100// #define CACHE_LINE_MASK 64'h000000000003fff0
101// [38:9]
102// #define CACHE_LINE_MASK 64'h0000007ffffffe00
103
104
105//----------------------------------------------------------
106// END OF FILE
107//----------------------------------------------------------