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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: dmu_ilu_egress_sample.vrhpal | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | #inc "dmu_cov_inc.pal"; | |
36 | ||
37 | ||
38 | sample dmu_ilu_intf_eHdr_F_cov (dmu_ilu_hdr_F_Type) { | |
39 | wildcard state PEC_Egress_PIO_MRd (7'b0x00000); | |
40 | state PEC_Egress_PIO_IORd (7'b0000010); | |
41 | state PEC_Egress_PIO_CfgRd0 (7'b0000100); | |
42 | state PEC_Egress_PIO_CfgRd1 (7'b0000101); | |
43 | ||
44 | wildcard state PEC_Egress_PIO_MWr (7'b1x00000); | |
45 | state PEC_Egress_PIO_IOWr (7'b1000010); | |
46 | state PEC_Egress_PIO_CfgWr0 (7'b1000100); | |
47 | state PEC_Egress_PIO_CfgWr1 (7'b1000101); | |
48 | ||
49 | state PEC_Egress_DMA_Cpl (7'b0001010); | |
50 | state PEC_Egress_DMA_CplLk (7'b0001011); | |
51 | state PEC_Egress_DMA_CplD (7'b1001010); | |
52 | } | |
53 | ||
54 | // Removed bits 9:8 from toggle check, these are invalid values | |
55 | // since egress len can only be 0-128 DW's | |
56 | sample dmu_ilu_intf_eHdr_Len_cov (dmu_ilu_hdr_Len[7:0]) { | |
57 | . &toggle(8); | |
58 | cov_weight = 1; | |
59 | } | |
60 | ||
61 | sample dmu_ilu_intf_eHdr_TC_cov (dmu_ilu_hdr_TC) { | |
62 | . &toggle(3); | |
63 | cov_weight = 1; | |
64 | } | |
65 | ||
66 | sample dmu_ilu_intf_eHdr_Atr_cov (dmu_ilu_hdr_Atr) { | |
67 | . &toggle(2); | |
68 | cov_weight = 1; | |
69 | } | |
70 | ||
71 | sample dmu_ilu_intf_eHdr_ReqID_cov (dmu_ilu_hdr_ReqID) { | |
72 | . &toggle(16); | |
73 | cov_weight = 1; | |
74 | } | |
75 | ||
76 | // bit 6 will not toggle, always a 0. | |
77 | sample dmu_ilu_intf_eHdr_TLPtag_cov ({dmu_ilu_hdr_TLPTag[7],dmu_ilu_hdr_TLPTag[5:0]}) { | |
78 | . &toggle(7); | |
79 | cov_weight = 1; | |
80 | } | |
81 | ||
82 | sample dmu_ilu_intf_eHdr_LastDWBE_cov (dmu_ilu_hdr_LastDWBE) { | |
83 | . &toggle(4); | |
84 | cov_weight = 1; | |
85 | } | |
86 | ||
87 | sample dmu_ilu_intf_eHdr_FirstDWBE_cov (dmu_ilu_hdr_FirstDWBE) { | |
88 | . &toggle(4); | |
89 | cov_weight = 1; | |
90 | } | |
91 | ||
92 | sample dmu_ilu_intf_eHdr_Addr_cov (dmu_ilu_hdr_Addr) { | |
93 | . &toggle(64); | |
94 | cov_weight = 1; | |
95 | } | |
96 | ||
97 | sample dmu_ilu_intf_eHdr_Dptr_cov (dmu_ilu_hdr_Dptr) { | |
98 | . &toggle(6); | |
99 | cov_weight = 1; | |
100 | } | |
101 | ||
102 | /***cross dmu_ilu_intf_eHdr_DWBE_sample_cross (dmu_ilu_PEC_egress_DWBE_sample_last, dmu_ilu_PEC_egress_DWBE_sample_first)***/ | |
103 | ||
104 | ||
105 |