verif/env/common/coverage/dmu/dmu_ilu_egress_sample.vrhpal

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// OpenSPARC T2 Processor File: dmu_ilu_egress_sample.vrhpal
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#inc "dmu_cov_inc.pal";


sample dmu_ilu_intf_eHdr_F_cov (dmu_ilu_hdr_F_Type) {
  wildcard state PEC_Egress_PIO_MRd    (7'b0x00000);
           state PEC_Egress_PIO_IORd   (7'b0000010);
           state PEC_Egress_PIO_CfgRd0 (7'b0000100);
           state PEC_Egress_PIO_CfgRd1 (7'b0000101);

  wildcard state PEC_Egress_PIO_MWr    (7'b1x00000);
           state PEC_Egress_PIO_IOWr   (7'b1000010);
           state PEC_Egress_PIO_CfgWr0 (7'b1000100);
           state PEC_Egress_PIO_CfgWr1 (7'b1000101);

           state PEC_Egress_DMA_Cpl    (7'b0001010);
           state PEC_Egress_DMA_CplLk  (7'b0001011);
           state PEC_Egress_DMA_CplD   (7'b1001010);
}

// Removed bits 9:8 from toggle check, these are invalid values
// since egress len can only be 0-128 DW's
sample dmu_ilu_intf_eHdr_Len_cov (dmu_ilu_hdr_Len[7:0]) {
. &toggle(8);
  cov_weight = 1;
}

sample dmu_ilu_intf_eHdr_TC_cov (dmu_ilu_hdr_TC) {
. &toggle(3);
  cov_weight = 1;
}

sample dmu_ilu_intf_eHdr_Atr_cov (dmu_ilu_hdr_Atr) {
. &toggle(2);
  cov_weight = 1;
}

sample dmu_ilu_intf_eHdr_ReqID_cov (dmu_ilu_hdr_ReqID) {
. &toggle(16);
  cov_weight = 1;
}

// bit 6 will not toggle, always a 0.
sample dmu_ilu_intf_eHdr_TLPtag_cov ({dmu_ilu_hdr_TLPTag[7],dmu_ilu_hdr_TLPTag[5:0]}) {
. &toggle(7);
  cov_weight = 1;
}

sample dmu_ilu_intf_eHdr_LastDWBE_cov (dmu_ilu_hdr_LastDWBE) {
. &toggle(4);
  cov_weight = 1;
}

sample dmu_ilu_intf_eHdr_FirstDWBE_cov (dmu_ilu_hdr_FirstDWBE) {
. &toggle(4);
  cov_weight = 1;
}

sample dmu_ilu_intf_eHdr_Addr_cov (dmu_ilu_hdr_Addr) {
. &toggle(64);
  cov_weight = 1;
}

sample dmu_ilu_intf_eHdr_Dptr_cov (dmu_ilu_hdr_Dptr) {
. &toggle(6);
  cov_weight = 1;
}

/***cross dmu_ilu_intf_eHdr_DWBE_sample_cross (dmu_ilu_PEC_egress_DWBE_sample_last, dmu_ilu_PEC_egress_DWBE_sample_first)***/