Initial commit of OpenSPARC T2 design and verification files.

[OpenSPARC-T2-DV] / verif / env / common / coverage / l2sat / ccx_pcx_qfull_sample.vrhpal

// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: ccx_pcx_qfull_sample.vrhpal
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
// 
// For the avoidance of doubt, and except that if any non-GPL license 
// choice is available it will apply instead, Sun elects to use only 
// the General Public License version 2 (GPLv2) at this time for any 
// software where a choice of GPL license versions is made 
// available with the language indicating that GPLv2 or any later version 
// may be used, or where a choice of which version of the GPL is applied is 
// otherwise unspecified. 
//
// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
// CA 95054 USA or visit www.sun.com if you need additional information or 
// have any questions. 
// 
// ========== Copyright Header End ============================================
    wildcard state allcores_bank0(64'hXXXXXXXX_XXXXXXff);
    wildcard state allcores_bank1(64'hXXXXXXXX_XXXXffXX);
    wildcard state allcores_bank2(64'hXXXXXXXX_XXffXXXX);
    wildcard state allcores_bank3(64'hXXXXXXXX_ffXXXXXX);
    wildcard state allcores_bank4(64'hXXXXXXff_XXXXXXXX);
    wildcard state allcores_bank5(64'hXXXXffXX_XXXXXXXX);
    wildcard state allcores_bank6(64'hXXffXXXX_XXXXXXXX);
    wildcard state allcores_bank7(64'hffXXXXXX_XXXXXXXX);

    wildcard state core0_bank0({56'hXXXXXXXX_XXXXXX, 8'bxxxxxxx1});
    wildcard state core1_bank0({56'hXXXXXXXX_XXXXXX, 8'bxxxxxx1x});
    wildcard state core2_bank0({56'hXXXXXXXX_XXXXXX, 8'bxxxxx1xx});
    wildcard state core3_bank0({56'hXXXXXXXX_XXXXXX, 8'bxxxx1xxx});
    wildcard state core4_bank0({56'hXXXXXXXX_XXXXXX, 8'bxxx1xxxx});
    wildcard state core5_bank0({56'hXXXXXXXX_XXXXXX, 8'bxx1xxxxx});
    wildcard state core6_bank0({56'hXXXXXXXX_XXXXXX, 8'bx1xxxxxx});
    wildcard state core7_bank0({56'hXXXXXXXX_XXXXXX, 8'b1xxxxxxx});

    wildcard state core0_bank1({48'hXXXXXXXX_XXXX, 8'bxxxxxxx1, 8'hXX});
    wildcard state core1_bank1({48'hXXXXXXXX_XXXX, 8'bxxxxxx1x, 8'hXX});
    wildcard state core2_bank1({48'hXXXXXXXX_XXXX, 8'bxxxxx1xx, 8'hXX});
    wildcard state core3_bank1({48'hXXXXXXXX_XXXX, 8'bxxxx1xxx, 8'hXX});
    wildcard state core4_bank1({48'hXXXXXXXX_XXXX, 8'bxxx1xxxx, 8'hXX});
    wildcard state core5_bank1({48'hXXXXXXXX_XXXX, 8'bxx1xxxxx, 8'hXX});
    wildcard state core6_bank1({48'hXXXXXXXX_XXXX, 8'bx1xxxxxx, 8'hXX});
    wildcard state core7_bank1({48'hXXXXXXXX_XXXX, 8'b1xxxxxxx, 8'hXX});

    wildcard state core0_bank2({40'hXXXXXXXX_XX, 8'bxxxxxxx1, 16'hXXXX});
    wildcard state core1_bank2({40'hXXXXXXXX_XX, 8'bxxxxxx1x, 16'hXXXX});
    wildcard state core2_bank2({40'hXXXXXXXX_XX, 8'bxxxxx1xx, 16'hXXXX});
    wildcard state core3_bank2({40'hXXXXXXXX_XX, 8'bxxxx1xxx, 16'hXXXX});
    wildcard state core4_bank2({40'hXXXXXXXX_XX, 8'bxxx1xxxx, 16'hXXXX});
    wildcard state core5_bank2({40'hXXXXXXXX_XX, 8'bxx1xxxxx, 16'hXXXX});
    wildcard state core6_bank2({40'hXXXXXXXX_XX, 8'bx1xxxxxx, 16'hXXXX});
    wildcard state core7_bank2({40'hXXXXXXXX_XX, 8'b1xxxxxxx, 16'hXXXX});

    wildcard state core0_bank3({32'hXXXXXXXX, 8'bxxxxxxx1, 24'hXXXXXX});
    wildcard state core1_bank3({32'hXXXXXXXX, 8'bxxxxxx1x, 24'hXXXXXX});
    wildcard state core2_bank3({32'hXXXXXXXX, 8'bxxxxx1xx, 24'hXXXXXX});
    wildcard state core3_bank3({32'hXXXXXXXX, 8'bxxxx1xxx, 24'hXXXXXX});
    wildcard state core4_bank3({32'hXXXXXXXX, 8'bxxx1xxxx, 24'hXXXXXX});
    wildcard state core5_bank3({32'hXXXXXXXX, 8'bxx1xxxxx, 24'hXXXXXX});
    wildcard state core6_bank3({32'hXXXXXXXX, 8'bx1xxxxxx, 24'hXXXXXX});
    wildcard state core7_bank3({32'hXXXXXXXX, 8'b1xxxxxxx, 24'hXXXXXX});


    wildcard state core0_bank4({24'hXXXXXX, 8'bxxxxxxx1, 32'hXXXXXXXX});
    wildcard state core1_bank4({24'hXXXXXX, 8'bxxxxxx1x, 32'hXXXXXXXX});
    wildcard state core2_bank4({24'hXXXXXX, 8'bxxxxx1xx, 32'hXXXXXXXX});
    wildcard state core3_bank4({24'hXXXXXX, 8'bxxxx1xxx, 32'hXXXXXXXX});
    wildcard state core4_bank4({24'hXXXXXX, 8'bxxx1xxxx, 32'hXXXXXXXX});
    wildcard state core5_bank4({24'hXXXXXX, 8'bxx1xxxxx, 32'hXXXXXXXX});
    wildcard state core6_bank4({24'hXXXXXX, 8'bx1xxxxxx, 32'hXXXXXXXX});
    wildcard state core7_bank4({24'hXXXXXX, 8'b1xxxxxxx, 32'hXXXXXXXX});

    wildcard state core0_bank5({16'hXXXX, 8'bxxxxxxx1, 40'hXX_XXXXXXXX});
    wildcard state core1_bank5({16'hXXXX, 8'bxxxxxx1x, 40'hXX_XXXXXXXX});
    wildcard state core2_bank5({16'hXXXX, 8'bxxxxx1xx, 40'hXX_XXXXXXXX});
    wildcard state core3_bank5({16'hXXXX, 8'bxxxx1xxx, 40'hXX_XXXXXXXX});
    wildcard state core4_bank5({16'hXXXX, 8'bxxx1xxxx, 40'hXX_XXXXXXXX});
    wildcard state core5_bank5({16'hXXXX, 8'bxx1xxxxx, 40'hXX_XXXXXXXX});
    wildcard state core6_bank5({16'hXXXX, 8'bx1xxxxxx, 40'hXX_XXXXXXXX});
    wildcard state core7_bank5({16'hXXXX, 8'b1xxxxxxx, 40'hXX_XXXXXXXX});

    wildcard state core0_bank6({8'hXX, 8'bxxxxxxx1, 48'hXXXX_XXXXXXXX});
    wildcard state core1_bank6({8'hXX, 8'bxxxxxx1x, 48'hXXXX_XXXXXXXX});
    wildcard state core2_bank6({8'hXX, 8'bxxxxx1xx, 48'hXXXX_XXXXXXXX});
    wildcard state core3_bank6({8'hXX, 8'bxxxx1xxx, 48'hXXXX_XXXXXXXX});
    wildcard state core4_bank6({8'hXX, 8'bxxx1xxxx, 48'hXXXX_XXXXXXXX});
    wildcard state core5_bank6({8'hXX, 8'bxx1xxxxx, 48'hXXXX_XXXXXXXX});
    wildcard state core6_bank6({8'hXX, 8'bx1xxxxxx, 48'hXXXX_XXXXXXXX});
    wildcard state core7_bank6({8'hXX, 8'b1xxxxxxx, 48'hXXXX_XXXXXXXX});


    wildcard state core0_bank7({8'bxxxxxxx1, 56'hXXXXXX});
    wildcard state core1_bank7({8'bxxxxxx1x, 56'hXXXXXX});
    wildcard state core2_bank7({8'bxxxxx1xx, 56'hXXXXXX});
    wildcard state core3_bank7({8'bxxxx1xxx, 56'hXXXXXX});
    wildcard state core4_bank7({8'bxxx1xxxx, 56'hXXXXXX});
    wildcard state core5_bank7({8'bxx1xxxxx, 56'hXXXXXX});
    wildcard state core6_bank7({8'bx1xxxxxx, 56'hXXXXXX});
    wildcard state core7_bank7({8'b1xxxxxxx, 56'hXXXXXX});
// }