projects / OpenSPARC-T2-DV / blame
| Commit | Line | Data |
|---|---|---|
| 86530b38 AT |
1 | // ========== Copyright Header Begin ========================================== |
| 2 | // | |
| 3 | // OpenSPARC T2 Processor File: l2_fb_bypass_insts_sample.vrhpal | |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 6 | // | |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 8 | // | |
| 9 | // This program is free software; you can redistribute it and/or modify | |
| 10 | // it under the terms of the GNU General Public License as published by | |
| 11 | // the Free Software Foundation; version 2 of the License. | |
| 12 | // | |
| 13 | // This program is distributed in the hope that it will be useful, | |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | // GNU General Public License for more details. | |
| 17 | // | |
| 18 | // You should have received a copy of the GNU General Public License | |
| 19 | // along with this program; if not, write to the Free Software | |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 21 | // | |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license | |
| 23 | // choice is available it will apply instead, Sun elects to use only | |
| 24 | // the General Public License version 2 (GPLv2) at this time for any | |
| 25 | // software where a choice of GPL license versions is made | |
| 26 | // available with the language indicating that GPLv2 or any later version | |
| 27 | // may be used, or where a choice of which version of the GPL is applied is | |
| 28 | // otherwise unspecified. | |
| 29 | // | |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
| 32 | // have any questions. | |
| 33 | // | |
| 34 | // ========== Copyright Header End ============================================ | |
| 35 | wildcard state LOAD_addr54_0( {1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 1'b0, 1'b0, 2'h0} ); | |
| 36 | wildcard state LOAD_addr54_1( {1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 1'b0, 1'b0, 2'h1} ); | |
| 37 | wildcard state LOAD_addr54_2( {1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 1'b0, 1'b0, 2'h2} ); | |
| 38 | wildcard state LOAD_addr54_3( {1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 1'b0, 1'b0, 2'h3} ); | |
| 39 | ||
| 40 | // PREFETCH fbhit diag reqtype nc jbi inv pf addr54 | |
| 41 | state PREFETCH_addr54_0( {1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 1'b0, 1'b1, 2'h0} ); | |
| 42 | state PREFETCH_addr54_1( {1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 1'b0, 1'b1, 2'h1} ); | |
| 43 | state PREFETCH_addr54_2( {1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 1'b0, 1'b1, 2'h2} ); | |
| 44 | state PREFETCH_addr54_3( {1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 1'b0, 1'b1, 2'h3} ); | |
| 45 | ||
| 46 | // IMISS fbhit diag reqtype nc jbi inv pf addr54 | |
| 47 | wildcard state IMISS_addr5_0( {1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 1'b0, 1'b0, 2'h0} ); | |
| 48 | wildcard state IMISS_addr5_1( {1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 1'b0, 1'b0, 2'h2} ); | |
| 49 | ||
| 50 | // STORE/BLKSTORE/BLKINITST fbhit diag reqtype nc jbi inv pf addr54 | |
| 51 | wildcard state STORE_addr54_0( {1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 1'b0, 1'bx, 2'h0} ); | |
| 52 | wildcard state STORE_addr54_1( {1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 1'b0, 1'bx, 2'h1} ); | |
| 53 | wildcard state STORE_addr54_2( {1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 1'b0, 1'bx, 2'h2} ); | |
| 54 | wildcard state STORE_addr54_3( {1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 1'b0, 1'bx, 2'h3} ); | |
| 55 | ||
| 56 | // CAS1 fbhit diag reqtype nc jbi inv pf addr54 | |
| 57 | state CAS1_addr54_0( {1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 1'b0, 1'b0, 2'h0} ); | |
| 58 | state CAS1_addr54_1( {1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 1'b0, 1'b0, 2'h1} ); | |
| 59 | state CAS1_addr54_2( {1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 1'b0, 1'b0, 2'h2} ); | |
| 60 | state CAS1_addr54_3( {1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 1'b0, 1'b0, 2'h3} ); | |
| 61 | ||
| 62 | // SWAP fbhit diag reqtype nc jbi inv pf addr54 | |
| 63 | state SWAP_addr54_0( {1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 1'b0, 1'b0, 2'h0} ); | |
| 64 | state SWAP_addr54_1( {1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 1'b0, 1'b0, 2'h1} ); | |
| 65 | state SWAP_addr54_2( {1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 1'b0, 1'b0, 2'h2} ); | |
| 66 | state SWAP_addr54_3( {1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 1'b0, 1'b0, 2'h3} ); | |
| 67 | ||
| 68 | // STRLOAD fbhit diag reqtype nc jbi inv pf addr54 | |
| 69 | state STRLOAD_addr54_0( {1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 1'b0, 1'b0, 2'h0} ); | |
| 70 | state STRLOAD_addr54_1( {1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 1'b0, 1'b0, 2'h1} ); | |
| 71 | state STRLOAD_addr54_2( {1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 1'b0, 1'b0, 2'h2} ); | |
| 72 | state STRLOAD_addr54_3( {1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 1'b0, 1'b0, 2'h3} ); | |
| 73 | ||
| 74 | // STRST fbhit diag reqtype nc jbi inv pf addr54 | |
| 75 | wildcard state STRST_addr54_0( {1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 1'b0, 1'b0, 2'h0} ); | |
| 76 | wildcard state STRST_addr54_1( {1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 1'b0, 1'b0, 2'h1} ); | |
| 77 | wildcard state STRST_addr54_2( {1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 1'b0, 1'b0, 2'h2} ); | |
| 78 | wildcard state STRST_addr54_3( {1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 1'b0, 1'b0, 2'h3} ); | |
| 79 | ||
| 80 | /* | |
| 81 | // FWDRQ_LOAD fbhit diag reqtype nc jbi inv pf addr54 | |
| 82 | state FWDRQ_LOAD_addr54_0( {1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 1'b0, 1'b0, 2'h0} ); | |
| 83 | state FWDRQ_LOAD_addr54_1( {1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 1'b0, 1'b0, 2'h1} ); | |
| 84 | state FWDRQ_LOAD_addr54_2( {1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 1'b0, 1'b0, 2'h2} ); | |
| 85 | state FWDRQ_LOAD_addr54_3( {1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 1'b0, 1'b0, 2'h3} ); | |
| 86 | ||
| 87 | // FWDRQ_STORE fbhit diag reqtype nc jbi inv pf addr54 | |
| 88 | state FWDRQ_STORE_addr54_0( {1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 1'b0, 1'b0, 2'h0} ); | |
| 89 | state FWDRQ_STORE_addr54_1( {1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 1'b0, 1'b0, 2'h1} ); | |
| 90 | state FWDRQ_STORE_addr54_2( {1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 1'b0, 1'b0, 2'h2} ); | |
| 91 | state FWDRQ_STORE_addr54_3( {1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 1'b0, 1'b0, 2'h3} ); | |
| 92 | */ | |
| 93 | ||
| 94 | // RDD fbhit diag reqtype nc jbi inv pf addr54 | |
| 95 | wildcard state RDD_addr54_0( {1'b1, 1'b0, 5'bxx001, 1'bx, 1'b1, 1'bx, 1'bx, 2'h0} ); | |
| 96 | wildcard state RDD_addr54_1( {1'b1, 1'b0, 5'bxx001, 1'bx, 1'b1, 1'bx, 1'bx, 2'h1} ); | |
| 97 | wildcard state RDD_addr54_2( {1'b1, 1'b0, 5'bxx001, 1'bx, 1'b1, 1'bx, 1'bx, 2'h2} ); | |
| 98 | wildcard state RDD_addr54_3( {1'b1, 1'b0, 5'bxx001, 1'bx, 1'b1, 1'bx, 1'bx, 2'h3} ); | |
| 99 | ||
| 100 | // WR8 fbhit diag reqtype nc jbi inv pf addr54 | |
| 101 | wildcard state WR8_addr54_0( {1'b1, 1'b0, 5'bxx010, 1'bx, 1'b1, 1'bx, 1'bx, 2'h0} ); | |
| 102 | wildcard state WR8_addr54_1( {1'b1, 1'b0, 5'bxx010, 1'bx, 1'b1, 1'bx, 1'bx, 2'h1} ); | |
| 103 | wildcard state WR8_addr54_2( {1'b1, 1'b0, 5'bxx010, 1'bx, 1'b1, 1'bx, 1'bx, 2'h2} ); | |
| 104 | wildcard state WR8_addr54_3( {1'b1, 1'b0, 5'bxx010, 1'bx, 1'b1, 1'bx, 1'bx, 2'h3} ); |