Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / common / coverage / mcusat / mcusat_wr_que_sample.vrhpal
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: mcusat_wr_que_sample.vrhpal
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35 wildcard state s_WR_REQ_DEASSRT (WR_REQ_DEASSRT );
36 wildcard state s_WR_REQ_ASSRT (WR_REQ_ASSRT );
37 wildcard state s_WR_Q_WR_PTR_DEASSRT (WR_Q_WR_PTR_DEASSRT );
38 wildcard state s_WR_Q_WR_PTR_ASSRT0 (WR_Q_WR_PTR_ASSRT0 );
39 wildcard state s_WR_Q_WR_PTR_ASSRT1 (WR_Q_WR_PTR_ASSRT1 );
40 wildcard state s_WR_Q_WR_PTR_ASSRT2 (WR_Q_WR_PTR_ASSRT2 );
41 wildcard state s_WR_Q_WR_PTR_ASSRT3 (WR_Q_WR_PTR_ASSRT3 );
42 wildcard state s_WR_Q_WR_PTR_ASSRT4 (WR_Q_WR_PTR_ASSRT4 );
43 wildcard state s_WR_Q_WR_PTR_ASSRT5 (WR_Q_WR_PTR_ASSRT5 );
44 wildcard state s_WR_Q_WR_PTR_ASSRT6 (WR_Q_WR_PTR_ASSRT6 );
45 wildcard state s_WR_Q_WR_PTR_ASSRT7 (WR_Q_WR_PTR_ASSRT7 );
46 wildcard state s_WR_Q_RD_PTR_DEASSRT (WR_Q_RD_PTR_DEASSRT );
47 wildcard state s_WR_Q_RD_PTR_ASSRT0 (WR_Q_RD_PTR_ASSRT0 );
48 wildcard state s_WR_Q_RD_PTR_ASSRT1 (WR_Q_RD_PTR_ASSRT1 );
49 wildcard state s_WR_Q_RD_PTR_ASSRT2 (WR_Q_RD_PTR_ASSRT2 );
50 wildcard state s_WR_Q_RD_PTR_ASSRT3 (WR_Q_RD_PTR_ASSRT3 );
51 wildcard state s_WR_Q_RD_PTR_ASSRT4 (WR_Q_RD_PTR_ASSRT4 );
52 wildcard state s_WR_Q_RD_PTR_ASSRT5 (WR_Q_RD_PTR_ASSRT5 );
53 wildcard state s_WR_Q_RD_PTR_ASSRT6 (WR_Q_RD_PTR_ASSRT6 );
54 wildcard state s_WR_Q_RD_PTR_ASSRT7 (WR_Q_RD_PTR_ASSRT7 );
55 wildcard state s_WR_Q_CNT0 (WR_Q_CNT0 );
56 wildcard state s_WR_Q_CNT1 (WR_Q_CNT1 );
57 wildcard state s_WR_Q_CNT2 (WR_Q_CNT2 );
58 wildcard state s_WR_Q_CNT3 (WR_Q_CNT3 );
59 wildcard state s_WR_Q_CNT4 (WR_Q_CNT4 );
60 wildcard state s_WR_Q_CNT5 (WR_Q_CNT5 );
61 wildcard state s_WR_Q_CNT6 (WR_Q_CNT6 );
62 wildcard state s_WR_Q_CNT7 (WR_Q_CNT7 );
63 wildcard state s_WR_Q_CNT8 (WR_Q_CNT8 );
64 wildcard state s_WR_Q_NOT_FULL (WR_Q_NOT_FULL );
65 wildcard state s_WR_Q_FULL (WR_Q_FULL );
66 wildcard state s_WR_Q_NOT_EMPTY (WR_Q_NOT_EMPTY );
67 wildcard state s_WR_Q_EMPTY (WR_Q_EMPTY );
68 wildcard state s_WR_COLPS_FIFO_NOT_EMPTY (WR_COLPS_FIFO_NOT_EMPTY);
69 wildcard state s_WR_COLPS_FIFO_EMPTY (WR_COLPS_FIFO_EMPTY );
70// }
71