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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: MCUStub.bind.vrh | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | #ifndef INC__MCUSTUB_PORTS_BINDS_VRH | |
36 | #define INC__MCUSTUB_PORTS_BINDS_VRH | |
37 | ||
38 | // these signals are shared between banks | |
39 | // so you have to have 2 MCUs share them. | |
40 | // Every 2 MCU BFMs will share this. 0,1 2,3 4,5 6,7 | |
41 | port mcu_data_port { | |
42 | mcu_l2b_data_r2; // shared | |
43 | mcu_l2b_ecc_r2; // shared | |
44 | } | |
45 | ||
46 | port mcu_port { | |
47 | clk; | |
48 | //read signals | |
49 | //inputs | |
50 | l2t_mcu_rd_req; | |
51 | l2t_mcu_addr; | |
52 | l2t_mcu_addr_5; | |
53 | l2t_mcu_rd_req_id; | |
54 | l2t_mcu_rd_dummy_req; | |
55 | ||
56 | //outputs | |
57 | mcu_l2t_rd_ack; | |
58 | mcu_l2t_rd_req_id_r0; | |
59 | mcu_l2t_data_vld_r0; | |
60 | mcu_l2t_qword_id_r0; | |
61 | ||
62 | mcu_l2t_secc_err_r2; | |
63 | mcu_l2t_mecc_err_r2; | |
64 | mcu_l2t_scb_secc_err; | |
65 | mcu_l2t_scb_mecc_err; | |
66 | ||
67 | ||
68 | //write signals | |
69 | //inputs | |
70 | l2t_mcu_wr_req; | |
71 | l2b_mcu_data_vld_r5; | |
72 | l2b_mcu_wr_data_r5; | |
73 | ||
74 | //outputs | |
75 | mcu_l2t_wr_ack; | |
76 | ||
77 | } | |
78 | ||
79 | ||
80 | ||
81 | #ifndef RTL_NO_BNK01 | |
82 | ||
83 | bind mcu_data_port mcu_bind_data_01 { | |
84 | mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_01;// shared | |
85 | mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_01; // shared | |
86 | } | |
87 | ||
88 | bind mcu_port mcu_bind_0 { | |
89 | clk mcustub_if.clk; | |
90 | //read signals | |
91 | //inputs | |
92 | l2t_mcu_rd_req mcustub_if.l2t_mcu_rd_req_0; | |
93 | l2t_mcu_addr mcustub_if.l2t_mcu_addr_0; | |
94 | l2t_mcu_addr_5 mcustub_if.l2t_mcu_addr_5_0; | |
95 | l2t_mcu_rd_req_id mcustub_if.l2t_mcu_rd_req_id_0; | |
96 | l2t_mcu_rd_dummy_req mcustub_if.l2t_mcu_rd_dummy_req_0; | |
97 | ||
98 | //outputs | |
99 | mcu_l2t_rd_ack mcustub_if.mcu_l2t_rd_ack_0; | |
100 | mcu_l2t_rd_req_id_r0 mcustub_if.mcu_l2t_rd_req_id_r0_0; | |
101 | mcu_l2t_data_vld_r0 mcustub_if.mcu_l2t_data_vld_r0_0; | |
102 | // mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_0; | |
103 | mcu_l2t_qword_id_r0 mcustub_if.mcu_l2t_qword_id_r0_0; | |
104 | // mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_0; | |
105 | ||
106 | mcu_l2t_secc_err_r2 mcustub_if.mcu_l2t_secc_err_r2_0; | |
107 | mcu_l2t_mecc_err_r2 mcustub_if.mcu_l2t_mecc_err_r2_0; | |
108 | mcu_l2t_scb_secc_err mcustub_if.mcu_l2t_scb_secc_err_0; | |
109 | mcu_l2t_scb_mecc_err mcustub_if.mcu_l2t_scb_mecc_err_0; | |
110 | ||
111 | ||
112 | //write signals | |
113 | //inputs | |
114 | l2t_mcu_wr_req mcustub_if.l2t_mcu_wr_req_0; | |
115 | l2b_mcu_data_vld_r5 mcustub_if.evict_l2b_mcu_data_vld_r5_0; | |
116 | l2b_mcu_wr_data_r5 mcustub_if.evict_l2b_mcu_wr_data_r5_0; | |
117 | ||
118 | //outputs | |
119 | mcu_l2t_wr_ack mcustub_if.mcu_l2t_wr_ack_0; | |
120 | ||
121 | } | |
122 | ||
123 | bind mcu_port mcu_bind_1 { | |
124 | clk mcustub_if.clk; | |
125 | //read signals | |
126 | //inputs | |
127 | l2t_mcu_rd_req mcustub_if.l2t_mcu_rd_req_1; | |
128 | l2t_mcu_addr mcustub_if.l2t_mcu_addr_1; | |
129 | l2t_mcu_addr_5 mcustub_if.l2t_mcu_addr_5_1; | |
130 | l2t_mcu_rd_req_id mcustub_if.l2t_mcu_rd_req_id_1; | |
131 | l2t_mcu_rd_dummy_req mcustub_if.l2t_mcu_rd_dummy_req_1; | |
132 | ||
133 | //outputs | |
134 | mcu_l2t_rd_ack mcustub_if.mcu_l2t_rd_ack_1; | |
135 | mcu_l2t_rd_req_id_r0 mcustub_if.mcu_l2t_rd_req_id_r0_1; | |
136 | mcu_l2t_data_vld_r0 mcustub_if.mcu_l2t_data_vld_r0_1; | |
137 | // mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_1; | |
138 | mcu_l2t_qword_id_r0 mcustub_if.mcu_l2t_qword_id_r0_1; | |
139 | // mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_1; | |
140 | ||
141 | mcu_l2t_secc_err_r2 mcustub_if.mcu_l2t_secc_err_r2_1; | |
142 | mcu_l2t_mecc_err_r2 mcustub_if.mcu_l2t_mecc_err_r2_1; | |
143 | mcu_l2t_scb_secc_err mcustub_if.mcu_l2t_scb_secc_err_1; | |
144 | mcu_l2t_scb_mecc_err mcustub_if.mcu_l2t_scb_mecc_err_1; | |
145 | ||
146 | ||
147 | //write signals | |
148 | //inputs | |
149 | l2t_mcu_wr_req mcustub_if.l2t_mcu_wr_req_1; | |
150 | l2b_mcu_data_vld_r5 mcustub_if.evict_l2b_mcu_data_vld_r5_1; | |
151 | l2b_mcu_wr_data_r5 mcustub_if.evict_l2b_mcu_wr_data_r5_1; | |
152 | ||
153 | //outputs | |
154 | mcu_l2t_wr_ack mcustub_if.mcu_l2t_wr_ack_1; | |
155 | ||
156 | } | |
157 | #endif | |
158 | ||
159 | ||
160 | #ifndef RTL_NO_BNK23 | |
161 | ||
162 | bind mcu_data_port mcu_bind_data_23 { | |
163 | mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_23;// shared | |
164 | mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_23; // shared | |
165 | } | |
166 | ||
167 | bind mcu_port mcu_bind_2 { | |
168 | clk mcustub_if.clk; | |
169 | //read signals | |
170 | //inputs | |
171 | l2t_mcu_rd_req mcustub_if.l2t_mcu_rd_req_2; | |
172 | l2t_mcu_addr mcustub_if.l2t_mcu_addr_2; | |
173 | l2t_mcu_addr_5 mcustub_if.l2t_mcu_addr_5_2; | |
174 | l2t_mcu_rd_req_id mcustub_if.l2t_mcu_rd_req_id_2; | |
175 | l2t_mcu_rd_dummy_req mcustub_if.l2t_mcu_rd_dummy_req_2; | |
176 | ||
177 | //outputs | |
178 | mcu_l2t_rd_ack mcustub_if.mcu_l2t_rd_ack_2; | |
179 | mcu_l2t_rd_req_id_r0 mcustub_if.mcu_l2t_rd_req_id_r0_2; | |
180 | mcu_l2t_data_vld_r0 mcustub_if.mcu_l2t_data_vld_r0_2; | |
181 | // mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_2; | |
182 | mcu_l2t_qword_id_r0 mcustub_if.mcu_l2t_qword_id_r0_2; | |
183 | // mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_2; | |
184 | ||
185 | mcu_l2t_secc_err_r2 mcustub_if.mcu_l2t_secc_err_r2_2; | |
186 | mcu_l2t_mecc_err_r2 mcustub_if.mcu_l2t_mecc_err_r2_2; | |
187 | mcu_l2t_scb_secc_err mcustub_if.mcu_l2t_scb_secc_err_2; | |
188 | mcu_l2t_scb_mecc_err mcustub_if.mcu_l2t_scb_mecc_err_2; | |
189 | ||
190 | ||
191 | //write signals | |
192 | //inputs | |
193 | l2t_mcu_wr_req mcustub_if.l2t_mcu_wr_req_2; | |
194 | l2b_mcu_data_vld_r5 mcustub_if.evict_l2b_mcu_data_vld_r5_2; | |
195 | l2b_mcu_wr_data_r5 mcustub_if.evict_l2b_mcu_wr_data_r5_2; | |
196 | ||
197 | //outputs | |
198 | mcu_l2t_wr_ack mcustub_if.mcu_l2t_wr_ack_2; | |
199 | ||
200 | } | |
201 | ||
202 | ||
203 | bind mcu_port mcu_bind_3 { | |
204 | clk mcustub_if.clk; | |
205 | //read signals | |
206 | //inputs | |
207 | l2t_mcu_rd_req mcustub_if.l2t_mcu_rd_req_3; | |
208 | l2t_mcu_addr mcustub_if.l2t_mcu_addr_3; | |
209 | l2t_mcu_addr_5 mcustub_if.l2t_mcu_addr_5_3; | |
210 | l2t_mcu_rd_req_id mcustub_if.l2t_mcu_rd_req_id_3; | |
211 | l2t_mcu_rd_dummy_req mcustub_if.l2t_mcu_rd_dummy_req_3; | |
212 | ||
213 | //outputs | |
214 | mcu_l2t_rd_ack mcustub_if.mcu_l2t_rd_ack_3; | |
215 | mcu_l2t_rd_req_id_r0 mcustub_if.mcu_l2t_rd_req_id_r0_3; | |
216 | mcu_l2t_data_vld_r0 mcustub_if.mcu_l2t_data_vld_r0_3; | |
217 | // mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_3; | |
218 | mcu_l2t_qword_id_r0 mcustub_if.mcu_l2t_qword_id_r0_3; | |
219 | // mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_3; | |
220 | ||
221 | mcu_l2t_secc_err_r2 mcustub_if.mcu_l2t_secc_err_r2_3; | |
222 | mcu_l2t_mecc_err_r2 mcustub_if.mcu_l2t_mecc_err_r2_3; | |
223 | mcu_l2t_scb_secc_err mcustub_if.mcu_l2t_scb_secc_err_3; | |
224 | mcu_l2t_scb_mecc_err mcustub_if.mcu_l2t_scb_mecc_err_3; | |
225 | ||
226 | ||
227 | //write signals | |
228 | //inputs | |
229 | l2t_mcu_wr_req mcustub_if.l2t_mcu_wr_req_3; | |
230 | l2b_mcu_data_vld_r5 mcustub_if.evict_l2b_mcu_data_vld_r5_3; | |
231 | l2b_mcu_wr_data_r5 mcustub_if.evict_l2b_mcu_wr_data_r5_3; | |
232 | ||
233 | //outputs | |
234 | mcu_l2t_wr_ack mcustub_if.mcu_l2t_wr_ack_3; | |
235 | ||
236 | } | |
237 | #endif | |
238 | ||
239 | ||
240 | #ifndef RTL_NO_BNK45 | |
241 | ||
242 | bind mcu_data_port mcu_bind_data_45 { | |
243 | mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_45;// shared | |
244 | mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_45; // shared | |
245 | } | |
246 | ||
247 | bind mcu_port mcu_bind_4 { | |
248 | clk mcustub_if.clk; | |
249 | //read signals | |
250 | //inputs | |
251 | l2t_mcu_rd_req mcustub_if.l2t_mcu_rd_req_4; | |
252 | l2t_mcu_addr mcustub_if.l2t_mcu_addr_4; | |
253 | l2t_mcu_addr_5 mcustub_if.l2t_mcu_addr_5_4; | |
254 | l2t_mcu_rd_req_id mcustub_if.l2t_mcu_rd_req_id_4; | |
255 | l2t_mcu_rd_dummy_req mcustub_if.l2t_mcu_rd_dummy_req_4; | |
256 | ||
257 | //outputs | |
258 | mcu_l2t_rd_ack mcustub_if.mcu_l2t_rd_ack_4; | |
259 | mcu_l2t_rd_req_id_r0 mcustub_if.mcu_l2t_rd_req_id_r0_4; | |
260 | mcu_l2t_data_vld_r0 mcustub_if.mcu_l2t_data_vld_r0_4; | |
261 | // mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_4; | |
262 | mcu_l2t_qword_id_r0 mcustub_if.mcu_l2t_qword_id_r0_4; | |
263 | // mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_4; | |
264 | ||
265 | mcu_l2t_secc_err_r2 mcustub_if.mcu_l2t_secc_err_r2_4; | |
266 | mcu_l2t_mecc_err_r2 mcustub_if.mcu_l2t_mecc_err_r2_4; | |
267 | mcu_l2t_scb_secc_err mcustub_if.mcu_l2t_scb_secc_err_4; | |
268 | mcu_l2t_scb_mecc_err mcustub_if.mcu_l2t_scb_mecc_err_4; | |
269 | ||
270 | ||
271 | //write signals | |
272 | //inputs | |
273 | l2t_mcu_wr_req mcustub_if.l2t_mcu_wr_req_4; | |
274 | l2b_mcu_data_vld_r5 mcustub_if.evict_l2b_mcu_data_vld_r5_4; | |
275 | l2b_mcu_wr_data_r5 mcustub_if.evict_l2b_mcu_wr_data_r5_4; | |
276 | ||
277 | //outputs | |
278 | mcu_l2t_wr_ack mcustub_if.mcu_l2t_wr_ack_4; | |
279 | ||
280 | } | |
281 | ||
282 | bind mcu_port mcu_bind_5 { | |
283 | clk mcustub_if.clk; | |
284 | //read signals | |
285 | //inputs | |
286 | l2t_mcu_rd_req mcustub_if.l2t_mcu_rd_req_5; | |
287 | l2t_mcu_addr mcustub_if.l2t_mcu_addr_5; | |
288 | l2t_mcu_addr_5 mcustub_if.l2t_mcu_addr_5_5; | |
289 | l2t_mcu_rd_req_id mcustub_if.l2t_mcu_rd_req_id_5; | |
290 | l2t_mcu_rd_dummy_req mcustub_if.l2t_mcu_rd_dummy_req_5; | |
291 | ||
292 | //outputs | |
293 | mcu_l2t_rd_ack mcustub_if.mcu_l2t_rd_ack_5; | |
294 | mcu_l2t_rd_req_id_r0 mcustub_if.mcu_l2t_rd_req_id_r0_5; | |
295 | mcu_l2t_data_vld_r0 mcustub_if.mcu_l2t_data_vld_r0_5; | |
296 | // mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_5; | |
297 | mcu_l2t_qword_id_r0 mcustub_if.mcu_l2t_qword_id_r0_5; | |
298 | // mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_5; | |
299 | ||
300 | mcu_l2t_secc_err_r2 mcustub_if.mcu_l2t_secc_err_r2_5; | |
301 | mcu_l2t_mecc_err_r2 mcustub_if.mcu_l2t_mecc_err_r2_5; | |
302 | mcu_l2t_scb_secc_err mcustub_if.mcu_l2t_scb_secc_err_5; | |
303 | mcu_l2t_scb_mecc_err mcustub_if.mcu_l2t_scb_mecc_err_5; | |
304 | ||
305 | ||
306 | //write signals | |
307 | //inputs | |
308 | l2t_mcu_wr_req mcustub_if.l2t_mcu_wr_req_5; | |
309 | l2b_mcu_data_vld_r5 mcustub_if.evict_l2b_mcu_data_vld_r5_5; | |
310 | l2b_mcu_wr_data_r5 mcustub_if.evict_l2b_mcu_wr_data_r5_5; | |
311 | ||
312 | //outputs | |
313 | mcu_l2t_wr_ack mcustub_if.mcu_l2t_wr_ack_5; | |
314 | ||
315 | } | |
316 | #endif | |
317 | ||
318 | ||
319 | #ifndef RTL_NO_BNK67 | |
320 | ||
321 | bind mcu_data_port mcu_bind_data_67 { | |
322 | mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_67;// shared | |
323 | mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_67; // shared | |
324 | } | |
325 | ||
326 | bind mcu_port mcu_bind_6 { | |
327 | clk mcustub_if.clk; | |
328 | //read signals | |
329 | //inputs | |
330 | l2t_mcu_rd_req mcustub_if.l2t_mcu_rd_req_6; | |
331 | l2t_mcu_addr mcustub_if.l2t_mcu_addr_6; | |
332 | l2t_mcu_addr_5 mcustub_if.l2t_mcu_addr_5_6; | |
333 | l2t_mcu_rd_req_id mcustub_if.l2t_mcu_rd_req_id_6; | |
334 | l2t_mcu_rd_dummy_req mcustub_if.l2t_mcu_rd_dummy_req_6; | |
335 | ||
336 | //outputs | |
337 | mcu_l2t_rd_ack mcustub_if.mcu_l2t_rd_ack_6; | |
338 | mcu_l2t_rd_req_id_r0 mcustub_if.mcu_l2t_rd_req_id_r0_6; | |
339 | mcu_l2t_data_vld_r0 mcustub_if.mcu_l2t_data_vld_r0_6; | |
340 | // mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_6; | |
341 | mcu_l2t_qword_id_r0 mcustub_if.mcu_l2t_qword_id_r0_6; | |
342 | // mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_6; | |
343 | ||
344 | mcu_l2t_secc_err_r2 mcustub_if.mcu_l2t_secc_err_r2_6; | |
345 | mcu_l2t_mecc_err_r2 mcustub_if.mcu_l2t_mecc_err_r2_6; | |
346 | mcu_l2t_scb_secc_err mcustub_if.mcu_l2t_scb_secc_err_6; | |
347 | mcu_l2t_scb_mecc_err mcustub_if.mcu_l2t_scb_mecc_err_6; | |
348 | ||
349 | ||
350 | //write signals | |
351 | //inputs | |
352 | l2t_mcu_wr_req mcustub_if.l2t_mcu_wr_req_6; | |
353 | l2b_mcu_data_vld_r5 mcustub_if.evict_l2b_mcu_data_vld_r5_6; | |
354 | l2b_mcu_wr_data_r5 mcustub_if.evict_l2b_mcu_wr_data_r5_6; | |
355 | ||
356 | //outputs | |
357 | mcu_l2t_wr_ack mcustub_if.mcu_l2t_wr_ack_6; | |
358 | ||
359 | } | |
360 | ||
361 | bind mcu_port mcu_bind_7 { | |
362 | clk mcustub_if.clk; | |
363 | //read signals | |
364 | //inputs | |
365 | l2t_mcu_rd_req mcustub_if.l2t_mcu_rd_req_7; | |
366 | l2t_mcu_addr mcustub_if.l2t_mcu_addr_7; | |
367 | l2t_mcu_addr_5 mcustub_if.l2t_mcu_addr_5_7; | |
368 | l2t_mcu_rd_req_id mcustub_if.l2t_mcu_rd_req_id_7; | |
369 | l2t_mcu_rd_dummy_req mcustub_if.l2t_mcu_rd_dummy_req_7; | |
370 | ||
371 | //outputs | |
372 | mcu_l2t_rd_ack mcustub_if.mcu_l2t_rd_ack_7; | |
373 | mcu_l2t_rd_req_id_r0 mcustub_if.mcu_l2t_rd_req_id_r0_7; | |
374 | mcu_l2t_data_vld_r0 mcustub_if.mcu_l2t_data_vld_r0_7; | |
375 | // mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_7; | |
376 | mcu_l2t_qword_id_r0 mcustub_if.mcu_l2t_qword_id_r0_7; | |
377 | // mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_7; | |
378 | ||
379 | mcu_l2t_secc_err_r2 mcustub_if.mcu_l2t_secc_err_r2_7; | |
380 | mcu_l2t_mecc_err_r2 mcustub_if.mcu_l2t_mecc_err_r2_7; | |
381 | mcu_l2t_scb_secc_err mcustub_if.mcu_l2t_scb_secc_err_7; | |
382 | mcu_l2t_scb_mecc_err mcustub_if.mcu_l2t_scb_mecc_err_7; | |
383 | ||
384 | ||
385 | //write signals | |
386 | //inputs | |
387 | l2t_mcu_wr_req mcustub_if.l2t_mcu_wr_req_7; | |
388 | l2b_mcu_data_vld_r5 mcustub_if.evict_l2b_mcu_data_vld_r5_7; | |
389 | l2b_mcu_wr_data_r5 mcustub_if.evict_l2b_mcu_wr_data_r5_7; | |
390 | ||
391 | //outputs | |
392 | mcu_l2t_wr_ack mcustub_if.mcu_l2t_wr_ack_7; | |
393 | ||
394 | } | |
395 | ||
396 | #endif | |
397 | ||
398 | ||
399 | // EOF | |
400 | #endif |