Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / niu / test_utils / vera / niu_dmc_virt.vr
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3// OpenSPARC T2 Processor File: niu_dmc_virt.vr
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35#define VIRT_NUM_RDMA_CHNLS 16
36#define VIRT_NUM_DEVICES 69
37
38#define VIRT_NUM_GROUPS 64
39#define VIRT_NUM_TDMA_CHNLS 16
40
41#include "niu_rxdmc.vrh"
42#include "niu_tx_test_class.vrh"
43
44extern bit[3:0] rtl_mac;
45
46class niu_dmc_virt {
47 integer tx_dma_chnl_grp[VIRT_NUM_GROUPS];
48 integer rx_dma_chnl_grp[VIRT_NUM_GROUPS];
49 integer intr_grp[VIRT_NUM_GROUPS];
50
51 local integer i;
52 local string name = "niu_dmc_virt";
53 local integer cyclic_rand[];
54
55 task tx_bind_dma_chnls_to_grp(niu_tx_test_class tdmc,
56 (integer chnl_num = -1),
57 (integer grp_num = -1));
58 task rx_bind_dma_chnls_to_grp(CRDMC rdmc,
59 (integer chnl_num = -1),
60 (integer grp_num = -1));
61 local function integer get_cyclic_rand(bit reset,
62 (integer array_num = 0),
63 (integer min = 0),
64 (integer max = 0));
65 local task tx_bind_grp_and_dma_ch(niu_tx_test_class tdmc,
66 integer grp_num,
67 integer chnl_num);
68 local task rx_bind_grp_and_dma_ch(CRDMC rdmc,
69 integer grp_num,
70 integer chnl_num);
71 task display_chnl_binding();
72
73 task new();
74
75} // class niu_dmc_virt
76
77task niu_dmc_virt::new() {
78 for(i=0;i<VIRT_NUM_GROUPS;i++) {
79 tx_dma_chnl_grp[i] = -1;
80 rx_dma_chnl_grp[i] = -1;
81 intr_grp[i] = -1;
82 }
83}
84
85task niu_dmc_virt::tx_bind_dma_chnls_to_grp(niu_tx_test_class tdmc,
86 (integer chnl_num = -1),
87 (integer grp_num = -1)) {
88 integer i, ii;
89
90
91 // check if we need to bind randomly
92 if(chnl_num == -1 && grp_num == -1) {
93 // bind RDMA channels
94 void = get_cyclic_rand(1, 0); // reset
95 void = get_cyclic_rand(1, 1); // reset
96 for(i=0;i<VIRT_NUM_TDMA_CHNLS;i++) {
97 ii = get_cyclic_rand(0, 0, 0, VIRT_NUM_GROUPS);
98 tx_dma_chnl_grp[ii] = get_cyclic_rand(0, 1, 0, VIRT_NUM_TDMA_CHNLS);
99 tx_bind_grp_and_dma_ch(tdmc, ii, tx_dma_chnl_grp[ii]);
100 }
101 return;
102 }
103
104 // rule check
105 if((chnl_num < 0 || chnl_num >= VIRT_NUM_TDMA_CHNLS)) {
106 printf("WARNING: TDMA chnl_num:%0d is not allowed range: 0 - %0d\n",
107 chnl_num, VIRT_NUM_TDMA_CHNLS - 1);
108 return;
109 }
110
111 for(i=0;i<VIRT_NUM_GROUPS;i++) {
112
113 if((tx_dma_chnl_grp[i] == chnl_num)) {
114 printf("<%0d> %s: WARNING : TDMA chnl_num:%0d is already bound to group:%0d \n",
115 get_time(LO), name, chnl_num, i);
116 return;
117 }
118
119 }
120
121 for(i=0;i<VIRT_NUM_TDMA_CHNLS;i++) {
122
123 if((tx_dma_chnl_grp[grp_num] == i)) {
124 printf("<%0d> %s: WARNING : TDMA group:%0d is already bound to channel:%0d \n",
125 get_time(LO), name, grp_num, i);
126 return;
127 }
128 }
129
130 // Bind
131 tx_dma_chnl_grp[grp_num] = chnl_num;
132 tx_bind_grp_and_dma_ch(tdmc, grp_num, chnl_num);
133}
134
135task niu_dmc_virt::rx_bind_dma_chnls_to_grp(CRDMC rdmc,
136 (integer chnl_num = -1),
137 (integer grp_num = -1)) {
138 integer i, ii;
139
140 // check if we need to bind randomly
141 if(chnl_num == -1 && grp_num == -1) {
142 // bind RDMA channels
143 void = get_cyclic_rand(1, 2); // reset
144 void = get_cyclic_rand(1, 3); // reset
145 for(i=0;i<VIRT_NUM_RDMA_CHNLS;i++) {
146 ii = get_cyclic_rand(0, 2, 0, VIRT_NUM_GROUPS);
147 rx_dma_chnl_grp[ii] = get_cyclic_rand(0, 3, 0, VIRT_NUM_RDMA_CHNLS);
148 rx_bind_grp_and_dma_ch(rdmc, ii, rx_dma_chnl_grp[ii]);
149 }
150 return;
151 }
152
153 // rule check
154 if((chnl_num < 0 || chnl_num >= VIRT_NUM_RDMA_CHNLS)) {
155 printf("WARNING: RDMA chnl_num:%0d is not allowed range: 0 - %0d\n",
156 chnl_num, VIRT_NUM_RDMA_CHNLS - 1);
157 return;
158 }
159
160 for(i=0;i<VIRT_NUM_GROUPS;i++) {
161
162 if((rx_dma_chnl_grp[i] == chnl_num)) {
163 printf("<%0d> %s: WARNING : RDMA chnl_num:%0d is already bound to group:%0d \n",
164 get_time(LO), name, chnl_num, i);
165 return;
166 }
167 }
168
169 for(i=0;i<VIRT_NUM_RDMA_CHNLS;i++) {
170
171 if((rx_dma_chnl_grp[grp_num] == i)) {
172 printf("<%0d> %s: WARNING : RDMA group:%0d is already bound to channel:%0d \n",
173 get_time(LO), name, grp_num, i);
174
175 return;
176 }
177 }
178
179 // Bind
180 rx_dma_chnl_grp[grp_num] = chnl_num;
181 rx_bind_grp_and_dma_ch(rdmc, grp_num, chnl_num);
182}
183
184task niu_dmc_virt::tx_bind_grp_and_dma_ch(niu_tx_test_class tdmc,
185 integer grp_num,
186 integer chnl_num) {
187 integer i;
188 // tx bind
189 printf("Binding : TDMA chnl:%0d to group:%0d\n", chnl_num, grp_num);
190 tdmc.group_from_dma_channel[chnl_num] = grp_num;
191 return;
192}
193
194
195task niu_dmc_virt::rx_bind_grp_and_dma_ch(CRDMC rdmc,
196 integer grp_num,
197 integer chnl_num) {
198 // rx bind
199 printf("Binding : RDMA chnl:%0d to group:%0d\n", chnl_num, grp_num);
200 rdmc.rx_dma[chnl_num].bind_to_group(grp_num);
201 return;
202}
203
204function integer niu_dmc_virt::get_cyclic_rand(bit reset,
205 (integer array_num = 0),
206 (integer min = 0),
207 (integer max = 0)) {
208 static integer array_int [10][100];
209 integer rnd ,done, i;
210 get_cyclic_rand = 0;
211
212 if(reset) {
213 for(i=0;i<100;i++) {
214 array_int[array_num][i] = -1;
215 }
216 return;
217 }
218
219 done = 0;
220 while(!done) {
221 rnd = urandom() % (max - min ) + min;
222 if(array_int[array_num][rnd] == -1)
223 done = 1;
224 array_int[array_num][rnd] = rnd;
225 }
226 get_cyclic_rand = rnd;
227}
228
229task niu_dmc_virt::display_chnl_binding() {
230 integer i;
231 printf("==================== BINDING OPTIONS =====================\n");
232 printf("Group\tTdmaChnl\tRdmaChnl\n");
233 for(i=0;i<VIRT_NUM_GROUPS;i++) {
234 printf("%0d\t%0d\t\t%0d\n", i, tx_dma_chnl_grp[i], rx_dma_chnl_grp[i]);
235 }
236 printf("==================== BINDING OPTIONS =====================\n");
237}
238