Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / niu / test_utils / vera / niu_dmc_virt.vr
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//
// OpenSPARC T2 Processor File: niu_dmc_virt.vr
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#define VIRT_NUM_RDMA_CHNLS 16
#define VIRT_NUM_DEVICES 69
#define VIRT_NUM_GROUPS 64
#define VIRT_NUM_TDMA_CHNLS 16
#include "niu_rxdmc.vrh"
#include "niu_tx_test_class.vrh"
extern bit[3:0] rtl_mac;
class niu_dmc_virt {
integer tx_dma_chnl_grp[VIRT_NUM_GROUPS];
integer rx_dma_chnl_grp[VIRT_NUM_GROUPS];
integer intr_grp[VIRT_NUM_GROUPS];
local integer i;
local string name = "niu_dmc_virt";
local integer cyclic_rand[];
task tx_bind_dma_chnls_to_grp(niu_tx_test_class tdmc,
(integer chnl_num = -1),
(integer grp_num = -1));
task rx_bind_dma_chnls_to_grp(CRDMC rdmc,
(integer chnl_num = -1),
(integer grp_num = -1));
local function integer get_cyclic_rand(bit reset,
(integer array_num = 0),
(integer min = 0),
(integer max = 0));
local task tx_bind_grp_and_dma_ch(niu_tx_test_class tdmc,
integer grp_num,
integer chnl_num);
local task rx_bind_grp_and_dma_ch(CRDMC rdmc,
integer grp_num,
integer chnl_num);
task display_chnl_binding();
task new();
} // class niu_dmc_virt
task niu_dmc_virt::new() {
for(i=0;i<VIRT_NUM_GROUPS;i++) {
tx_dma_chnl_grp[i] = -1;
rx_dma_chnl_grp[i] = -1;
intr_grp[i] = -1;
}
}
task niu_dmc_virt::tx_bind_dma_chnls_to_grp(niu_tx_test_class tdmc,
(integer chnl_num = -1),
(integer grp_num = -1)) {
integer i, ii;
// check if we need to bind randomly
if(chnl_num == -1 && grp_num == -1) {
// bind RDMA channels
void = get_cyclic_rand(1, 0); // reset
void = get_cyclic_rand(1, 1); // reset
for(i=0;i<VIRT_NUM_TDMA_CHNLS;i++) {
ii = get_cyclic_rand(0, 0, 0, VIRT_NUM_GROUPS);
tx_dma_chnl_grp[ii] = get_cyclic_rand(0, 1, 0, VIRT_NUM_TDMA_CHNLS);
tx_bind_grp_and_dma_ch(tdmc, ii, tx_dma_chnl_grp[ii]);
}
return;
}
// rule check
if((chnl_num < 0 || chnl_num >= VIRT_NUM_TDMA_CHNLS)) {
printf("WARNING: TDMA chnl_num:%0d is not allowed range: 0 - %0d\n",
chnl_num, VIRT_NUM_TDMA_CHNLS - 1);
return;
}
for(i=0;i<VIRT_NUM_GROUPS;i++) {
if((tx_dma_chnl_grp[i] == chnl_num)) {
printf("<%0d> %s: WARNING : TDMA chnl_num:%0d is already bound to group:%0d \n",
get_time(LO), name, chnl_num, i);
return;
}
}
for(i=0;i<VIRT_NUM_TDMA_CHNLS;i++) {
if((tx_dma_chnl_grp[grp_num] == i)) {
printf("<%0d> %s: WARNING : TDMA group:%0d is already bound to channel:%0d \n",
get_time(LO), name, grp_num, i);
return;
}
}
// Bind
tx_dma_chnl_grp[grp_num] = chnl_num;
tx_bind_grp_and_dma_ch(tdmc, grp_num, chnl_num);
}
task niu_dmc_virt::rx_bind_dma_chnls_to_grp(CRDMC rdmc,
(integer chnl_num = -1),
(integer grp_num = -1)) {
integer i, ii;
// check if we need to bind randomly
if(chnl_num == -1 && grp_num == -1) {
// bind RDMA channels
void = get_cyclic_rand(1, 2); // reset
void = get_cyclic_rand(1, 3); // reset
for(i=0;i<VIRT_NUM_RDMA_CHNLS;i++) {
ii = get_cyclic_rand(0, 2, 0, VIRT_NUM_GROUPS);
rx_dma_chnl_grp[ii] = get_cyclic_rand(0, 3, 0, VIRT_NUM_RDMA_CHNLS);
rx_bind_grp_and_dma_ch(rdmc, ii, rx_dma_chnl_grp[ii]);
}
return;
}
// rule check
if((chnl_num < 0 || chnl_num >= VIRT_NUM_RDMA_CHNLS)) {
printf("WARNING: RDMA chnl_num:%0d is not allowed range: 0 - %0d\n",
chnl_num, VIRT_NUM_RDMA_CHNLS - 1);
return;
}
for(i=0;i<VIRT_NUM_GROUPS;i++) {
if((rx_dma_chnl_grp[i] == chnl_num)) {
printf("<%0d> %s: WARNING : RDMA chnl_num:%0d is already bound to group:%0d \n",
get_time(LO), name, chnl_num, i);
return;
}
}
for(i=0;i<VIRT_NUM_RDMA_CHNLS;i++) {
if((rx_dma_chnl_grp[grp_num] == i)) {
printf("<%0d> %s: WARNING : RDMA group:%0d is already bound to channel:%0d \n",
get_time(LO), name, grp_num, i);
return;
}
}
// Bind
rx_dma_chnl_grp[grp_num] = chnl_num;
rx_bind_grp_and_dma_ch(rdmc, grp_num, chnl_num);
}
task niu_dmc_virt::tx_bind_grp_and_dma_ch(niu_tx_test_class tdmc,
integer grp_num,
integer chnl_num) {
integer i;
// tx bind
printf("Binding : TDMA chnl:%0d to group:%0d\n", chnl_num, grp_num);
tdmc.group_from_dma_channel[chnl_num] = grp_num;
return;
}
task niu_dmc_virt::rx_bind_grp_and_dma_ch(CRDMC rdmc,
integer grp_num,
integer chnl_num) {
// rx bind
printf("Binding : RDMA chnl:%0d to group:%0d\n", chnl_num, grp_num);
rdmc.rx_dma[chnl_num].bind_to_group(grp_num);
return;
}
function integer niu_dmc_virt::get_cyclic_rand(bit reset,
(integer array_num = 0),
(integer min = 0),
(integer max = 0)) {
static integer array_int [10][100];
integer rnd ,done, i;
get_cyclic_rand = 0;
if(reset) {
for(i=0;i<100;i++) {
array_int[array_num][i] = -1;
}
return;
}
done = 0;
while(!done) {
rnd = urandom() % (max - min ) + min;
if(array_int[array_num][rnd] == -1)
done = 1;
array_int[array_num][rnd] = rnd;
}
get_cyclic_rand = rnd;
}
task niu_dmc_virt::display_chnl_binding() {
integer i;
printf("==================== BINDING OPTIONS =====================\n");
printf("Group\tTdmaChnl\tRdmaChnl\n");
for(i=0;i<VIRT_NUM_GROUPS;i++) {
printf("%0d\t%0d\t\t%0d\n", i, tx_dma_chnl_grp[i], rx_dma_chnl_grp[i]);
}
printf("==================== BINDING OPTIONS =====================\n");
}