Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / niu / vera / include / neptune_defines.vri
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: neptune_defines.vri
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
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31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35 #ifdef NIU_SYSTEMC_T2
36 #define TOP "tb_top
37 #define NIU_DUV_PATH TOP.cpu.niu
38 #define MAC_DUV_PATH TOP.cpu.niu.mac
39 #ifdef NIU_GATE
40 #define RDC_DUV_PATH TOP.cpu.niu.rdp
41 #define RXC_DUV_PATH TOP.cpu.niu.rtx
42 #define TXC_DUV_PATH TOP.cpu.niu.rtx
43 #define TXC_DUV_PATH_P0_SF_RAM TOP.cpu.niu.rtx.txc_port0_sf_ram_ram_1024x152_0_ram_1024x152_0
44 #define TXC_DUV_PATH_P0_RO_RAM TOP.cpu.niu.rtx.txc_port0_ro_ram_ram_1024x152_0_ram_1024x152_0
45 #else
46 #define RDC_DUV_PATH TOP.cpu.niu.rdp.niu_rdmc
47 #define RXC_DUV_PATH TOP.cpu.niu.rtx.rxc
48 #define TXC_DUV_PATH TOP.cpu.niu.rtx.txc
49 #define TXC_DUV_PATH_P0_SF_RAM TOP.cpu.niu.rtx.txc.port0_SF_RAM
50 #define TXC_DUV_PATH_P0_RO_RAM TOP.cpu.niu.rtx.txc.port0_RO_RAM
51 #endif
52 #define RDP_DUV_PATH TOP.cpu.niu.rdp
53 #define TDS_DUV_PATH TOP.cpu.niu.tds
54 #define RTX_DUV_PATH TOP.cpu.niu.rtx
55 #define ESR_DUV_PATH TOP.cpu.niu.esr
56 #else
57 #define TOP "tb_top
58 #define NIU_DUV_PATH TOP.cpu
59 #define MAC_DUV_PATH TOP.cpu.mac
60 #ifdef NIU_GATE
61 #define RDC_DUV_PATH TOP.cpu.rdp
62 #define RXC_DUV_PATH TOP.cpu.rtx
63 #define TXC_DUV_PATH TOP.cpu.rtx
64 #define TXC_DUV_PATH_P0_SF_RAM TOP.cpu.rtx.txc_port0_sf_ram_ram_1024x152_0_ram_1024x152_0
65 #define TXC_DUV_PATH_P0_RO_RAM TOP.cpu.rtx.txc_port0_ro_ram_ram_1024x152_0_ram_1024x152_0
66 #else
67 #define RDC_DUV_PATH TOP.cpu.rdp.niu_rdmc
68 #define RXC_DUV_PATH TOP.cpu.rtx.rxc
69 #define TXC_DUV_PATH TOP.cpu.rtx.txc
70 #define TXC_DUV_PATH_P0_SF_RAM TOP.cpu.rtx.txc.port0_SF_RAM
71 #define TXC_DUV_PATH_P0_RO_RAM TOP.cpu.rtx.txc.port0_RO_RAM
72 #endif
73 #define RDP_DUV_PATH TOP.cpu.rdp
74 #define TDS_DUV_PATH TOP.cpu.tds
75 #define RTX_DUV_PATH TOP.cpu.rtx
76 #define ESR_DUV_PATH TOP.cpu.esr
77 #endif
78
79#define EP_BUS_NUMBER 1
80