Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / tcu / vera / include / ccu.bind.vri
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: ccu.bind.vri
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
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20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
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31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35#ifndef INC_CCU_BIND_VRI
36#define INC_CCU_BIND_VRI
37
38#include "ccu.port.vri"
39#include "ccu.if.vri"
40
41bind CCU_clk_port ccu_clk_bind {
42 sys_clk ccu_pll_sys_clk_p_if.pll_sys_clk_p;
43 cmp_pll_clk ccu_cmp_pll_clk_if.cmp_pll_clk;
44 rst_ccu_pll_ ccu_rst_ccu_pll_if.rst_ccu_pll_;
45 ccu_io2x_out ccu_io2x_out_if.ccu_io2x_out;
46 #ifndef GATESIM
47 ccu_rst_sys_clk ccu_rst_sys_clk_if.ccu_rst_sys_clk;
48 gclk ccu_gclk_if.gclk;
49 dr_pll_clk ccu_dr_pll_clk_if.dr_pll_clk;
50 ccu_io_out ccu_io_out_if.ccu_io_out;
51 ccu_cmp_io_sync_en ccu_cmp_io_sync_en_if.ccu_cmp_io_sync_en;
52 ccu_io_cmp_sync_en ccu_io_cmp_sync_en_if.ccu_io_cmp_sync_en;
53 ccu_dr_sync_en ccu_dr_sync_en_if.ccu_dr_sync_en;
54 ccu_io2x_sync_en ccu_io2x_sync_en_if.ccu_io2x_sync_en;
55 ccu_cmp_sys_sync_en ccu_cmp_sys_sync_en_if.ccu_cmp_sys_sync_en;
56 ccu_sys_cmp_sync_en ccu_sys_cmp_sync_en_if.ccu_sys_cmp_sync_en;
57 rst_ccu_ ccu_rst_ccu_if.rst_ccu_;
58 ccu_rst_sync_stable ccu_rst_sync_stable_if.ccu_rst_sync_stable;
59 ccu_rst_change ccu_rst_change_if.ccu_rst_change;
60 ccu_vco_aligned ccu_vco_aligned_if.ccu_vco_aligned;
61 gclk_aligned ccu_gclk_aligned_if.gclk_aligned;
62 gl_ccu_clk_stop gl_ccu_clk_stop_if.gl_ccu_clk_stop;
63 gl_ccu_io_clk_stop gl_ccu_io_clk_stop_if.gl_ccu_io_clk_stop;
64 tcu_atpg_mode tcu_atpg_mode_if.tcu_atpg_mode;
65 ref_clk ccu_ref_clk_if.ref_clk;
66 #endif
67}
68
69
70#ifndef GATESIM
71bind CCU_mon_port ccu_mon_bind {
72 cmp_pll_clk ccu_mon_if.cmp_pll_clk;
73 ccu_cmp_io_sync_en ccu_mon_if.ccu_cmp_io_sync_en;
74 ccu_cmp_sys_sync_en ccu_mon_if.ccu_cmp_sys_sync_en;
75 ccu_dbg1_serdes_dtm ccu_mon_if.ccu_dbg1_serdes_dtm;
76 ccu_dr_sync_en ccu_mon_if.ccu_dr_sync_en;
77 ccu_io2x_out ccu_mon_if.ccu_io2x_out;
78 ccu_io2x_sync_en ccu_mon_if.ccu_io2x_sync_en;
79 ccu_io_cmp_sync_en ccu_mon_if.ccu_io_cmp_sync_en;
80 ccu_io_out ccu_mon_if.ccu_io_out;
81 ccu_mio_pll_char_out ccu_mon_if.ccu_mio_pll_char_out;
82 ccu_mio_serdes_dtm ccu_mon_if.ccu_mio_serdes_dtm;
83 ccu_rst_change ccu_mon_if.ccu_rst_change;
84 ccu_rst_sync_stable ccu_mon_if.ccu_rst_sync_stable;
85 ccu_rst_sys_clk ccu_mon_if.ccu_rst_sys_clk;
86 ccu_serdes_dtm ccu_mon_if.ccu_serdes_dtm;
87 ccu_sys_cmp_sync_en ccu_mon_if.ccu_sys_cmp_sync_en;
88 ccu_vco_aligned ccu_mon_if.ccu_vco_aligned;
89 cluster_arst_l ccu_mon_if.cluster_arst_l;
90 gclk ccu_mon_if.gclk;
91 dr_pll_clk ccu_mon_if.dr_pll_clk;
92 gclk_aligned ccu_mon_if.gclk_aligned;
93 gl_ccu_clk_stop ccu_mon_if.gl_ccu_clk_stop;
94 gl_ccu_io_clk_stop ccu_mon_if.gl_ccu_io_clk_stop;
95 gl_ccu_io_out ccu_mon_if.gl_ccu_io_out;
96 mio_ccu_pll_char_in ccu_mon_if.mio_ccu_pll_char_in;
97 mio_ccu_pll_clamp_fltr ccu_mon_if.mio_ccu_pll_clamp_fltr;
98 mio_ccu_pll_div2 ccu_mon_if.mio_ccu_pll_div2;
99 mio_ccu_pll_div4 ccu_mon_if.mio_ccu_pll_div4;
100 mio_ccu_pll_trst_l ccu_mon_if.mio_ccu_pll_trst_l;
101 mio_ccu_vreg_selbg_l ccu_mon_if.mio_ccu_vreg_selbg_l;
102 mio_pll_testmode ccu_mon_if.mio_pll_testmode;
103 pll_sys_clk_n ccu_mon_if.pll_sys_clk_n;
104 pll_sys_clk_p ccu_mon_if.pll_sys_clk_p;
105 pll_vdd ccu_mon_if.pll_vdd;
106 rng_anlg_sel ccu_mon_if.rng_anlg_sel;
107 rng_arst_l ccu_mon_if.rng_arst_l;
108 rng_bypass ccu_mon_if.rng_bypass;
109 rng_ch_sel ccu_mon_if.rng_ch_sel;
110 rng_data ccu_mon_if.rng_data;
111 rng_vcoctrl_sel ccu_mon_if.rng_vcoctrl_sel;
112 rst_ccu_ ccu_mon_if.rst_ccu_;
113 rst_ccu_pll_ ccu_mon_if.rst_ccu_pll_;
114 rst_wmr_protect ccu_mon_if.rst_wmr_protect;
115 scan_in ccu_mon_if.scan_in;
116 scan_out ccu_mon_if.scan_out;
117 tcu_aclk ccu_mon_if.tcu_aclk;
118 tcu_atpg_mode ccu_mon_if.tcu_atpg_mode;
119 tcu_bclk ccu_mon_if.tcu_bclk;
120 tcu_ccu_clk_stretch ccu_mon_if.tcu_ccu_clk_stretch;
121 tcu_ccu_ext_cmp_clk ccu_mon_if.tcu_ccu_ext_cmp_clk;
122 tcu_ccu_ext_dr_clk ccu_mon_if.tcu_ccu_ext_dr_clk;
123 tcu_ccu_mux_sel ccu_mon_if.tcu_ccu_mux_sel;
124 tcu_pce_ov ccu_mon_if.tcu_pce_ov;
125 tcu_scan_en ccu_mon_if.tcu_scan_en;
126
127 ref_clk ccu_mon_if.ref_clk;
128 pll_div1_at_csrblk ccu_mon_if.pll_div1;
129 pll_div2_at_csrblk ccu_mon_if.pll_div2;
130 pll_div3_at_csrblk ccu_mon_if.pll_div3;
131 pll_div4_at_csrblk ccu_mon_if.pll_div4;
132 serdes_dtm1_at_csrblk ccu_mon_if.serdes_dtm1;
133 serdes_dtm2_at_csrblk ccu_mon_if.serdes_dtm2;
134}
135
136bind CCU_mon_ioclk_port ccu_mon_ioclk_bind {
137 iol2clk ccu_mon_ioclk_if.iol2clk;
138 csr_rd_req_vld ccu_mon_ioclk_if.rd_req_vld;
139 csr_rd_ack_vld ccu_mon_ioclk_if.rd_ack_vld;
140 csr_lfsr_data ccu_mon_ioclk_if.lfsr_data;
141}
142
143bind CCU_clks_internal_port ccu_clks_internal_bind {
144 l2clk ccu_rst_sys_sync_en_if.l2clk;
145 rst_ccu_cmp_sys_sync_en ccu_rst_sys_sync_en_if.ccu_cmp_sys_sync_en;
146 rst_ccu_cmp_sys_sync_en3 ccu_rst_sys_sync_en_if.ccu_cmp_sys_sync_en3;
147 rst_ccu_sys_cmp_sync_en ccu_rst_sys_sync_en_if.ccu_sys_cmp_sync_en;
148 rst_ccu_sys_cmp_sync_en3 ccu_rst_sys_sync_en_if.ccu_sys_cmp_sync_en3;
149}
150#endif
151#endif
152