Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / model / pcie / tl / etl.hpp
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2//
3// OpenSPARC T2 Processor File: etl.hpp
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35#ifndef INC_etl_hpp__
36#define INC_etl_hpp__
37
38#include <systemc.h>
39
40#include "pcie_common/config.hpp"
41#include "pcie_common/pciePacket.hpp"
42
43#include "pcie_common/data_port.hpp"
44#include "pcie_common/csr_if_port.hpp"
45#include "pcie_common/peu_csr_defines.hpp"
46#include "pcie_common/peu_defines.hpp"
47
48#include <queue>
49
50#define WAIT(__EV__) if(!POR_RESET) wait( __EV__ | reset_ev); \
51 if(POR_RESET) {LOG_WARNING<<"ETL:WAIT throwing exception"; throw sc_exception();}
52
53namespace pcie {
54
55 class etl : public sc_module
56 {
57 public:
58 etl(sc_module_name module_name, sc_event *parent_global_ev, uint8 *global_event_type) :
59 sc_module (module_name),
60 dout_port("data_out_port"),
61 req_port("Req_port"),
62 cmpl_port("CMPL_port"),
63 csr_port("CSR_PORT"),
64 eg_etl_rsb_port("EG_ETL_RSB_PORT")
65 {
66 this->parent_global_ev = parent_global_ev;
67 this->global_event_type = global_event_type;
68 SC_METHOD(init);
69 SC_THREAD(reset_handler);
70 }
71
72 SC_HAS_PROCESS( etl);
73
74 data_out_port<RefPciePacket> dout_port;
75 data_out_port<RefPciePacket> eg_etl_rsb_port;
76 data_in_port<RefPciePacket> req_port;
77 data_in_port<RefPciePacket> cmpl_port;
78
79 csr_if_port< CSR_ADDR_T, CSR_DATA_T > csr_port;
80
81 sc_uint<64> ecl, ecc; ///< local credit consumed and credit limit registers.
82 sc_event ecl_event;
83
84 private:
85 //Module threads and methods
86 void execute();
87 void req_handler();
88 void cmpl_handler();
89 void get_p_credit(RefPciePacket& p);
90 void get_np_credit(RefPciePacket& p);
91 void get_cmpl_credit(RefPciePacket& p);
92 void ecl_update();
93 void init();
94 void reset_handler();
95
96 //Module events
97 sc_event ecl_ev; ///< Egress Credit Limit CSR update event
98 sc_event epktRdy_ev; ///< Egress Pkt Rdy event
99 sc_event reset_ev; ///< Reset event for threads in the module
100 sc_event *parent_global_ev; ///< Global event to the module
101
102 uint8 *global_event_type;
103
104 bool POR_RESET;
105
106 //Proc handles
107 sc_process_handle execute_ph;
108 sc_process_handle req_handler_ph;
109 sc_process_handle cmpl_handler_ph;
110 sc_process_handle ecl_update_ph;
111
112 USE_NAMESPACE(std)queue<RefPciePacket> egress_q; ///< Egress TLP queue
113 };
114} // namespace pcie_tl
115#endif // INC_etl_hpp__