// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: etl.hpp
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// ========== Copyright Header End ============================================
#include "pcie_common/config.hpp"
#include "pcie_common/pciePacket.hpp"
#include "pcie_common/data_port.hpp"
#include "pcie_common/csr_if_port.hpp"
#include "pcie_common/peu_csr_defines.hpp"
#include "pcie_common/peu_defines.hpp"
#define WAIT(__EV__) if(!POR_RESET) wait( __EV__ | reset_ev); \
if(POR_RESET) {LOG_WARNING<<"ETL:WAIT throwing exception"; throw sc_exception();}
class etl : public sc_module
etl(sc_module_name module_name, sc_event *parent_global_ev, uint8 *global_event_type) :
dout_port("data_out_port"),
eg_etl_rsb_port("EG_ETL_RSB_PORT")
this->parent_global_ev = parent_global_ev;
this->global_event_type = global_event_type;
SC_THREAD(reset_handler);
data_out_port<RefPciePacket> dout_port;
data_out_port<RefPciePacket> eg_etl_rsb_port;
data_in_port<RefPciePacket> req_port;
data_in_port<RefPciePacket> cmpl_port;
csr_if_port< CSR_ADDR_T, CSR_DATA_T > csr_port;
sc_uint<64> ecl, ecc; ///< local credit consumed and credit limit registers.
//Module threads and methods
void get_p_credit(RefPciePacket& p);
void get_np_credit(RefPciePacket& p);
void get_cmpl_credit(RefPciePacket& p);
sc_event ecl_ev; ///< Egress Credit Limit CSR update event
sc_event epktRdy_ev; ///< Egress Pkt Rdy event
sc_event reset_ev; ///< Reset event for threads in the module
sc_event *parent_global_ev; ///< Global event to the module
uint8 *global_event_type;
sc_process_handle execute_ph;
sc_process_handle req_handler_ph;
sc_process_handle cmpl_handler_ph;
sc_process_handle ecl_update_ph;
USE_NAMESPACE(std)queue<RefPciePacket> egress_q; ///< Egress TLP queue