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// OpenSPARC T2 Processor File: dmu_ilu_isb.v
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//synopsys sync_set_reset "my_rst_l"
// >>>>>>>>>>>>>>>>>>>>>>>>> Parameter Declarations <<<<<<<<<<<<<<<<<<<<<<<<<
// >>>>>>>>>>>>>>>>>>>>>>>>> Port Declarations <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
input clk; // input clock
input rst_l; // input reset
input eil2isb_log; // turn the eil2isb_tag associated valid bit on
input [3:2] eil2isb_low_addr;
input iil2isb_clr; // turn the iil2isb_tag associated valid bit off
output [3:2] isb2iil_low_addr;
//------------------------------------------------------------------------
//------------------------------------------------------------------------
input [2:0] low_dbg_sel_a;
input [2:0] low_dbg_sel_b;
output [`FIRE_DBG_DATA_BITS] isb_dbg_a;
output [`FIRE_DBG_DATA_BITS] isb_dbg_b;
// >>>>>>>>>>>>>>>>>>>>>>>>> Data Type Declarations <<<<<<<<<<<<<<<<<<<<<<<<<
// ~~~~~~~~~~~~~~~~~~~~~~~~~ REGISTER - FLOPS ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
reg [31:0] isb_pio_vld; // score board vector for non-posted outstanding PIOs
reg [3:2] isb_pio_low_addr [0:31] ;
// ~~~~~~~~~~~~~~~~~~~~~~~~~ REGISTER - NON-FLOPS ~~~~~~~~~~~~~~~~~~~~~~~~~~
// ~~~~~~~~~~~~~~~~~~~~~~~~~ REGISTER - FLOPS ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
reg [`FIRE_DBG_DATA_BITS] dbg_bus [0:1];
// ~~~~~~~~~~~~~~~~~~~~~~~~~ REGISTER - NON-FLOPS ~~~~~~~~~~~~~~~~~~~~~~~~
reg [`FIRE_DBG_DATA_BITS] nxt_dbg_bus [0:1];
// ~~~~~~~~~~~~~~~~~~~~~~~~~ NETS ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
// >>>>>>>>>>>>>>>>>>>>>>>>> RTL/Behavioral Model <<<<<<<<<<<<<<<<<<<<<<<<<<<
assign isb2iil_vld = isb_pio_vld[iil2isb_tag];
assign isb2iil_low_addr = isb_pio_low_addr[iil2isb_tag];
for (i = 0; i < 32; i = i + 1) begin
isb_pio_low_addr[i] <= {2{1'b0}};
if (iil2isb_clr) isb_pio_vld[iil2isb_tag] <= 1'b0;
isb_pio_vld[eil2isb_tag] <= 1'b1;
isb_pio_low_addr[eil2isb_tag] <= eil2isb_low_addr;
//---------------------------------------------------------------------
// idle check output - when there is no PIO transaction pending, it's idle
//---------------------------------------------------------------------
assign isb_is_idle = ~(|isb_pio_vld);
//---------------------------------------------------------------------
//---------------------------------------------------------------------
always @ (low_dbg_sel_a or low_dbg_sel_b) begin
dbg_sel[0] = low_dbg_sel_a;
dbg_sel[1] = low_dbg_sel_b;
always @ (dbg_sel[0] or dbg_sel[1] or
isb_pio_vld ) begin : dbg_out
for (i = 0; i < 2; i = i + 1) begin
case (dbg_sel[i]) // synopsys infer_mux
3'b000: nxt_dbg_bus[i] = {2'b0, eil2isb_log, eil2isb_tag};
3'b001: nxt_dbg_bus[i] = {1'b0, iil2isb_clr, iil2isb_tag, isb2iil_vld};
3'b010: nxt_dbg_bus[i] = isb_pio_vld[31:24];
3'b011: nxt_dbg_bus[i] = isb_pio_vld[23:16];
3'b100: nxt_dbg_bus[i] = isb_pio_vld[15:8];
3'b101: nxt_dbg_bus[i] = isb_pio_vld[7:0];
3'b110: nxt_dbg_bus[i] = 8'b0;
3'b111: nxt_dbg_bus[i] = 8'b0;
assign isb_dbg_a = dbg_bus[0];
assign isb_dbg_b = dbg_bus[1];
if(~rst_l) begin : dbg_rst
for (i = 0; i < 2; i = i + 1) begin
for (j = 0; j < 2; j = j + 1) begin
dbg_bus[j] <= nxt_dbg_bus[j];