design/sys/iop/dmu/rtl/dmu_imu_iss_defines.h

/*
* ========== Copyright Header Begin ==========================================
*
* OpenSPARC T2 Processor File: dmu_imu_iss_defines.h
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*
* For the avoidance of doubt, and except that if any non-GPL license
* choice is available it will apply instead, Sun elects to use only
* the General Public License version 2 (GPLv2) at this time for any
* software where a choice of GPL license versions is made
* available with the language indicating that GPLv2 or any later version
* may be used, or where a choice of which version of the GPL is applied is
* otherwise unspecified.
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
* CA 95054 USA or visit www.sun.com if you need additional information or
* have any questions.
*
*
* ========== Copyright Header End ============================================
*/
`ifdef FIRE_DLC_IMU_ISS_DEFINES
`else
`define FIRE_DLC_IMU_ISS_DEFINES

`define FIRE_DLC_IMU_ISS_INSTANCE_ID_VALUE_A 1'h0
`define FIRE_DLC_IMU_ISS_INSTANCE_ID_VALUE_B 1'h1

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_20
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_20_HW_ADDR     27'b000000011000000001000010100
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_20_ADDR        30'b000000011000000001000010100000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_20_HW_ADDR     27'b000000011100000001000010100
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_20_ADDR        30'b000000011100000001000010100000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_20_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_21
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_21_HW_ADDR     27'b000000011000000001000010101
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_21_ADDR        30'b000000011000000001000010101000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_21_HW_ADDR     27'b000000011100000001000010101
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_21_ADDR        30'b000000011100000001000010101000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_21_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_22
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_22_HW_ADDR     27'b000000011000000001000010110
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_22_ADDR        30'b000000011000000001000010110000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_22_HW_ADDR     27'b000000011100000001000010110
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_22_ADDR        30'b000000011100000001000010110000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_22_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_23
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_23_HW_ADDR     27'b000000011000000001000010111
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_23_ADDR        30'b000000011000000001000010111000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_23_HW_ADDR     27'b000000011100000001000010111
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_23_ADDR        30'b000000011100000001000010111000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_23_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_24
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_24_HW_ADDR     27'b000000011000000001000011000
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_24_ADDR        30'b000000011000000001000011000000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_24_HW_ADDR     27'b000000011100000001000011000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_24_ADDR        30'b000000011100000001000011000000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_24_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_25
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_25_HW_ADDR     27'b000000011000000001000011001
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_25_ADDR        30'b000000011000000001000011001000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_25_HW_ADDR     27'b000000011100000001000011001
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_25_ADDR        30'b000000011100000001000011001000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_25_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_26
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_26_HW_ADDR     27'b000000011000000001000011010
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_26_ADDR        30'b000000011000000001000011010000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_26_HW_ADDR     27'b000000011100000001000011010
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_26_ADDR        30'b000000011100000001000011010000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_26_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_27
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_27_HW_ADDR     27'b000000011000000001000011011
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_27_ADDR        30'b000000011000000001000011011000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_27_HW_ADDR     27'b000000011100000001000011011
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_27_ADDR        30'b000000011100000001000011011000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_27_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_28
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_28_HW_ADDR     27'b000000011000000001000011100
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_28_ADDR        30'b000000011000000001000011100000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_28_HW_ADDR     27'b000000011100000001000011100
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_28_ADDR        30'b000000011100000001000011100000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_28_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_29
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_29_HW_ADDR     27'b000000011000000001000011101
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_29_ADDR        30'b000000011000000001000011101000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_29_HW_ADDR     27'b000000011100000001000011101
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_29_ADDR        30'b000000011100000001000011101000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_29_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_30
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_30_HW_ADDR     27'b000000011000000001000011110
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_30_ADDR        30'b000000011000000001000011110000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_30_HW_ADDR     27'b000000011100000001000011110
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_30_ADDR        30'b000000011100000001000011110000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_30_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_31
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_31_HW_ADDR     27'b000000011000000001000011111
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_31_ADDR        30'b000000011000000001000011111000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_31_HW_ADDR     27'b000000011100000001000011111
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_31_ADDR        30'b000000011100000001000011111000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_31_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_32
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_32_HW_ADDR     27'b000000011000000001000100000
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_32_ADDR        30'b000000011000000001000100000000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_32_HW_ADDR     27'b000000011100000001000100000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_32_ADDR        30'b000000011100000001000100000000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_32_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_33
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_33_HW_ADDR     27'b000000011000000001000100001
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_33_ADDR        30'b000000011000000001000100001000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_33_HW_ADDR     27'b000000011100000001000100001
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_33_ADDR        30'b000000011100000001000100001000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_33_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_34
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_34_HW_ADDR     27'b000000011000000001000100010
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_34_ADDR        30'b000000011000000001000100010000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_34_HW_ADDR     27'b000000011100000001000100010
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_34_ADDR        30'b000000011100000001000100010000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_34_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_35
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_35_HW_ADDR     27'b000000011000000001000100011
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_35_ADDR        30'b000000011000000001000100011000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_35_HW_ADDR     27'b000000011100000001000100011
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_35_ADDR        30'b000000011100000001000100011000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_35_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_36
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_36_HW_ADDR     27'b000000011000000001000100100
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_36_ADDR        30'b000000011000000001000100100000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_36_HW_ADDR     27'b000000011100000001000100100
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_36_ADDR        30'b000000011100000001000100100000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_36_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_37
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_37_HW_ADDR     27'b000000011000000001000100101
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_37_ADDR        30'b000000011000000001000100101000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_37_HW_ADDR     27'b000000011100000001000100101
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_37_ADDR        30'b000000011100000001000100101000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_37_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_38
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_38_HW_ADDR     27'b000000011000000001000100110
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_38_ADDR        30'b000000011000000001000100110000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_38_HW_ADDR     27'b000000011100000001000100110
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_38_ADDR        30'b000000011100000001000100110000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_38_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_39
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_39_HW_ADDR     27'b000000011000000001000100111
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_39_ADDR        30'b000000011000000001000100111000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_39_HW_ADDR     27'b000000011100000001000100111
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_39_ADDR        30'b000000011100000001000100111000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_39_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_40
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_40_HW_ADDR     27'b000000011000000001000101000
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_40_ADDR        30'b000000011000000001000101000000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_40_HW_ADDR     27'b000000011100000001000101000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_40_ADDR        30'b000000011100000001000101000000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_40_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_41
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_41_HW_ADDR     27'b000000011000000001000101001
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_41_ADDR        30'b000000011000000001000101001000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_41_HW_ADDR     27'b000000011100000001000101001
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_41_ADDR        30'b000000011100000001000101001000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_41_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_42
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_42_HW_ADDR     27'b000000011000000001000101010
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_42_ADDR        30'b000000011000000001000101010000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_42_HW_ADDR     27'b000000011100000001000101010
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_42_ADDR        30'b000000011100000001000101010000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_42_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_43
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_43_HW_ADDR     27'b000000011000000001000101011
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_43_ADDR        30'b000000011000000001000101011000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_43_HW_ADDR     27'b000000011100000001000101011
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_43_ADDR        30'b000000011100000001000101011000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_43_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_44
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_44_HW_ADDR     27'b000000011000000001000101100
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_44_ADDR        30'b000000011000000001000101100000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_44_HW_ADDR     27'b000000011100000001000101100
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_44_ADDR        30'b000000011100000001000101100000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_44_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_45
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_45_HW_ADDR     27'b000000011000000001000101101
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_45_ADDR        30'b000000011000000001000101101000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_45_HW_ADDR     27'b000000011100000001000101101
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_45_ADDR        30'b000000011100000001000101101000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_45_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_46
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_46_HW_ADDR     27'b000000011000000001000101110
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_46_ADDR        30'b000000011000000001000101110000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_46_HW_ADDR     27'b000000011100000001000101110
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_46_ADDR        30'b000000011100000001000101110000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_46_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_47
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_47_HW_ADDR     27'b000000011000000001000101111
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_47_ADDR        30'b000000011000000001000101111000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_47_HW_ADDR     27'b000000011100000001000101111
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_47_ADDR        30'b000000011100000001000101111000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_47_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_48
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_48_HW_ADDR     27'b000000011000000001000110000
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_48_ADDR        30'b000000011000000001000110000000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_48_HW_ADDR     27'b000000011100000001000110000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_48_ADDR        30'b000000011100000001000110000000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_48_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_49
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_49_HW_ADDR     27'b000000011000000001000110001
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_49_ADDR        30'b000000011000000001000110001000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_49_HW_ADDR     27'b000000011100000001000110001
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_49_ADDR        30'b000000011100000001000110001000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_49_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_50
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_50_HW_ADDR     27'b000000011000000001000110010
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_50_ADDR        30'b000000011000000001000110010000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_50_HW_ADDR     27'b000000011100000001000110010
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_50_ADDR        30'b000000011100000001000110010000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_50_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_51
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_51_HW_ADDR     27'b000000011000000001000110011
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_51_ADDR        30'b000000011000000001000110011000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_51_HW_ADDR     27'b000000011100000001000110011
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_51_ADDR        30'b000000011100000001000110011000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_51_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_52
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_52_HW_ADDR     27'b000000011000000001000110100
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_52_ADDR        30'b000000011000000001000110100000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_52_HW_ADDR     27'b000000011100000001000110100
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_52_ADDR        30'b000000011100000001000110100000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_52_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_53
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_53_HW_ADDR     27'b000000011000000001000110101
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_53_ADDR        30'b000000011000000001000110101000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_53_HW_ADDR     27'b000000011100000001000110101
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_53_ADDR        30'b000000011100000001000110101000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_53_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_54
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_54_HW_ADDR     27'b000000011000000001000110110
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_54_ADDR        30'b000000011000000001000110110000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_54_HW_ADDR     27'b000000011100000001000110110
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_54_ADDR        30'b000000011100000001000110110000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_54_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_55
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_55_HW_ADDR     27'b000000011000000001000110111
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_55_ADDR        30'b000000011000000001000110111000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_55_HW_ADDR     27'b000000011100000001000110111
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_55_ADDR        30'b000000011100000001000110111000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_55_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_56
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_56_HW_ADDR     27'b000000011000000001000111000
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_56_ADDR        30'b000000011000000001000111000000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_56_HW_ADDR     27'b000000011100000001000111000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_56_ADDR        30'b000000011100000001000111000000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_56_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_57
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_57_HW_ADDR     27'b000000011000000001000111001
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_57_ADDR        30'b000000011000000001000111001000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_57_HW_ADDR     27'b000000011100000001000111001
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_57_ADDR        30'b000000011100000001000111001000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_57_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_58
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_58_HW_ADDR     27'b000000011000000001000111010
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_58_ADDR        30'b000000011000000001000111010000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_58_HW_ADDR     27'b000000011100000001000111010
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_58_ADDR        30'b000000011100000001000111010000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_58_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_59
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_59_HW_ADDR     27'b000000011000000001000111011
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_59_ADDR        30'b000000011000000001000111011000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_59_HW_ADDR     27'b000000011100000001000111011
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_59_ADDR        30'b000000011100000001000111011000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_59_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_62
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_62_HW_ADDR     27'b000000011000000001000111110
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_62_ADDR        30'b000000011000000001000111110000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_62_HW_ADDR     27'b000000011100000001000111110
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_62_ADDR        30'b000000011100000001000111110000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_62_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_mapping_63
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_63_HW_ADDR     27'b000000011000000001000111111
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_63_ADDR        30'b000000011000000001000111111000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_63_HW_ADDR     27'b000000011100000001000111111
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_MAPPING_63_ADDR        30'b000000011100000001000111111000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_WIDTH 64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_DEPTH 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_INT_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_POSITION      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_LOW_ADDR_WIDTH        0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_ADDR_RANGE    26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_READ_MASK     64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_READ_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_WRITE_MASK    64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_WRITE_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_SET_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_CLEAR_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_TOGGLE_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_RMASK 64'b1000000000000000000000000000000011111110000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_RESERVED_BIT_MASK     64'b0111111111111111111111111111111100000001111111111111110000111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_HW_LD_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_POR_VALUE     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_INTERNAL_REG  1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_ZERO_TIME_OMNI        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_NUM_FIELDS    4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_MDO_MODE_FID  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_MDO_MODE_SLC  63:63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_MDO_MODE_WIDTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_MDO_MODE_INT_SLC      0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_MDO_MODE_POSITION     63
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_MDO_MODE_FMASK        64'b1000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_MDO_MODE_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_MDO_MODE_POR_VALUE    1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_V_FID 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_V_SLC 31:31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_V_WIDTH       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_V_INT_SLC     0:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_V_POSITION    31
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_V_FMASK       64'b0000000000000000000000000000000010000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_V_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_V_POR_VALUE   1'b0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_T_ID_FID      2
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_T_ID_SLC      30:25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_T_ID_WIDTH    6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_T_ID_INT_SLC  5:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_T_ID_POSITION 25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_T_ID_FMASK    64'b0000000000000000000000000000000001111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_T_ID_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_T_ID_POR_VALUE        6'b000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_INT_CNTRL_NUM_FID     3
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_INT_CNTRL_NUM_SLC     9:6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_INT_CNTRL_NUM_WIDTH   4
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_INT_CNTRL_NUM_INT_SLC 3:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_INT_CNTRL_NUM_POSITION        6
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_INT_CNTRL_NUM_FMASK   64'b0000000000000000000000000000000000000000000000000000001111000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_INT_CNTRL_NUM_HW_LD_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_MAPPING_63_INT_CNTRL_NUM_POR_VALUE       4'b0000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_20
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_20_HW_ADDR   27'b000000011000000001010010100
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_20_ADDR      30'b000000011000000001010010100000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_20_HW_ADDR   27'b000000011100000001010010100
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_20_ADDR      30'b000000011100000001010010100000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_20_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_21
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_21_HW_ADDR   27'b000000011000000001010010101
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_21_ADDR      30'b000000011000000001010010101000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_21_HW_ADDR   27'b000000011100000001010010101
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_21_ADDR      30'b000000011100000001010010101000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_21_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_22
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_22_HW_ADDR   27'b000000011000000001010010110
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_22_ADDR      30'b000000011000000001010010110000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_22_HW_ADDR   27'b000000011100000001010010110
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_22_ADDR      30'b000000011100000001010010110000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_22_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_23
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_23_HW_ADDR   27'b000000011000000001010010111
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_23_ADDR      30'b000000011000000001010010111000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_23_HW_ADDR   27'b000000011100000001010010111
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_23_ADDR      30'b000000011100000001010010111000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_23_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_24
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_24_HW_ADDR   27'b000000011000000001010011000
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_24_ADDR      30'b000000011000000001010011000000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_24_HW_ADDR   27'b000000011100000001010011000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_24_ADDR      30'b000000011100000001010011000000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_24_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_25
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_25_HW_ADDR   27'b000000011000000001010011001
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_25_ADDR      30'b000000011000000001010011001000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_25_HW_ADDR   27'b000000011100000001010011001
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_25_ADDR      30'b000000011100000001010011001000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_25_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_26
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_26_HW_ADDR   27'b000000011000000001010011010
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_26_ADDR      30'b000000011000000001010011010000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_26_HW_ADDR   27'b000000011100000001010011010
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_26_ADDR      30'b000000011100000001010011010000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_26_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_27
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_27_HW_ADDR   27'b000000011000000001010011011
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_27_ADDR      30'b000000011000000001010011011000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_27_HW_ADDR   27'b000000011100000001010011011
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_27_ADDR      30'b000000011100000001010011011000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_27_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_28
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_28_HW_ADDR   27'b000000011000000001010011100
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_28_ADDR      30'b000000011000000001010011100000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_28_HW_ADDR   27'b000000011100000001010011100
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_28_ADDR      30'b000000011100000001010011100000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_28_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_29
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_29_HW_ADDR   27'b000000011000000001010011101
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_29_ADDR      30'b000000011000000001010011101000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_29_HW_ADDR   27'b000000011100000001010011101
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_29_ADDR      30'b000000011100000001010011101000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_29_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_30
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_30_HW_ADDR   27'b000000011000000001010011110
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_30_ADDR      30'b000000011000000001010011110000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_30_HW_ADDR   27'b000000011100000001010011110
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_30_ADDR      30'b000000011100000001010011110000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_30_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_31
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_31_HW_ADDR   27'b000000011000000001010011111
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_31_ADDR      30'b000000011000000001010011111000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_31_HW_ADDR   27'b000000011100000001010011111
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_31_ADDR      30'b000000011100000001010011111000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_31_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_32
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_32_HW_ADDR   27'b000000011000000001010100000
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_32_ADDR      30'b000000011000000001010100000000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_32_HW_ADDR   27'b000000011100000001010100000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_32_ADDR      30'b000000011100000001010100000000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_32_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_33
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_33_HW_ADDR   27'b000000011000000001010100001
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_33_ADDR      30'b000000011000000001010100001000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_33_HW_ADDR   27'b000000011100000001010100001
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_33_ADDR      30'b000000011100000001010100001000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_33_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_34
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_34_HW_ADDR   27'b000000011000000001010100010
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_34_ADDR      30'b000000011000000001010100010000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_34_HW_ADDR   27'b000000011100000001010100010
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_34_ADDR      30'b000000011100000001010100010000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_34_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_35
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_35_HW_ADDR   27'b000000011000000001010100011
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_35_ADDR      30'b000000011000000001010100011000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_35_HW_ADDR   27'b000000011100000001010100011
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_35_ADDR      30'b000000011100000001010100011000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_35_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_36
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_36_HW_ADDR   27'b000000011000000001010100100
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_36_ADDR      30'b000000011000000001010100100000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_36_HW_ADDR   27'b000000011100000001010100100
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_36_ADDR      30'b000000011100000001010100100000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_36_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_37
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_37_HW_ADDR   27'b000000011000000001010100101
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_37_ADDR      30'b000000011000000001010100101000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_37_HW_ADDR   27'b000000011100000001010100101
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_37_ADDR      30'b000000011100000001010100101000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_37_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_38
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_38_HW_ADDR   27'b000000011000000001010100110
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_38_ADDR      30'b000000011000000001010100110000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_38_HW_ADDR   27'b000000011100000001010100110
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_38_ADDR      30'b000000011100000001010100110000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_38_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_39
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_39_HW_ADDR   27'b000000011000000001010100111
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_39_ADDR      30'b000000011000000001010100111000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_39_HW_ADDR   27'b000000011100000001010100111
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_39_ADDR      30'b000000011100000001010100111000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_39_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_40
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_40_HW_ADDR   27'b000000011000000001010101000
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_40_ADDR      30'b000000011000000001010101000000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_40_HW_ADDR   27'b000000011100000001010101000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_40_ADDR      30'b000000011100000001010101000000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_40_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_41
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_41_HW_ADDR   27'b000000011000000001010101001
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_41_ADDR      30'b000000011000000001010101001000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_41_HW_ADDR   27'b000000011100000001010101001
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_41_ADDR      30'b000000011100000001010101001000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_41_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_42
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_42_HW_ADDR   27'b000000011000000001010101010
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_42_ADDR      30'b000000011000000001010101010000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_42_HW_ADDR   27'b000000011100000001010101010
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_42_ADDR      30'b000000011100000001010101010000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_42_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_43
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_43_HW_ADDR   27'b000000011000000001010101011
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_43_ADDR      30'b000000011000000001010101011000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_43_HW_ADDR   27'b000000011100000001010101011
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_43_ADDR      30'b000000011100000001010101011000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_43_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_44
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_44_HW_ADDR   27'b000000011000000001010101100
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_44_ADDR      30'b000000011000000001010101100000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_44_HW_ADDR   27'b000000011100000001010101100
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_44_ADDR      30'b000000011100000001010101100000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_44_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_45
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_45_HW_ADDR   27'b000000011000000001010101101
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_45_ADDR      30'b000000011000000001010101101000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_45_HW_ADDR   27'b000000011100000001010101101
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_45_ADDR      30'b000000011100000001010101101000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_45_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_46
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_46_HW_ADDR   27'b000000011000000001010101110
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_46_ADDR      30'b000000011000000001010101110000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_46_HW_ADDR   27'b000000011100000001010101110
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_46_ADDR      30'b000000011100000001010101110000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_46_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_47
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_47_HW_ADDR   27'b000000011000000001010101111
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_47_ADDR      30'b000000011000000001010101111000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_47_HW_ADDR   27'b000000011100000001010101111
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_47_ADDR      30'b000000011100000001010101111000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_47_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_48
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_48_HW_ADDR   27'b000000011000000001010110000
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_48_ADDR      30'b000000011000000001010110000000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_48_HW_ADDR   27'b000000011100000001010110000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_48_ADDR      30'b000000011100000001010110000000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_48_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_49
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_49_HW_ADDR   27'b000000011000000001010110001
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_49_ADDR      30'b000000011000000001010110001000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_49_HW_ADDR   27'b000000011100000001010110001
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_49_ADDR      30'b000000011100000001010110001000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_49_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_50
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_50_HW_ADDR   27'b000000011000000001010110010
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_50_ADDR      30'b000000011000000001010110010000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_50_HW_ADDR   27'b000000011100000001010110010
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_50_ADDR      30'b000000011100000001010110010000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_50_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_51
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_51_HW_ADDR   27'b000000011000000001010110011
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_51_ADDR      30'b000000011000000001010110011000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_51_HW_ADDR   27'b000000011100000001010110011
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_51_ADDR      30'b000000011100000001010110011000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_51_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_52
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_52_HW_ADDR   27'b000000011000000001010110100
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_52_ADDR      30'b000000011000000001010110100000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_52_HW_ADDR   27'b000000011100000001010110100
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_52_ADDR      30'b000000011100000001010110100000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_52_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_53
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_53_HW_ADDR   27'b000000011000000001010110101
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_53_ADDR      30'b000000011000000001010110101000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_53_HW_ADDR   27'b000000011100000001010110101
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_53_ADDR      30'b000000011100000001010110101000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_53_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_54
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_54_HW_ADDR   27'b000000011000000001010110110
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_54_ADDR      30'b000000011000000001010110110000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_54_HW_ADDR   27'b000000011100000001010110110
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_54_ADDR      30'b000000011100000001010110110000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_54_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_55
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_55_HW_ADDR   27'b000000011000000001010110111
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_55_ADDR      30'b000000011000000001010110111000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_55_HW_ADDR   27'b000000011100000001010110111
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_55_ADDR      30'b000000011100000001010110111000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_55_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_56
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_56_HW_ADDR   27'b000000011000000001010111000
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_56_ADDR      30'b000000011000000001010111000000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_56_HW_ADDR   27'b000000011100000001010111000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_56_ADDR      30'b000000011100000001010111000000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_56_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_57
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_57_HW_ADDR   27'b000000011000000001010111001
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_57_ADDR      30'b000000011000000001010111001000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_57_HW_ADDR   27'b000000011100000001010111001
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_57_ADDR      30'b000000011100000001010111001000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_57_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_58
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_58_HW_ADDR   27'b000000011000000001010111010
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_58_ADDR      30'b000000011000000001010111010000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_58_HW_ADDR   27'b000000011100000001010111010
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_58_ADDR      30'b000000011100000001010111010000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_58_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_59
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_59_HW_ADDR   27'b000000011000000001010111011
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_59_ADDR      30'b000000011000000001010111011000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_59_HW_ADDR   27'b000000011100000001010111011
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_59_ADDR      30'b000000011100000001010111011000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_59_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_62
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_62_HW_ADDR   27'b000000011000000001010111110
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_62_ADDR      30'b000000011000000001010111110000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_62_HW_ADDR   27'b000000011100000001010111110
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_62_ADDR      30'b000000011100000001010111110000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_62_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_clr_int_reg_63
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_63_HW_ADDR   27'b000000011000000001010111111
`define FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_63_ADDR      30'b000000011000000001010111111000
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_63_HW_ADDR   27'b000000011100000001010111111
`define FIRE_DLC_IMU_ISS_CSR_B_CLR_INT_REG_63_ADDR      30'b000000011100000001010111111000

`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_DEPTH       1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_LOW_ADDR_WIDTH      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_ADDR_RANGE  26:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_READ_MASK   64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_READ_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_WRITE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_WRITE_ONLY_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_SET_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_CLEAR_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_RMASK       64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_RESERVED_BIT_MASK   64'b1111111111111111111111111111111111111111111111111111111111111100
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_INTERNAL_REG        0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_EXTERNAL_DECODE_REG 1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_ZERO_TIME_OMNI      0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_NUM_FIELDS  1
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_INT_STATE_FID       0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_INT_STATE_SLC       1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_INT_STATE_WIDTH     2
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_INT_STATE_INT_SLC   1:0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_INT_STATE_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_INT_STATE_FMASK     64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_INT_STATE_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000011
`define FIRE_DLC_IMU_ISS_CSR_CLR_INT_REG_63_INT_STATE_POR_VALUE 2'b00

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_retry_timer
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_RETRY_TIMER_HW_ADDR    27'b000000011000000001101000000
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_RETRY_TIMER_ADDR       30'b000000011000000001101000000000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_RETRY_TIMER_HW_ADDR    27'b000000011100000001101000000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_RETRY_TIMER_ADDR       30'b000000011100000001101000000000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_WIDTH        64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_DEPTH        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_SLC  63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_INT_SLC      63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_POSITION     0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_LOW_ADDR_WIDTH       0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_ADDR_RANGE   26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_READ_MASK    64'b0000000000000000000000000000000000000001111111111111111111111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_READ_ONLY_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_WRITE_MASK   64'b0000000000000000000000000000000000000001111111111111111111111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_WRITE_ONLY_MASK      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_SET_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_CLEAR_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_TOGGLE_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_RMASK        64'b0000000000000000000000000000000000000001111111111111111111111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_RESERVED_BIT_MASK    64'b1111111111111111111111111111111111111110000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_HW_LD_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_POR_VALUE    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_INTERNAL_REG 1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_ZERO_TIME_OMNI       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_NUM_FIELDS   1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_LIMIT_FID    0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_LIMIT_SLC    24:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_LIMIT_WIDTH  25
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_LIMIT_INT_SLC        24:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_LIMIT_POSITION       0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_LIMIT_FMASK  64'b0000000000000000000000000000000000000001111111111111111111111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_LIMIT_HW_LD_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_RETRY_TIMER_LIMIT_POR_VALUE      25'b0000000000000000000000000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_state_status_1
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_STATE_STATUS_1_HW_ADDR 27'b000000011000000001101000010
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_STATE_STATUS_1_ADDR    30'b000000011000000001101000010000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_STATE_STATUS_1_HW_ADDR 27'b000000011100000001101000010
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_STATE_STATUS_1_ADDR    30'b000000011100000001101000010000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_WIDTH     64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_DEPTH     1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_INT_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_LOW_ADDR_WIDTH    0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_ADDR_RANGE        26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_READ_MASK 64'b1111111111111111111111110000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_READ_ONLY_MASK    64'b1111111111111111111111110000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_WRITE_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_WRITE_ONLY_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_SET_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_CLEAR_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_TOGGLE_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_RMASK     64'b1111111111111111111111110000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_RESERVED_BIT_MASK 64'b0000000000000000000000001111111111111111111111111111111111111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_INTERNAL_REG      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_EXTERNAL_DECODE_REG       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_ZERO_TIME_OMNI    0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_NUM_FIELDS        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_STATE_FID 0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_STATE_SLC 63:40
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_STATE_WIDTH       24
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_STATE_INT_SLC     23:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_STATE_POSITION    40
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_STATE_FMASK       64'b1111111111111111111111110000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_STATE_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_1_STATE_POR_VALUE   24'b000000000000000000000000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_imu_iss_csr_interrupt_state_status_2
//-------------------------------------------------------

`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_STATE_STATUS_2_HW_ADDR 27'b000000011000000001101000011
`define FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_STATE_STATUS_2_ADDR    30'b000000011000000001101000011000
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_STATE_STATUS_2_HW_ADDR 27'b000000011100000001101000011
`define FIRE_DLC_IMU_ISS_CSR_B_INTERRUPT_STATE_STATUS_2_ADDR    30'b000000011100000001101000011000

`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_WIDTH     64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_DEPTH     1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_SLC       63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_INT_SLC   63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_POSITION  0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_LOW_ADDR_WIDTH    0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_ADDR_RANGE        26:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_READ_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_READ_ONLY_MASK    64'b1111111111111111111111111111111111111111111111111111111111111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_WRITE_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_WRITE_ONLY_MASK   64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_SET_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_CLEAR_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_TOGGLE_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_RMASK     64'b1111111111111111111111111111111111111111111111111111111111111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_RESERVED_BIT_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_HW_LD_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_INTERNAL_REG      0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_EXTERNAL_DECODE_REG       1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_ZERO_TIME_OMNI    0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_NUM_FIELDS        1
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_STATE_FID 0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_STATE_SLC 63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_STATE_WIDTH       64
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_STATE_INT_SLC     63:0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_STATE_POSITION    0
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_STATE_FMASK       64'b1111111111111111111111111111111111111111111111111111111111111111
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_STATE_HW_LD_MASK  64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_IMU_ISS_CSR_INTERRUPT_STATE_STATUS_2_STATE_POR_VALUE   64'b0000000000000000000000000000000000000000000000000000000000000000


`endif