// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: ncu_ssiui4_ctl.v
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
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`define UCB_BUS_WIDTH_M1 3
wire stall_d1_ff_scanout;
wire vld_buf0_ff_scanout;
wire data_buf0_ff_scanin;
wire data_buf0_ff_scanout;
wire skid_buf1_en_ff_scanin;
wire skid_buf1_en_ff_scanout;
wire vld_buf1_ff_scanout;
wire data_buf1_ff_scanin;
wire data_buf1_ff_scanout;
wire skid_buf1_sel_ff_scanin;
wire skid_buf1_sel_ff_scanout;
wire [31:0] indata_vec_next;
wire indata_vec_ff_scanin;
wire indata_vec_ff_scanout;
wire [127:0] indata_buf_next;
wire indata_buf_ff_scanin;
wire indata_buf_ff_scanout;
wire indata_vec0_d1_ff_scanin;
wire indata_vec0_d1_ff_scanout;
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
input [`UCB_BUS_WIDTH_M1 :0] data;
output [127:0] indata_buf;
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/************************************************************
* UCB bus interface flops
* This is to make signals going between IOB and UCB flop-to-flop
************************************************************/
assign stall_d1_n = ~stall_d1;
ncu_ssiui4_ctl_msff_ctl_macro__en_1__width_1 vld_d1_ff
.scan_in(vld_d1_ff_scanin),
.scan_out(vld_d1_ff_scanout),
ncu_ssiui4_ctl_msff_ctl_macro__en_1__width_4 data_d1_ff
.scan_in(data_d1_ff_scanin),
.scan_out(data_d1_ff_scanout),
.dout (data_d1[`UCB_BUS_WIDTH_M1:0]),
.din (data[`UCB_BUS_WIDTH_M1:0]),
ncu_ssiui4_ctl_msff_ctl_macro__width_1 stall_ff
.scan_in(stall_ff_scanin),
.scan_out(stall_ff_scanout),
ncu_ssiui4_ctl_msff_ctl_macro__width_1 stall_d1_ff
.scan_in(stall_d1_ff_scanin),
.scan_out(stall_d1_ff_scanout),
/************************************************************
* We need a two deep skid buffer to handle stalling.
************************************************************/
// Assertion: stall has to be deasserted for more than 1 cycle
// ie time between two separate stalls has to be
// at least two cycles. Otherwise, contents from
// skid buffer will be lost.
assign skid_buf0_en = stall_a1 & ~stall;
ncu_ssiui4_ctl_msff_ctl_macro__en_1__width_1 vld_buf0_ff
.scan_in(vld_buf0_ff_scanin),
.scan_out(vld_buf0_ff_scanout),
ncu_ssiui4_ctl_msff_ctl_macro__en_1__width_4 data_buf0_ff
.scan_in(data_buf0_ff_scanin),
.scan_out(data_buf0_ff_scanout),
.dout (data_buf0[`UCB_BUS_WIDTH_M1 :0]),
.din (data_d1[`UCB_BUS_WIDTH_M1 :0]),
ncu_ssiui4_ctl_msff_ctl_macro__width_1 skid_buf1_en_ff
.scan_in(skid_buf1_en_ff_scanin),
.scan_out(skid_buf1_en_ff_scanout),
ncu_ssiui4_ctl_msff_ctl_macro__en_1__width_1 vld_buf1_ff
.scan_in(vld_buf1_ff_scanin),
.scan_out(vld_buf1_ff_scanout),
ncu_ssiui4_ctl_msff_ctl_macro__en_1__width_4 data_buf1_ff
.scan_in(data_buf1_ff_scanin),
.scan_out(data_buf1_ff_scanout),
.dout (data_buf1[`UCB_BUS_WIDTH_M1 :0]),
.din (data_d1[`UCB_BUS_WIDTH_M1 :0]),
/************************************************************
* Mux between skid buffer and interface flop
************************************************************/
// Assertion: stall has to be deasserted for more than 1 cycle
// ie time between two separate stalls has to be
// at least two cycles. Otherwise, contents from
// skid buffer will be lost.
assign skid_buf0_sel = ~stall_a1 & stall;
ncu_ssiui4_ctl_msff_ctl_macro__width_1 skid_buf1_sel_ff
.scan_in(skid_buf1_sel_ff_scanin),
.scan_out(skid_buf1_sel_ff_scanout),
assign vld_mux = skid_buf0_sel ? vld_buf0 :
skid_buf1_sel ? vld_buf1 :
assign data_mux[`UCB_BUS_WIDTH_M1 :0] = skid_buf0_sel ? data_buf0[`UCB_BUS_WIDTH_M1 :0] :
skid_buf1_sel ? data_buf1[`UCB_BUS_WIDTH_M1 :0] :
data_d1[`UCB_BUS_WIDTH_M1 :0];
/************************************************************
************************************************************/
assign indata_vec_next[`CYC_NUM_M1:0] = {vld_mux, indata_vec[`CYC_NUM_M1 :1]};
assign stall_a1_n = ~stall_a1;
ncu_ssiui4_ctl_msff_ctl_macro__en_1__width_32 indata_vec_ff
.scan_in(indata_vec_ff_scanin),
.scan_out(indata_vec_ff_scanout),
.dout (indata_vec[`CYC_NUM_M1 :0]),
.din (indata_vec_next[`CYC_NUM_M1 :0]),
assign indata_buf_next[127:0] = {data_mux[`UCB_BUS_WIDTH_M1 :0], indata_buf[127:`UCB_BUS_WIDTH ]};
ncu_ssiui4_ctl_msff_ctl_macro__en_1__width_128 indata_buf_ff
.scan_in(indata_buf_ff_scanin),
.scan_out(indata_buf_ff_scanout),
.dout (indata_buf[127:0]),
.din (indata_buf_next[127:0]),
ncu_ssiui4_ctl_msff_ctl_macro__en_1__width_1 indata_vec0_d1_ff
.scan_in(indata_vec0_d1_ff_scanin),
.scan_out(indata_vec0_d1_ff_scanout),
assign indata_buf_vld = indata_vec[0] & ~indata_vec0_d1;
/**** adding clock header ****/
ncu_ssiui4_ctl_l1clkhdr_ctl_macro clkgen (
/*** building tcu port ***/
assign pce_ov = tcu_pce_ov;
assign stop = tcu_clk_stop;
assign vld_d1_ff_scanin = scan_in ;
assign data_d1_ff_scanin = vld_d1_ff_scanout ;
assign stall_ff_scanin = data_d1_ff_scanout ;
assign stall_d1_ff_scanin = stall_ff_scanout ;
assign vld_buf0_ff_scanin = stall_d1_ff_scanout ;
assign data_buf0_ff_scanin = vld_buf0_ff_scanout ;
assign skid_buf1_en_ff_scanin = data_buf0_ff_scanout ;
assign vld_buf1_ff_scanin = skid_buf1_en_ff_scanout ;
assign data_buf1_ff_scanin = vld_buf1_ff_scanout ;
assign skid_buf1_sel_ff_scanin = data_buf1_ff_scanout ;
assign indata_vec_ff_scanin = skid_buf1_sel_ff_scanout ;
assign indata_buf_ff_scanin = indata_vec_ff_scanout ;
assign indata_vec0_d1_ff_scanin = indata_buf_ff_scanout ;
assign scan_out = indata_vec0_d1_ff_scanout;
// any PARAMS parms go into naming of macro
module ncu_ssiui4_ctl_msff_ctl_macro__en_1__width_1 (
assign fdin[0:0] = (din[0:0] & {1{en}}) | (dout[0:0] & ~{1{en}});
// any PARAMS parms go into naming of macro
module ncu_ssiui4_ctl_msff_ctl_macro__en_1__width_4 (
assign fdin[3:0] = (din[3:0] & {4{en}}) | (dout[3:0] & ~{4{en}});
// any PARAMS parms go into naming of macro
module ncu_ssiui4_ctl_msff_ctl_macro__width_1 (
assign fdin[0:0] = din[0:0];
// any PARAMS parms go into naming of macro
module ncu_ssiui4_ctl_msff_ctl_macro__en_1__width_32 (
assign fdin[31:0] = (din[31:0] & {32{en}}) | (dout[31:0] & ~{32{en}});
.so({so[30:0],scan_out}),
// any PARAMS parms go into naming of macro
module ncu_ssiui4_ctl_msff_ctl_macro__en_1__width_128 (
assign fdin[127:0] = (din[127:0] & {128{en}}) | (dout[127:0] & ~{128{en}});
.si({scan_in,so[126:0]}),
.so({so[126:0],scan_out}),
// any PARAMS parms go into naming of macro
module ncu_ssiui4_ctl_l1clkhdr_ctl_macro (