// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: mif_control_sm.v
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// ========== Copyright Header End ============================================
fetch_instr, poll_instr, ld_output_reg, ld_poll_status,
clk, reset, instr_pnd, poll_en, mif_pio_intr, wr_done, rd_done,
wire [2:0] new_ctl_state;
function [6:0] control_state_transitions;
case (ctl_state) //synopsys parallel_case
if (instr_pnd) new_ctl_state = FETCH;
else if (!d_ld_poll_status & poll_en & !mif_pio_intr)
else new_ctl_state = IDLE;
if (illegal_instr | wr_done)
else if (rd_done) new_ctl_state = RD1;
else new_ctl_state = EX1;
if (rd_done) new_ctl_state = RD2;
else new_ctl_state = EX2;
control_state_transitions = {fetch_instr,poll_instr,ld_output_reg,
ld_poll_status,new_ctl_state};
assign {fetch_instr,poll_instr,ld_output_reg,ld_poll_status,new_ctl_state} =
control_state_transitions(reset,d_ld_poll_status,instr_pnd,poll_en,
mif_pio_intr,wr_done,rd_done,
illegal_instr,ctl_state);
RegDff #(3) _RegDff (.din(new_ctl_state[2:0]),.clk(clk),
FD1 LD_STATUS(.D(ld_poll_status),.CP(clk),.Q(d_ld_poll_status));