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// OpenSPARC T2 Processor File: niu_pio_debug.v
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/*********************************************************************
* NIU TDMC Top Level Debug Module
* Orignal Author(s): Maya Suresh
* Project(s): Neptune/Niagara 2
* Copyright (c) 2004 Sun Microsystems, Inc.
* This verilog model is the confidential and proprietary property of
* Sun Microsystems, Inc., and the possession or use of this model
* requires a written license from Sun Microsystems, Inc.
**********************************************************************/
input [2:0] pio_rw_state ;
input [1:0] accepted_state ;
output [31:0] pio_debug_port;
reg [31:0] pio_debug_port;
input [5:0] debug_select ;
input [31:0] TrainingVector ;
/*--------------------------------------------------------------*/
/*--------------------------------------------------------------*/
if (!Reset_L) pio_debug_port <= 32'h0;
6'h0: pio_debug_port <= {22'b0,rd_ptr[4:0],wr_ptr[4:0]};
6'h1: pio_debug_port <= {24'b0,ig_state[2:0],pio_rw_state[2:0],accepted_state[1:0]};
6'h2: pio_debug_port <= ~pio_debug_port;
6'h3: pio_debug_port <= TrainingVector;
default: pio_debug_port <= 32'h0;