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// OpenSPARC T2 Processor File: tlu_cel_dp.v
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input tlu_cerer_tccp; // Correctable precise enable
input tlu_cerer_tcup; // Unorrectable precise enable
input tlu_cerer_tccd; // Correctable disrupting enable
input tlu_cerer_tcud; // Unorrectable disrupting enable
input [7:0] ced_syndrome;
output [7:0] cel_syndrome;
output [7:0] cel_crit_ecc;
////////////////////////////////////////////////////////////////////////////////
assign pce_ov = tcu_pce_ov;
// Data is flopped, but ECC is not... so flop here
tlu_cel_dp_msff_macro__minbuff_1__width_28 ecc_lat (
.scan_in(ecc_lat_scanin),
.scan_out(ecc_lat_scanout),
assign cel_crit_ecc[7:0] =
tlu_cel_dp_buff_macro__rep_1__width_8 ecc_buf (
// cecc_err & tlu_cerer_tccp;
// uecc_err & tlu_cerer_tcup;
// cecc_err & tlu_cerer_tccd;
// uecc_err & tlu_cerer_tcud;
// cel_tccp & asi_tccup_in;
// cel_tcup & asi_tccup_in;
tlu_cel_dp_and_macro__ports_3__width_1 tccp_in_and (
tlu_cel_dp_and_macro__ports_3__width_1 tcup_in_and (
tlu_cel_dp_and_macro__ports_3__width_1 tccd_in_and (
tlu_cel_dp_and_macro__ports_3__width_1 tcud_in_and (
supply0 vss; // <- port for ground
supply1 vdd; // <- port for power
assign ecc_lat_scanin = scan_in ;
assign scan_out = ecc_lat_scanout ;
// any PARAMS parms go into naming of macro
module tlu_cel_dp_msff_macro__minbuff_1__width_28 (
.so({so[26:0],scan_out}),
module tlu_cel_dp_buff_macro__rep_1__width_8 (
// and macro for ports = 2,3,4
module tlu_cel_dp_and_macro__ports_3__width_1 (