* ========== Copyright Header Begin ==========================================
* OpenSPARC T2 Processor File: tso_n1_prod_cons2_pio.s
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* ========== Copyright Header End ============================================
#define MAIN_PAGE_HV_ALSO
#define spinlock_addr_reg %o0
#define data_base_reg %o1
#define global_cnt_reg %o5
wr %g0, 0x4, %fprs /* make sure fef is 1 */
setx spinlock_address, %l0, spinlock_addr_reg ! spinlock address
set ITERATIONS, global_cnt_reg !
!Some of the threads are producers, some are consumers
! A pair of producer and consumer has the same ID.
!=====================================================
add %g0, 0x8, my_id_reg ! this is my ID address
!====================================================================================
ld [spinlock_addr_reg + 0x10], test_reg ! try to acquire lock
tst test_reg ! did we get it?
ld [spinlock_addr_reg + 0x18], test_reg ! try to acquire lock
tst test_reg ! did we get it?
ld [spinlock_addr_reg + 0x20], test_reg ! try to acquire lock
tst test_reg ! did we get it?
ld [spinlock_addr_reg + 0x28], test_reg ! try to acquire lock
tst test_reg ! did we get it?
ld [spinlock_addr_reg + 0x30], test_reg ! try to acquire lock
tst test_reg ! did we get it?
ld [spinlock_addr_reg + 0x38], test_reg ! try to acquire lock
tst test_reg ! did we get it?
ld [spinlock_addr_reg + 0x40], test_reg ! try to acquire lock
tst test_reg ! did we get it?
!====================================================================================
ld [spinlock_addr_reg + my_id_reg], test_reg ! try to acquire lock
sub test_reg, 0x55, %i1 ! code to end the test
be good_end ! end the test
sub test_reg, 0x1, %i1 ! code for available data
andcc my_id_reg, 0x8, %i1
!====================================================================================
setx protected_area, tmp1, data_base_reg
st %g0, [data_base_reg + my_id_reg] ! cleanup
add data_base_reg, 0x40, data_base_reg ! increment the address
bne producer_loop0 ! repeat
setx protected_area, tmp1, data_base_reg
st my_id_reg, [data_base_reg + my_id_reg] ! store my ID in there
add data_base_reg, 0x40, data_base_reg ! increment the address
bne producer_loop1 ! repeat
st tmp1, [spinlock_addr_reg + 0x10] ! data ready
st tmp1, [spinlock_addr_reg + 0x18] ! data ready
st tmp1, [spinlock_addr_reg + 0x20] ! data ready
st tmp1, [spinlock_addr_reg + 0x28] ! data ready
st tmp1, [spinlock_addr_reg + 0x30] ! data ready
st tmp1, [spinlock_addr_reg + 0x38] ! data ready
st tmp1, [spinlock_addr_reg + 0x40] ! data ready
st tmp1, [spinlock_addr_reg + 0x10] ! data ready
st tmp1, [spinlock_addr_reg + 0x18] ! data ready
st tmp1, [spinlock_addr_reg + 0x20] ! data ready
st tmp1, [spinlock_addr_reg + 0x28] ! data ready
st tmp1, [spinlock_addr_reg + 0x30] ! data ready
st tmp1, [spinlock_addr_reg + 0x38] ! data ready
st tmp1, [spinlock_addr_reg + 0x40] ! data ready
!====================================================================================
setx protected_area, tmp1, data_base_reg
ld [data_base_reg + 0x8], %i2 ! load producer's ID in there
add data_base_reg, 0x40, data_base_reg ! increment the address
bne consumer_loop1 ! repeat
st %g0, [spinlock_addr_reg+ my_id_reg] ! consumer ready
setx protected_area, tmp1, data_base_reg
st %i1, [data_base_reg + my_id_reg] ! store my ID in there
ld [data_base_reg + my_id_reg], %f2 ! load producer's ID in there
ld [data_base_reg + 0x8], %f14 ! load producer's ID in there
fcmps %fcc0, %f2, %f14 ! should be my ID
add data_base_reg, 0x40, data_base_reg ! increment the address
bne consumer_loop2 ! repeat
st %g0, [spinlock_addr_reg+ my_id_reg] ! consumer ready
!==========================
SECTION .MY_DATA0 DATA_VA=0xd0100000
part_0_ctx_nonzero_tsb_config_0,
TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
TTE_L=0, TTE_CP=0, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1
SECTION .MY_DATA1 DATA_VA=0xd1110000
part_0_ctx_nonzero_tsb_config_1,
TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
TTE_L=0, TTE_CP=0, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1