* ========== Copyright Header Begin ==========================================
* OpenSPARC T2 Processor File: kaos_ro_handler.s
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* ========== Copyright Header End ============================================
#define LOCAL_HYPERVISOR_SECTION_TEXT_VA 0x20210000
Name = local_hypervisor_section_text,
SECTION local_hypervisor_section_text TEXT_VA=LOCAL_SUPERVISOR_SECTION_TEXT_VA
.global toggle_tte_w_handler
setx 0xfffff000, %g2, %g3
ldxa [%g7] ASI_PARTITION_ID, %g2 ! get sfsr
ldxa [%g7] ASI_PARTITION_ID, %g3 ! get sfar
! Load TSB_CONFIG address in %g7
mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_0, %g7
toggle_tte_w_tsbptr_calc:
!Uses g1-g5, Expects TSB_CONFIG address in %g7, va in %g6, REsults in %g1
#include "mmu_ptr_calc.s"
setx 0x1fff, %g4, %g2 ! 13 context-bits
ldda [%g1] ASI_NUCLEUS_QUAD_LDD, %g4 ! load tte from ps0 tsb
!ldxa [%g0] ASI_DMMU_TAG_REG, %g2 ! get va/context from tag-target
bne %xcc, toggle_tte_w_check_for_ptr_chase
ba toggle_tte_w_trap_done
toggle_tte_w_check_for_ptr_chase:
cmp %g4, -1 ! if all 1's, follow link
be,a %xcc, toggle_tte_w_ptr_chase
!! Look up all config registers (1-3)
!! Gotta do SW table walk through the 3 remaing configs ..
! Expect %g7 to stll have addr of last ctx0 config register
! and %g6 should have va/context from tag access register
sub %g7, 0x20, %g7 ! this executes only if branch taken
cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1
bl,a toggle_tte_w_tsbptr_calc
mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1, %g7
cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2
bl,a toggle_tte_w_tsbptr_calc
mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2, %g7
cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3
bl,a toggle_tte_w_tsbptr_calc
mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3, %g7
sllx %g5, 15, %g3 ! extract size[2]
sllx %g5, 1, %g1 ! extract size[1:0]
or %g3, %g1, %g1 ! %g1 = size[2:0]
srlx %g1, 61, %g1 ! %g1 = size[2:0]
sethi %hi(0x00001fff), %g1
or %g3, %g1, %g3 ! %g3 = va/ctxt mask based on size[2:0]
and %g2, %g3, %g3 ! apply mask
cmp %g3, %g4 ! check if va/ctxt match
be %xcc, toggle_tte_w_trap_done
or %g5, %g0, %g3 ! %g3 is link-reg
toggle_tte_w_ptr_chase_loop:
ldda [%g3] ASI_NUCLEUS_QUAD_LDD, %g4 ! load tte from tsb
ldxa [%g0] ASI_DMMU_TAG_REG, %g2 ! get va/context from tag-target
bne %xcc, toggle_tte_w_follow_link
ba toggle_tte_w_trap_done
mov ASI_PARTITION_ID_VAL, %g1 ! offset (VA) for patrition id
toggle_tte_w_follow_link:
bne %xcc, toggle_tte_w_ptr_chase_loop ! keep chasing pointer
! Look up the Next TSB, until done with all TSBs ?
! Compare with TSB_CONFIG_3 for ctx0 and TSB_CONFIG_3+0x20 for ctx!0
mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3, %g4
// check to see if RA[39] is set.
// RA[39] = 0 means accessing memory space
// RA[39] = 1 means accessing I/O space
brnz %g3, toggle_tte_w_skip_part_base
! add partition base to data-in
setx partition_base_list, %g3, %g2 ! for partition base
ldxa [%g1] ASI_PARTITION_ID, %g3 ! partition id
sllx %g3, 3, %g3 ! offset - partition list
toggle_tte_w_skip_part_base:
mov 0x40, %g1 ! set W-bit
!stxa %g4, [ %g7 ] ASI_PARTITION_ID ! {tag-access, data-in}
stxa %g5, [ %g6 ] ASI_DTLB_DATA_IN
toggle_tte_w_handler_ext:
cmp %g4, -1 ! if all 1's, follow link
be,a %xcc, toggle_tte_w_ptr_chase
mov 0, %g7 ! remember ptr chase from ps0
!! Look up all config registers (1-3)
!! Gotta do SW table walk through the 3 remaing configs ..
! Expect %g7 to stll have addr of last ctx0 config register
! and %g6 should have va/context from tag access register
sub %g7, 0x20, %g7 ! this executes only if branch taken
cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1
bl,a toggle_tte_w_tsbptr_calc
mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1, %g7
cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2
bl,a toggle_tte_w_tsbptr_calc
mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2, %g7
cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3
bl,a toggle_tte_w_tsbptr_calc
mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3, %g7
! Now try other crazy stuff, which has not been debugged for N2
sllx %g5, 15, %g3 ! extract size[2]
sllx %g5, 1, %g1 ! extract size[1:0]
or %g3, %g1, %g1 ! %g1 = size[2:0]
srlx %g1, 61, %g1 ! %g1 = size[2:0]
sethi %hi(0x00001fff), %g1
or %g3, %g1, %g3 ! %g3 = va/ctxt mask based on size[2:0]
and %g2, %g3, %g3 ! apply mask
cmp %g3, %g4 ! check if va/ctxt match
be,a %xcc, toggle_tte_w_trap_done
mov 0x80, %g1 ! offset (VA) for patrition id