Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / common / coverage / dmu / dmu_cmu_sample.vrhpal
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//
// OpenSPARC T2 Processor File: dmu_cmu_sample.vrhpal
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#inc "dmu_cov_inc.pal";
sample cov_dmu_cmu_Type (dmu_cmu_Type) {
state CMU_Ingress_DMA_MRd32 ( 7'b0000000);
state CMU_Ingress_DMA_MRd64 ( 7'b0100000);
state CMU_Ingress_DMA_MRdLk32 ( 7'b0000001);
state CMU_Ingress_DMA_MRdLk64 ( 7'b0100001);
state CMU_Ingress_Unsupported ( 7'b0001001);
state CMU_Ingress_DMA_MWr32 ( 7'b1000000);
state CMU_Ingress_DMA_MWr64 ( 7'b1100000);
state CMU_Ingress_MSI_MWr32 ( 7'b1011000);
state CMU_Ingress_MSI_MWr64 ( 7'b1111000);
state CMU_Ingress_MSG_MWr32 ( 7'b1010000);
state CMU_Ingress_MSG_MWr64 ( 7'b1110000);
state CMU_Ingress_NULL ( 7'b1111100);
state CMU_Ingress_MONDO ( 7'b1111010);
state CMU_Ingress_PIO_Cpl ( 7'b0001010);
state CMU_Ingress_PIO_CplD ( 7'b1001010);
}
sample cov_dmu_cmu_len (dmu_cmu_Len) {
. &toggle(10 );
cov_weight = 1;
}
sample cov_dmu_cmu_byte (dmu_cmu_Byte) {
. &toggle(12 );
cov_weight = 1;
}
sample cov_dmu_cmu_cntxt (dmu_cmu_Cntxt) {
. &toggle(5 );
cov_weight = 1;
}
sample cov_dmu_cmu_pkseq (dmu_cmu_Pkseq) {
. &toggle(5 );
cov_weight = 1;
}
// N2 does not toggle upper 4 bits of PA
sample cov_dmu_cmu_addr (dmu_cmu_Addr[36:0]) {
. &toggle(37 );
cov_weight = 1;
}
sample cov_dmu_cmu_addr_err (dmu_cmu_Addr_err) {
. &toggle(1 );
cov_weight = 1;
}