// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: neptune_memory_map.vri
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
// For the avoidance of doubt, and except that if any non-GPL license
// choice is available it will apply instead, Sun elects to use only
// the General Public License version 2 (GPLv2) at this time for any
// software where a choice of GPL license versions is made
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// ========== Copyright Header End ============================================
#define ADDRESS_RANGE_MASK 32'h01FF_0000
// In case of N2, the base address is 0x8100000000
#define NIU_BASE_ADDRESS 40'h8100000000
#define NEPTUNE_BASE_ADDRESS NIU_BASE_ADDRESS
#define PIO_BASE_ADDRESS 24'h000000
#define FZC_PIO_BASE_ADDRESS 24'h080000
/*PIO Virtual DMA Address */
#define PIO_VADDR_BASE_ADDR 24'h400000
/* MAC BLOCK: 0x18_0000 - 0x18_FFFF */
#define FZC_MAC_BASE_ADDRESS 24'h180000
/* IPP BLOCK: 0x28_0000 - 0x28_FFFF */
#define FZC_IPP_BASE_ADDRESS 24'h280000
/* FFLP BLOCK: 0x38_0000 - 0x37_FFFF */
#define FFLP_BASE_ADDRESS 24'h300000
/* FFLP BLOCK: 0x38_0000 - 0x38_FFFF */
#define FZC_FFLP_BASE_ADDRESS 24'h380000
#define FZC_FFLP_BASE_OFFSET 24'h020000
#define FZC_FFLP_BASE_OFFSET1 24'h040000
/* ZCP BLOCK: 0x50_0000 - 0x57_FFFF */
#define ZCP_BASE_ADDRESS 24'h500000
/* ZCP BLOCK: 0x58_0000 - 0x58_FFFF */
#define FZC_ZCP_BASE_ADDRESS 24'h580000
#define DMC_BASE_ADDRESS 24'h600000
#define FZC_DMC_BASE_ADDRESS 24'h680000
#define TXC_BASE_ADDRESS 24'h700000
#define FZC_TXC_BASE_ADDRESS 24'h780000
#define FZC_PROM_BASE_ADDRESS 24'hC80000
#define PIO_LDSV_BASE_ADDRESS 24'h800000
#define PIO_LDGIM_BASE_ADDRESS 24'h900000
#define PIO_IMASK0_BASE_ADDRESS 24'hA00000
#define PIO_IMASK1_BASE_ADDRESS 24'hB00000
/* Many address ranges are subdivided by port.
For each port, there is an identical memory
map. To determine the port subdivision, the
original address is masked with PORT_RANGE_MASK.
A compare-to register is initialized to zero.
This compare-to register is compared to the
result of masking the original address - a
compare indicates port 0. The compare_to
register is incremented by PORT_OFFSET
to check for port 1. This process is repeated
When using memory references associated with
a particular port, add the offset of the port
number to the base address:
(XXX_STATUS_REG + port_num*PORT_OFFSET)
The port range values are used by the pio fake
module and the shadow space module.
#define MAC_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + FZC_MAC_BASE_ADDRESS
#define IPP_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + FZC_IPP_BASE_ADDRESS
#define TXC_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + TXC_BASE_ADDRESS
#define FZC_TXC_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + FZC_TXC_BASE_ADDRESS
#define DMC_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + DMC_BASE_ADDRESS
#define FZC_DMC_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + FZC_DMC_BASE_ADDRESS
#define FFLP_VLAN_TBL_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + FZC_FFLP_BASE_ADDRESS
#define FFLP_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + FZC_FFLP_BASE_ADDRESS + \
#define FFLP_HASH_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + FFLP_BASE_ADDRESS
#define FFLP_FLOW_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + FZC_FFLP_BASE_ADDRESS + \
#define ZCP_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + ZCP_BASE_ADDRESS
#define FZC_ZCP_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + FZC_ZCP_BASE_ADDRESS
#define FZC_PROM_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + FZC_PROM_BASE_ADDRESS
#define PIO_BASE_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + PIO_BASE_ADDRESS
#define FZC_PIO_BASE_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + FZC_PIO_BASE_ADDRESS
#define PIO_VADDR_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + PIO_VADDR_BASE_ADDR
#define PIO_LDSV_BASE_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + PIO_LDSV_BASE_ADDRESS
#define PIO_LDGIM_BASE_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + PIO_LDGIM_BASE_ADDRESS
#define PIO_IMASK0_BASE_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + PIO_IMASK0_BASE_ADDRESS
#define PIO_IMASK1_BASE_ADDRESS_RANGE NEPTUNE_BASE_ADDRESS + PIO_IMASK1_BASE_ADDRESS
#define FUNC0_MNT NEPTUNE_BASE_ADDRESS + 40'h000_0000
#define FUNC0_VIR NEPTUNE_BASE_ADDRESS + 40'h100_0000
#define FUNC1_MNT NEPTUNE_BASE_ADDRESS + 40'h200_0000
#define FUNC1_VIR NEPTUNE_BASE_ADDRESS + 40'h300_0000
#define FUNC2_MNT NEPTUNE_BASE_ADDRESS + 40'h400_0000
#define FUNC2_VIR NEPTUNE_BASE_ADDRESS + 40'h500_0000
#define FUNC3_MNT NEPTUNE_BASE_ADDRESS + 40'h600_0000
#define FUNC3_VIR NEPTUNE_BASE_ADDRESS + 40'h700_0000
#define PORT_RANGE_MASK 32'h0000_F000
#define PORT_OFFSET 32'h0000_1000
#define PORT_0_RANGE 32'h0000_0000
#define XPCS_0_RANGE (32'h0000_1000 << 1)
#define PCS_0_RANGE (32'h0000_2000 << 1)
#define PORT_1_RANGE (32'h0000_3000 << 1)
#define XPCS_1_RANGE (32'h0000_4000 << 1)
#define PCS_1_RANGE (32'h0000_5000 << 1)
#define PORT_2_RANGE (32'h0000_6000 << 1)
#define PCS_2_RANGE (32'h0000_7000 << 1)
#define PORT_3_RANGE (32'h0000_8000 << 1)
#define PCS_3_RANGE (32'h0000_9000 << 1)
#define ESER_RANGE (32'h0000_a000 << 1)
#define MIF_RANGE (32'h0000_b000 << 1)
#define IPP_0_RANGE 32'h0000_0000
#define IPP_2_RANGE 32'h0000_4000
#define IPP_1_RANGE 32'h0000_8000
#define IPP_3_RANGE 32'h0000_c000
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