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// OpenSPARC T2 Processor File: rptr_empty.v
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module rptr_empty (rempty,raddr,rptr,rwptr2,rinc,rclk,rrst_n);
output [ADDRSIZE-1:0] raddr;
output [ADDRSIZE:0] rptr;
input [ADDRSIZE:0] rwptr2;
reg [ADDRSIZE:0] rptr,rbin,rgnext,rbnext;
always @(posedge rclk or negedge rrst_n)
raddrmsb <= rgnext[ADDRSIZE]^rgnext[ADDRSIZE-1];
always @(rptr or rinc or rempty ) begin: Gray_inc
for (i=0; i <= ADDRSIZE; i=i+1)
if (!rempty ) rbnext = rbin + rinc;
rgnext = (rbnext >> 1) ^ rbnext;
// memory read address pointer
assign raddr = { raddrmsb,rptr[ADDRSIZE-2:0]};
// fifo empty on reset or when next rptr == synced wptr
always @(posedge rclk or negedge rrst_n)
if (!rrst_n ) rempty <= 1'b1;
else rempty <= (rgnext == rwptr2);