// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: mcu_lndskw_dp.v
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
// For the avoidance of doubt, and except that if any non-GPL license
// choice is available it will apply instead, Sun elects to use only
// the General Public License version 2 (GPLv2) at this time for any
// software where a choice of GPL license versions is made
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// ========== Copyright Header End ============================================
wire [167:0] mux_fbd_data;
wire algnbf0_wmr_scanout;
wire algnbf1_wmr_scanout;
wire algnbf2_wmr_scanout;
wire algnbf3_wmr_scanout;
wire algnbf4_wmr_scanout;
wire algnbf5_wmr_scanout;
wire algnbf6_wmr_scanout;
wire algnbf7_wmr_scanout;
wire algnbf8_wmr_scanout;
wire algnbf9_wmr_scanout;
wire algnbf10_wmr_scanin;
wire algnbf10_wmr_scanout;
wire algnbf11_wmr_scanin;
wire algnbf11_wmr_scanout;
wire [1:0] lndskw_status_parity_unused;
wire [1:0] lndskw_alert_asserted_unused;
wire [1:0] lndskw_nbde_unused;
wire [3:0] lndskw_thermal_trip_unused;
wire algnbf12_wmr_scanin;
wire algnbf12_wmr_scanout;
wire algnbf13_wmr_scanin;
wire algnbf13_wmr_scanout;
output [167:0] lndskw_data;
output [13:0] lndskw_ts0_hdr_match;
output [11:0] lndskw_status_parity;
output [13:0] lndskw_idle_match;
output [13:0] lndskw_alert_match;
output [11:0] lndskw_alert_asserted;
output [11:0] lndskw_nbde;
output [23:0] lndskw_thermal_trip;
input [13:0] fbdic_inc_rptr;
input [12:0] fbdic_failover_mask;
input [12:0] fbdic_failover_mask_l;
input [11:0] fdout_idle_lfsr;
input fdout_idle_lfsr_l_0;
input [1:0] fdout_idle_lfsr_0;
mcu_lndskw_dp_mux_macro__buffsel_none__mux_aonpe__ports_2__width_12 m_mux_failover_11_0 (
.sel0(fbdic_failover_mask_l[0]),
.sel1(fbdic_failover_mask[0]),
.dout(mux_fbd_data[11:0]));
mcu_lndskw_dp_mux_macro__buffsel_none__mux_aonpe__ports_2__width_12 m_mux_failover_23_12 (
.sel0(fbdic_failover_mask_l[1]),
.sel1(fbdic_failover_mask[1]),
.dout(mux_fbd_data[23:12]));
mcu_lndskw_dp_mux_macro__buffsel_none__mux_aonpe__ports_2__width_12 m_mux_failover_35_24 (
.sel0(fbdic_failover_mask_l[2]),
.sel1(fbdic_failover_mask[2]),
.dout(mux_fbd_data[35:24]));
mcu_lndskw_dp_mux_macro__buffsel_none__mux_aonpe__ports_2__width_12 m_mux_failover_47_36 (
.sel0(fbdic_failover_mask_l[3]),
.sel1(fbdic_failover_mask[3]),
.dout(mux_fbd_data[47:36]));
mcu_lndskw_dp_mux_macro__buffsel_none__mux_aonpe__ports_2__width_12 m_mux_failover_59_48 (
.sel0(fbdic_failover_mask_l[4]),
.sel1(fbdic_failover_mask[4]),
.dout(mux_fbd_data[59:48]));
mcu_lndskw_dp_mux_macro__buffsel_none__mux_aonpe__ports_2__width_12 m_mux_failover_71_60 (
.sel0(fbdic_failover_mask_l[5]),
.sel1(fbdic_failover_mask[5]),
.dout(mux_fbd_data[71:60]));
mcu_lndskw_dp_mux_macro__buffsel_none__mux_aonpe__ports_2__width_12 m_mux_failover_83_72 (
.sel0(fbdic_failover_mask_l[6]),
.sel1(fbdic_failover_mask[6]),
.dout(mux_fbd_data[83:72]));
mcu_lndskw_dp_mux_macro__buffsel_none__mux_aonpe__ports_2__width_12 m_mux_failover_95_84 (
.sel0(fbdic_failover_mask_l[7]),
.sel1(fbdic_failover_mask[7]),
.dout(mux_fbd_data[95:84]));
mcu_lndskw_dp_mux_macro__buffsel_none__mux_aonpe__ports_2__width_12 m_mux_failover_107_96 (
.din1(fbd_data[119:108]),
.sel0(fbdic_failover_mask_l[8]),
.sel1(fbdic_failover_mask[8]),
.dout(mux_fbd_data[107:96]));
mcu_lndskw_dp_mux_macro__buffsel_none__mux_aonpe__ports_2__width_12 m_mux_failover_119_108 (
.din0(fbd_data[119:108]),
.din1(fbd_data[131:120]),
.sel0(fbdic_failover_mask_l[9]),
.sel1(fbdic_failover_mask[9]),
.dout(mux_fbd_data[119:108]));
mcu_lndskw_dp_mux_macro__buffsel_none__mux_aonpe__ports_2__width_12 m_mux_failover_131_120 (
.din0(fbd_data[131:120]),
.din1(fbd_data[143:132]),
.sel0(fbdic_failover_mask_l[10]),
.sel1(fbdic_failover_mask[10]),
.dout(mux_fbd_data[131:120]));
mcu_lndskw_dp_mux_macro__buffsel_none__mux_aonpe__ports_2__width_12 m_mux_failover_143_132 (
.din0(fbd_data[143:132]),
.din1(fbd_data[155:144]),
.sel0(fbdic_failover_mask_l[11]),
.sel1(fbdic_failover_mask[11]),
.dout(mux_fbd_data[143:132]));
mcu_lndskw_dp_mux_macro__buffsel_none__mux_aonpe__ports_2__width_12 m_mux_failover_155_144 (
.din0(fbd_data[155:144]),
.din1(fbd_data[167:156]),
.sel0(fbdic_failover_mask_l[12]),
.sel1(fbdic_failover_mask[12]),
.dout(mux_fbd_data[155:144]));
assign mux_fbd_data[167:156] = fbd_data[167:156];
mcu_algnbf_dp algnbf0 ( // FS:wmr_protect
.din(mux_fbd_data[11:0]),
.dout(lndskw_data[11:0]),
.ts0_hdr_match(lndskw_ts0_hdr_match[0]),
.status_parity(lndskw_status_parity[0]),
.idle_match(lndskw_idle_match[0]),
.alert_match(lndskw_alert_match[0]),
.alert_asserted(lndskw_alert_asserted[0]),
.thermal_trip(lndskw_thermal_trip[1:0]),
.inc_rptr(fbdic_inc_rptr[0]),
.inc_wptr(fbdic_inc_wptr),
.clr_ptrs(fbdic_clr_ptrs),
.lfsr_bit({2{fdout_idle_lfsr_0[0]}}),
.wmr_scan_in(algnbf0_wmr_scanin),
.wmr_scan_out(algnbf0_wmr_scanout),
.scan_in(algnbf0_scanin),
.scan_out(algnbf0_scanout),
.tcu_scan_en(tcu_scan_en),
mcu_algnbf_dp algnbf1 ( // FS:wmr_protect
.din(mux_fbd_data[23:12]),
.dout(lndskw_data[23:12]),
.ts0_hdr_match(lndskw_ts0_hdr_match[1]),
.status_parity(lndskw_status_parity[1]),
.idle_match(lndskw_idle_match[1]),
.alert_match(lndskw_alert_match[1]),
.alert_asserted(lndskw_alert_asserted[1]),
.thermal_trip(lndskw_thermal_trip[3:2]),
.inc_rptr(fbdic_inc_rptr[1]),
.inc_wptr(fbdic_inc_wptr),
.clr_ptrs(fbdic_clr_ptrs),
.lfsr_bit({2{fdout_idle_lfsr[1]}}),
.wmr_scan_in(algnbf1_wmr_scanin),
.wmr_scan_out(algnbf1_wmr_scanout),
.scan_in(algnbf1_scanin),
.scan_out(algnbf1_scanout),
.tcu_scan_en(tcu_scan_en),
mcu_algnbf_dp algnbf2 ( // FS:wmr_protect
.din(mux_fbd_data[35:24]),
.dout(lndskw_data[35:24]),
.ts0_hdr_match(lndskw_ts0_hdr_match[2]),
.status_parity(lndskw_status_parity[2]),
.idle_match(lndskw_idle_match[2]),
.alert_match(lndskw_alert_match[2]),
.alert_asserted(lndskw_alert_asserted[2]),
.thermal_trip(lndskw_thermal_trip[5:4]),
.inc_rptr(fbdic_inc_rptr[2]),
.inc_wptr(fbdic_inc_wptr),
.clr_ptrs(fbdic_clr_ptrs),
.lfsr_bit({2{fdout_idle_lfsr[2]}}),
.wmr_scan_in(algnbf2_wmr_scanin),
.wmr_scan_out(algnbf2_wmr_scanout),
.scan_in(algnbf2_scanin),
.scan_out(algnbf2_scanout),
.tcu_scan_en(tcu_scan_en),
mcu_algnbf_dp algnbf3 ( // FS:wmr_protect
.din(mux_fbd_data[47:36]),
.dout(lndskw_data[47:36]),
.ts0_hdr_match(lndskw_ts0_hdr_match[3]),
.status_parity(lndskw_status_parity[3]),
.idle_match(lndskw_idle_match[3]),
.alert_match(lndskw_alert_match[3]),
.alert_asserted(lndskw_alert_asserted[3]),
.thermal_trip(lndskw_thermal_trip[7:6]),
.inc_rptr(fbdic_inc_rptr[3]),
.inc_wptr(fbdic_inc_wptr),
.clr_ptrs(fbdic_clr_ptrs),
.lfsr_bit({2{fdout_idle_lfsr[3]}}),
.wmr_scan_in(algnbf3_wmr_scanin),
.wmr_scan_out(algnbf3_wmr_scanout),
.scan_in(algnbf3_scanin),
.scan_out(algnbf3_scanout),
.tcu_scan_en(tcu_scan_en),
mcu_algnbf_dp algnbf4 ( // FS:wmr_protect
.din(mux_fbd_data[59:48]),
.dout(lndskw_data[59:48]),
.ts0_hdr_match(lndskw_ts0_hdr_match[4]),
.status_parity(lndskw_status_parity[4]),
.idle_match(lndskw_idle_match[4]),
.alert_match(lndskw_alert_match[4]),
.alert_asserted(lndskw_alert_asserted[4]),
.thermal_trip(lndskw_thermal_trip[9:8]),
.inc_rptr(fbdic_inc_rptr[4]),
.inc_wptr(fbdic_inc_wptr),
.clr_ptrs(fbdic_clr_ptrs),
.lfsr_bit({2{fdout_idle_lfsr[4]}}),
.wmr_scan_in(algnbf4_wmr_scanin),
.wmr_scan_out(algnbf4_wmr_scanout),
.scan_in(algnbf4_scanin),
.scan_out(algnbf4_scanout),
.tcu_scan_en(tcu_scan_en),
mcu_algnbf_dp algnbf5 ( // FS:wmr_protect
.din(mux_fbd_data[71:60]),
.dout(lndskw_data[71:60]),
.ts0_hdr_match(lndskw_ts0_hdr_match[5]),
.status_parity(lndskw_status_parity[5]),
.idle_match(lndskw_idle_match[5]),
.alert_match(lndskw_alert_match[5]),
.alert_asserted(lndskw_alert_asserted[5]),
.thermal_trip(lndskw_thermal_trip[11:10]),
.inc_rptr(fbdic_inc_rptr[5]),
.inc_wptr(fbdic_inc_wptr),
.clr_ptrs(fbdic_clr_ptrs),
.lfsr_bit({2{fdout_idle_lfsr[5]}}),
.wmr_scan_in(algnbf5_wmr_scanin),
.wmr_scan_out(algnbf5_wmr_scanout),
.scan_in(algnbf5_scanin),
.scan_out(algnbf5_scanout),
.tcu_scan_en(tcu_scan_en),
mcu_algnbf_dp algnbf6 ( // FS:wmr_protect
.din(mux_fbd_data[83:72]),
.dout(lndskw_data[83:72]),
.ts0_hdr_match(lndskw_ts0_hdr_match[6]),
.status_parity(lndskw_status_parity[6]),
.idle_match(lndskw_idle_match[6]),
.alert_match(lndskw_alert_match[6]),
.alert_asserted(lndskw_alert_asserted[6]),
.thermal_trip(lndskw_thermal_trip[13:12]),
.inc_rptr(fbdic_inc_rptr[6]),
.inc_wptr(fbdic_inc_wptr),
.clr_ptrs(fbdic_clr_ptrs),
.lfsr_bit({2{fdout_idle_lfsr[6]}}),
.wmr_scan_in(algnbf6_wmr_scanin),
.wmr_scan_out(algnbf6_wmr_scanout),
.scan_in(algnbf6_scanin),
.scan_out(algnbf6_scanout),
.tcu_scan_en(tcu_scan_en),
mcu_algnbf_dp algnbf7 ( // FS:wmr_protect
.din(mux_fbd_data[95:84]),
.dout(lndskw_data[95:84]),
.ts0_hdr_match(lndskw_ts0_hdr_match[7]),
.status_parity(lndskw_status_parity[7]),
.idle_match(lndskw_idle_match[7]),
.alert_match(lndskw_alert_match[7]),
.alert_asserted(lndskw_alert_asserted[7]),
.thermal_trip(lndskw_thermal_trip[15:14]),
.inc_rptr(fbdic_inc_rptr[7]),
.inc_wptr(fbdic_inc_wptr),
.clr_ptrs(fbdic_clr_ptrs),
.lfsr_bit({2{fdout_idle_lfsr[7]}}),
.wmr_scan_in(algnbf7_wmr_scanin),
.wmr_scan_out(algnbf7_wmr_scanout),
.scan_in(algnbf7_scanin),
.scan_out(algnbf7_scanout),
.tcu_scan_en(tcu_scan_en),
mcu_algnbf_dp algnbf8 ( // FS:wmr_protect
.din(mux_fbd_data[107:96]),
.dout(lndskw_data[107:96]),
.ts0_hdr_match(lndskw_ts0_hdr_match[8]),
.status_parity(lndskw_status_parity[8]),
.idle_match(lndskw_idle_match[8]),
.alert_match(lndskw_alert_match[8]),
.alert_asserted(lndskw_alert_asserted[8]),
.thermal_trip(lndskw_thermal_trip[17:16]),
.inc_rptr(fbdic_inc_rptr[8]),
.inc_wptr(fbdic_inc_wptr),
.clr_ptrs(fbdic_clr_ptrs),
.lfsr_bit({2{fdout_idle_lfsr[8]}}),
.wmr_scan_in(algnbf8_wmr_scanin),
.wmr_scan_out(algnbf8_wmr_scanout),
.scan_in(algnbf8_scanin),
.scan_out(algnbf8_scanout),
.tcu_scan_en(tcu_scan_en),
mcu_algnbf_dp algnbf9 ( // FS:wmr_protect
.din(mux_fbd_data[119:108]),
.dout(lndskw_data[119:108]),
.ts0_hdr_match(lndskw_ts0_hdr_match[9]),
.status_parity(lndskw_status_parity[9]),
.idle_match(lndskw_idle_match[9]),
.alert_match(lndskw_alert_match[9]),
.alert_asserted(lndskw_alert_asserted[9]),
.thermal_trip(lndskw_thermal_trip[19:18]),
.inc_rptr(fbdic_inc_rptr[9]),
.inc_wptr(fbdic_inc_wptr),
.clr_ptrs(fbdic_clr_ptrs),
.lfsr_bit({2{fdout_idle_lfsr[9]}}),
.wmr_scan_in(algnbf9_wmr_scanin),
.wmr_scan_out(algnbf9_wmr_scanout),
.scan_in(algnbf9_scanin),
.scan_out(algnbf9_scanout),
.tcu_scan_en(tcu_scan_en),
mcu_algnbf_dp algnbf10 ( // FS:wmr_protect
.din(mux_fbd_data[131:120]),
.dout(lndskw_data[131:120]),
.ts0_hdr_match(lndskw_ts0_hdr_match[10]),
.status_parity(lndskw_status_parity[10]),
.idle_match(lndskw_idle_match[10]),
.alert_match(lndskw_alert_match[10]),
.alert_asserted(lndskw_alert_asserted[10]),
.thermal_trip(lndskw_thermal_trip[21:20]),
.inc_rptr(fbdic_inc_rptr[10]),
.inc_wptr(fbdic_inc_wptr),
.clr_ptrs(fbdic_clr_ptrs),
.lfsr_bit({2{fdout_idle_lfsr[10]}}),
.wmr_scan_in(algnbf10_wmr_scanin),
.wmr_scan_out(algnbf10_wmr_scanout),
.scan_in(algnbf10_scanin),
.scan_out(algnbf10_scanout),
.tcu_scan_en(tcu_scan_en),
mcu_algnbf_dp algnbf11 ( // FS:wmr_protect
.din(mux_fbd_data[143:132]),
.dout(lndskw_data[143:132]),
.ts0_hdr_match(lndskw_ts0_hdr_match[11]),
.status_parity(lndskw_status_parity[11]),
.idle_match(lndskw_idle_match[11]),
.alert_match(lndskw_alert_match[11]),
.alert_asserted(lndskw_alert_asserted[11]),
.thermal_trip(lndskw_thermal_trip[23:22]),
.inc_rptr(fbdic_inc_rptr[11]),
.inc_wptr(fbdic_inc_wptr),
.clr_ptrs(fbdic_clr_ptrs),
.lfsr_bit({2{fdout_idle_lfsr[11]}}),
.wmr_scan_in(algnbf11_wmr_scanin),
.wmr_scan_out(algnbf11_wmr_scanout),
.scan_in(algnbf11_scanin),
.scan_out(algnbf11_scanout),
.tcu_scan_en(tcu_scan_en),
mcu_algnbf_dp algnbf12 ( // FS:wmr_protect
.din(mux_fbd_data[155:144]),
.dout(lndskw_data[155:144]),
.ts0_hdr_match(lndskw_ts0_hdr_match[12]),
.status_parity(lndskw_status_parity_unused[0]),
.idle_match(lndskw_idle_match[12]),
.alert_match(lndskw_alert_match[12]),
.alert_asserted(lndskw_alert_asserted_unused[0]),
.nbde(lndskw_nbde_unused[0]),
.thermal_trip(lndskw_thermal_trip_unused[1:0]),
.inc_rptr(fbdic_inc_rptr[12]),
.inc_wptr(fbdic_inc_wptr),
.clr_ptrs(fbdic_clr_ptrs),
.lfsr_bit({fdout_idle_lfsr_l_0,fdout_idle_lfsr[0]}),
.wmr_scan_in(algnbf12_wmr_scanin),
.wmr_scan_out(algnbf12_wmr_scanout),
.scan_in(algnbf12_scanin),
.scan_out(algnbf12_scanout),
.tcu_scan_en(tcu_scan_en),
mcu_algnbf_dp algnbf13 ( // FS:wmr_protect
.din(mux_fbd_data[167:156]),
.dout(lndskw_data[167:156]),
.ts0_hdr_match(lndskw_ts0_hdr_match[13]),
.status_parity(lndskw_status_parity_unused[1]),
.idle_match(lndskw_idle_match[13]),
.alert_match(lndskw_alert_match[13]),
.alert_asserted(lndskw_alert_asserted_unused[1]),
.nbde(lndskw_nbde_unused[1]),
.thermal_trip(lndskw_thermal_trip_unused[3:2]),
.inc_rptr(fbdic_inc_rptr[13]),
.inc_wptr(fbdic_inc_wptr),
.clr_ptrs(fbdic_clr_ptrs),
.lfsr_bit({2{fdout_idle_lfsr_0[1]}}),
.wmr_scan_in(algnbf13_wmr_scanin),
.wmr_scan_out(algnbf13_wmr_scanout),
.scan_in(algnbf13_scanin),
.scan_out(algnbf13_scanout),
.tcu_scan_en(tcu_scan_en),
assign algnbf0_scanin = scan_in ;
assign algnbf1_scanin = algnbf0_scanout ;
assign algnbf2_scanin = algnbf1_scanout ;
assign algnbf3_scanin = algnbf2_scanout ;
assign algnbf4_scanin = algnbf3_scanout ;
assign algnbf5_scanin = algnbf4_scanout ;
assign algnbf6_scanin = algnbf5_scanout ;
assign algnbf7_scanin = algnbf6_scanout ;
assign algnbf8_scanin = algnbf7_scanout ;
assign algnbf9_scanin = algnbf8_scanout ;
assign algnbf10_scanin = algnbf9_scanout ;
assign algnbf11_scanin = algnbf10_scanout ;
assign algnbf12_scanin = algnbf11_scanout ;
assign algnbf13_scanin = algnbf12_scanout ;
assign scan_out = algnbf13_scanout ;
assign algnbf0_wmr_scanin = wmr_scan_in ;
assign algnbf1_wmr_scanin = algnbf0_wmr_scanout ;
assign algnbf2_wmr_scanin = algnbf1_wmr_scanout ;
assign algnbf3_wmr_scanin = algnbf2_wmr_scanout ;
assign algnbf4_wmr_scanin = algnbf3_wmr_scanout ;
assign algnbf5_wmr_scanin = algnbf4_wmr_scanout ;
assign algnbf6_wmr_scanin = algnbf5_wmr_scanout ;
assign algnbf7_wmr_scanin = algnbf6_wmr_scanout ;
assign algnbf8_wmr_scanin = algnbf7_wmr_scanout ;
assign algnbf9_wmr_scanin = algnbf8_wmr_scanout ;
assign algnbf10_wmr_scanin = algnbf9_wmr_scanout ;
assign algnbf11_wmr_scanin = algnbf10_wmr_scanout ;
assign algnbf12_wmr_scanin = algnbf11_wmr_scanout ;
assign algnbf13_wmr_scanin = algnbf12_wmr_scanout ;
assign wmr_scan_out = algnbf13_wmr_scanout ;
// general mux macro for pass-gate and and-or muxes with/wout priority encoders
// also for pass-gate with decoder
// any PARAMS parms go into naming of macro
module mcu_lndskw_dp_mux_macro__buffsel_none__mux_aonpe__ports_2__width_12 (
// comparator macro (output is 1 if both inputs are equal; 0 otherwise)
module mcu_lndskw_dp_cmp_macro__width_12 (
// xor macro for ports = 2,3
module mcu_lndskw_dp_xor_macro__ports_3 (
module mcu_lndskw_dp_inv_macro__width_2 (
// and macro for ports = 2,3,4
module mcu_lndskw_dp_and_macro__width_1 (
// and macro for ports = 2,3,4
module mcu_lndskw_dp_and_macro__width_2 (
// or macro for ports = 2,3
module mcu_lndskw_dp_or_macro__width_2 (
module mcu_lndskw_dp_increment_macro__width_4 (
module mcu_lndskw_dp_inv_macro__width_3 (
// and macro for ports = 2,3,4
module mcu_lndskw_dp_and_macro__ports_2__width_3 (
// or macro for ports = 2,3
module mcu_lndskw_dp_or_macro__ports_2__width_1 (
// nor macro for ports = 2,3
module mcu_lndskw_dp_nor_macro__ports_3 (
// general mux macro for pass-gate and and-or muxes with/wout priority encoders
// also for pass-gate with decoder
// any PARAMS parms go into naming of macro
module mcu_lndskw_dp_mux_macro__mux_aonpe__ports_6__stack_12r__width_12 (
cl_dp1_muxbuff6_8x c0_0 (
// and macro for ports = 2,3,4
module mcu_lndskw_dp_and_macro__ports_2__width_12 (
// any PARAMS parms go into naming of macro
module mcu_lndskw_dp_msff_macro__stack_12r__width_12 (
.so({so[10:0],scan_out}),
// any PARAMS parms go into naming of macro
module mcu_lndskw_dp_msff_macro__stack_12r__width_6 (