verif/diag/assembly/peu/NcuRegRw.s

/*
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*
* OpenSPARC T2 Processor File: NcuRegRw.s
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#define MAIN_PAGE_HV_ALSO

#include "hboot.s"
#include "peu_defines.h"

#define ALL_FS                                  0xffffffffffffffff
#define IOMMU_INVALIDATE_REG_ADDR               0x0000008000002030

/************************************************************************
   Test case code start
 ************************************************************************/
.text
.global main
main:
        ta T_CHANGE_HPRIV
        nop

        setx    ALL_FS, %g1, %g5

        setx    MEM32_OFFSET_BASE_REG_ADDR, %g1, %g2            ! 0x8000002000
        setx    MEM32_OFFSET_BASE_REG_DATA, %g1, %g3
        ldx     [%g2], %g4                                      ! read POR value

        stx     %g5, [%g2]                                      ! store all Fs
        ldx     [%g2], %g4                                      ! read back

        stx     %g3, [%g2]                                      ! store default value
        ldx     [%g2], %g4                                      ! read back

        setx    MEM32_OFFSET_MASK_REG_ADDR, %g1, %g2            ! 0x8000002008
        setx    MEM32_OFFSET_MASK_REG_DATA, %g1, %g3
        ldx     [%g2], %g4                                      ! read POR value

        stx     %g5, [%g2]                                      ! store all Fs
        ldx     [%g2], %g4                                      ! read back

        stx     %g3, [%g2]                                      ! store default value
        ldx     [%g2], %g4                                      ! read back

        setx    MEM64_OFFSET_BASE_REG_ADDR, %g1, %g2            ! 0x8000002010
        setx    MEM64_OFFSET_BASE_REG_DATA, %g1, %g3
        ldx     [%g2], %g4                                      ! read POR value

        stx     %g5, [%g2]                                      ! store all Fs
        ldx     [%g2], %g4                                      ! read back

        stx     %g3, [%g2]                                      ! store default value
        ldx     [%g2], %g4                                      ! read back

        setx    MEM64_OFFSET_MASK_REG_ADDR, %g1, %g2            ! 0x8000002018
        setx    MEM64_OFFSET_MASK_REG_DATA, %g1, %g3
        ldx     [%g2], %g4                                      ! read POR value

        stx     %g5, [%g2]                                      ! store all Fs
        ldx     [%g2], %g4                                      ! read back

        stx     %g3, [%g2]                                      ! store default value
        ldx     [%g2], %g4                                      ! read back

        setx    IOCFG_OFFSET_BASE_REG_ADDR, %g1, %g2            ! 0x8000002020
        setx    IOCFG_OFFSET_BASE_REG_DATA, %g1, %g3
        ldx     [%g2], %g4                                      ! read POR value

        stx     %g5, [%g2]                                      ! store all Fs
        ldx     [%g2], %g4                                      ! read back

        stx     %g3, [%g2]                                      ! store default value
        ldx     [%g2], %g4                                      ! read back

        setx    IOCFG_OFFSET_MASK_REG_ADDR, %g1, %g2            ! 0x8000002028
        setx    IOCFG_OFFSET_MASK_REG_DATA, %g1, %g3
        ldx     [%g2], %g4                                      ! read POR value

        stx     %g5, [%g2]                                      ! store all Fs
        ldx     [%g2], %g4                                      ! read back

        stx     %g3, [%g2]                                      ! store default value
        ldx     [%g2], %g4                                      ! read back

! not used in PCIe link training, but as long as we're here ...

        setx    IOMMU_INVALIDATE_REG_ADDR, %g1, %g2             ! 0x8000002030
        setx    0xa0a0a0a0a0a0a0a0, %g1, %g3
        ldx     [%g2], %g4                                      ! read POR value

        stx     %g5, [%g2]                                      ! store all Fs
        ldx     [%g2], %g4                                      ! read back

        stx     %g3, [%g2]                                      ! store a0a0...
        ldx     [%g2], %g4                                      ! read back

        nop
        nop

test_passed:
        EXIT_GOOD

test_failed:
        EXIT_BAD