legion/src/procs/sunsparc/libniagara2/include/niagara2_err_trap.h

/*
* ========== Copyright Header Begin ==========================================
*
* OpenSPARC T2 Processor File: niagara2_err_trap.h
* Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
*
* The above named program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
* License version 2 as published by the Free Software Foundation.
*
* The above named program is distributed in the hope that it will be
* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this work; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
*
* ========== Copyright Header End ============================================
*/
/*
 * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
 * Use is subject to license terms.
 */

#pragma ident   "@(#)niagara2_err_trap.h        1.9     07/02/20 SMI"

#ifndef _NIAGARA2_ERR_TRAP_H_
#define _NIAGARA2_ERR_TRAP_H_

#ifdef  __cplusplus
extern "C" {
#endif

#ifdef NIAGARA2 /* { */

#if ERROR_TRAP_GEN      /* { */

#include "ss_err_trap.h"
#include "basics.h"

/*
 * Per chip Error Trap state register.
 * This struct will hold all the CPU
 * specific state information related
 * to the various ESRs and EERs.
 */
typedef struct {
        uint64_t        desr[64];               /* One per strand */
        uint64_t        clesr[8];               /* One per core */
        uint64_t        c_erer[8];              /* One per core */
        uint64_t        s_eter[64];             /* One per strand */
        uint64_t        dfesr[64];              /* One per strand */
} cpu_error_state_t;

/*
 * Per-strand struct of pointers which
 * provides short-cut access to the
 * error registers defined in
 * cpu_error_state_t
 *
 * Make sure all these pointers are properly
 * initialized in ss_error_trap_init()
 */
typedef struct {
        uint64_t        *desr_ptr;
        uint64_t        *clesr_ptr;
        uint64_t        *c_erer_ptr;
        uint64_t        *s_eter_ptr;
        uint64_t        *dfesr_ptr;
} cpu_error_reg_t;


#define         CERER_MASK      ( MASK64(63,61) | MASK64(59,58) | MASK64(55,52) | MASK64(50,50) \
                                | MASK64(48,46) | MASK64(40,36) | MASK64(33,27) | MASK64(23,23) \
                                | MASK64(21,0) )

#define         CE_MASK         ( MASK64(53,53) | MASK64(51,51) | MASK64(49,49) | MASK64(47,47) \
                                | MASK64(45,45) | MASK64(42,42) | MASK64(40,40) | MASK64(38,38) \
                                | MASK64(36,36) | MASK64(34,34) )

#define         UE_MASK         ( MASK64(52,52) | MASK64(50,50) | MASK64(48,48) | MASK64(46,46) \
                                | MASK64(44,44) | MASK64(43,43) | MASK64(41,41) | MASK64(39,39) \
                                | MASK64(37,37) )

#define         DESR_MASK       ( MASK64(60,56) | MASK64(10,0) )

#define         DFESR_MASK      MASK64(61,55)

/* This trap never gets taken. The error info is forwarded to the core
 * with the err_inject_name given in the error entry in the table
 */
#define         SS_CE_trap_forward_2_core       NULL

#define         SS_UE_trap_forward_2_core       NULL


#endif          /* } ERROR_TRAP_GEN */

extern bool_t n2_sp_interrupt(simcpu_t *sp, uint64_t intr_level, char* error_name);

#endif          /* } NIAGARA2*/

#ifdef  __cplusplus
}
#endif

#endif  /* _NIAGARA2_ERR_TRAP_H_ */