projects / xeon-phi-kernel-module / blame
| Commit | Line | Data |
|---|---|---|
| 800f879a AT |
1 | /* |
| 2 | * Copyright 2010-2017 Intel Corporation. | |
| 3 | * | |
| 4 | * This program is free software; you can redistribute it and/or modify | |
| 5 | * it under the terms of the GNU General Public License, version 2, | |
| 6 | * as published by the Free Software Foundation. | |
| 7 | * | |
| 8 | * This program is distributed in the hope that it will be useful, | |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 11 | * General Public License for more details. | |
| 12 | * | |
| 13 | * Disclaimer: The codes contained in these modules may be specific to | |
| 14 | * the Intel Software Development Platform codenamed Knights Ferry, | |
| 15 | * and the Intel product codenamed Knights Corner, and are not backward | |
| 16 | * compatible with other Intel products. Additionally, Intel will NOT | |
| 17 | * support the codes or instruction set in future products. | |
| 18 | * | |
| 19 | * Intel offers no warranty of any kind regarding the code. This code is | |
| 20 | * licensed on an "AS IS" basis and Intel is not obligated to provide | |
| 21 | * any support, assistance, installation, training, or other services | |
| 22 | * of any kind. Intel is also not obligated to provide any updates, | |
| 23 | * enhancements or extensions. Intel specifically disclaims any warranty | |
| 24 | * of merchantability, non-infringement, fitness for any particular | |
| 25 | * purpose, and any other warranty. | |
| 26 | * | |
| 27 | * Further, Intel disclaims all liability of any kind, including but | |
| 28 | * not limited to liability for infringement of any proprietary rights, | |
| 29 | * relating to the use of the code, even if Intel is notified of the | |
| 30 | * possibility of such liability. Except as expressly stated in an Intel | |
| 31 | * license agreement provided with this code and agreed upon with Intel, | |
| 32 | * no license, express or implied, by estoppel or otherwise, to any | |
| 33 | * intellectual property rights is granted herein. | |
| 34 | */ | |
| 35 | ||
| 36 | #ifndef MICSCIF_INTR_H | |
| 37 | #define MICSCIF_INTR_H | |
| 38 | #define SBOX_SDBIC0_DBSTAT_BIT 0x40000000 | |
| 39 | #define SBOX_SDBIC0_DBREQ_BIT 0x80000000 | |
| 40 | ||
| 41 | /* RDMASR Info */ | |
| 42 | #define RDMASR_IRQ_BASE 17 | |
| 43 | #define get_rdmasr_irq(m) ((RDMASR_IRQ_BASE) + (m)) | |
| 44 | #define get_rdmasr_offset(m) (((m) << 2) + (SBOX_RDMASR0)) | |
| 45 | ||
| 46 | #ifdef _MIC_SCIF_ | |
| 47 | int register_scif_intr_handler(struct micscif_dev *dev); | |
| 48 | void deregister_scif_intr_handler(struct micscif_dev *dev); | |
| 49 | #endif | |
| 50 | int micscif_setup_interrupts(struct micscif_dev *dev); | |
| 51 | void micscif_destroy_interrupts(struct micscif_dev *scifdev); | |
| 52 | #endif /* MICSCIF_INTR_H */ |