[xeon-phi-kernel-module] / include / mic / micscif_rma_list.h

/*
 * Copyright 2010-2017 Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2,
 * as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
 * General Public License for more details.
 *
 * Disclaimer: The codes contained in these modules may be specific to
 * the Intel Software Development Platform codenamed Knights Ferry,
 * and the Intel product codenamed Knights Corner, and are not backward
 * compatible with other Intel products. Additionally, Intel will NOT
 * support the codes or instruction set in future products.
 *
 * Intel offers no warranty of any kind regarding the code. This code is
 * licensed on an "AS IS" basis and Intel is not obligated to provide
 * any support, assistance, installation, training, or other services
 * of any kind. Intel is also not obligated to provide any updates,
 * enhancements or extensions. Intel specifically disclaims any warranty
 * of merchantability, non-infringement, fitness for any particular
 * purpose, and any other warranty.
 *
 * Further, Intel disclaims all liability of any kind, including but
 * not limited to liability for infringement of any proprietary rights,
 * relating to the use of the code, even if Intel is notified of the
 * possibility of such liability. Except as expressly stated in an Intel
 * license agreement provided with this code and agreed upon with Intel,
 * no license, express or implied, by estoppel or otherwise, to any
 * intellectual property rights is granted herein.
 */

#ifndef MICSCIF_RMA_LIST_H
#define MICSCIF_RMA_LIST_H

/*
 * RMA Linked List Manipulation API's.
 * Callee must Hold RMA lock to call the API's below.
 * When and if RMA uses RB trees for log(n) search,
 * similar API's should be implemented.
 */

/*
 * Specifies whether an RMA operation can span
 * across partial windows, a single window or multiple
 * contiguous windows.
 * Mmaps can span across parial windows.
 * Unregistration can span across complete windows.
 * scif_get_pages() can span a single window.
 */
enum range_request {
	WINDOW_PARTIAL,
	WINDOW_SINGLE,
	WINDOW_FULL
};

/* Self Registration list RMA Request query */
struct micscif_rma_req {
	struct reg_range_t **out_window;
	uint64_t offset;
	size_t nr_bytes;
	int prot;
	enum range_request type;
	struct list_head *head;
	void *va_for_temp;
};

/**
 * struct mic_copy_work:
 *
 * Work for DMA copy thread is provided by alloocating and preparing
 * struct mic_copy_work and calling mic_enqueue_copy_work.
 */
struct mic_copy_work {
	uint64_t src_offset;

	uint64_t dst_offset;

	/* Starting src registered window */
	struct reg_range_t *src_window;

	/* Starting dst registered window */
	struct reg_range_t *dst_window;

	/* Is this transfer a loopback transfer? */
	int loopback;

	size_t len;
	/* DMA copy completion callback. Details in mic_dma_lib.h */
	struct dma_completion_cb   *comp_cb;

	struct micscif_dev	*remote_dev;

	/* DO_DMA_POLLING or DO_DMA_INTR or none */
	int fence_type;

	bool ordered;

#ifdef CONFIG_ML1OM
	/* GTT map state */
	enum micscif_msg_state	gttmap_state;

	/* Wait Queue for a GTT map (N)ACK */
	wait_queue_head_t	gttmapwq;

	uint64_t		gtt_offset;

	uint64_t		gtt_length;

#endif
	bool			dma_chan_released;
	struct list_head list_member;
};

/* Insert */
void micscif_insert_window(struct reg_range_t *window, struct list_head *head);
void micscif_insert_tcw(struct reg_range_t *window,
					struct list_head *head);

/* Query */
int micscif_query_window(struct micscif_rma_req *request);
int micscif_query_tcw(struct endpt *ep, struct micscif_rma_req *request);

/* Called from close to unregister all self windows */
int micscif_unregister_all_windows(scif_epd_t epd);

/* Traverse list and munmap */
void micscif_rma_list_munmap(struct reg_range_t *window, uint64_t offset, int nr_pages);
/* Traverse list and mmap */
int micscif_rma_list_mmap(struct reg_range_t *start_window,
			  uint64_t offset, int nr_pages, struct vm_area_struct *vma);
/* Traverse list and unregister */
int micscif_rma_list_unregister(struct reg_range_t *window, uint64_t offset, int nr_pages);

/* CPU copy */
int micscif_rma_list_cpu_copy(struct mic_copy_work *work);

/* Traverse remote RAS and ensure none of the get_put_ref_counts are +ve */
int micscif_rma_list_get_pages_check(struct endpt *ep);

/* Debug API's */
void micscif_display_all_windows(struct list_head *head);

int micscif_rma_list_dma_copy_wrapper(struct endpt *epd, struct mic_copy_work *work, struct dma_channel *chan, off_t loffset);

void micscif_rma_local_cpu_copy(uint64_t offset, struct reg_range_t *window, uint8_t *temp, size_t remaining_len, bool to_temp);

#endif /* MICSCIF_RMA_LIST_H */
Commit	Line	Data
800f879a AT	1	/*
	2	* Copyright 2010-2017 Intel Corporation.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License, version 2,
	6	* as published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope that it will be useful,
	9	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	10	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	11	* General Public License for more details.
	12	*
	13	* Disclaimer: The codes contained in these modules may be specific to
	14	* the Intel Software Development Platform codenamed Knights Ferry,
	15	* and the Intel product codenamed Knights Corner, and are not backward
	16	* compatible with other Intel products. Additionally, Intel will NOT
	17	* support the codes or instruction set in future products.
	18	*
	19	* Intel offers no warranty of any kind regarding the code. This code is
	20	* licensed on an "AS IS" basis and Intel is not obligated to provide
	21	* any support, assistance, installation, training, or other services
	22	* of any kind. Intel is also not obligated to provide any updates,
	23	* enhancements or extensions. Intel specifically disclaims any warranty
	24	* of merchantability, non-infringement, fitness for any particular
	25	* purpose, and any other warranty.
	26	*
	27	* Further, Intel disclaims all liability of any kind, including but
	28	* not limited to liability for infringement of any proprietary rights,
	29	* relating to the use of the code, even if Intel is notified of the
	30	* possibility of such liability. Except as expressly stated in an Intel
	31	* license agreement provided with this code and agreed upon with Intel,
	32	* no license, express or implied, by estoppel or otherwise, to any
	33	* intellectual property rights is granted herein.
	34	*/
	35
	36	#ifndef MICSCIF_RMA_LIST_H
	37	#define MICSCIF_RMA_LIST_H
	38
	39	/*
	40	* RMA Linked List Manipulation API's.
	41	* Callee must Hold RMA lock to call the API's below.
	42	* When and if RMA uses RB trees for log(n) search,
	43	* similar API's should be implemented.
	44	*/
	45
	46	/*
	47	* Specifies whether an RMA operation can span
	48	* across partial windows, a single window or multiple
	49	* contiguous windows.
	50	* Mmaps can span across parial windows.
	51	* Unregistration can span across complete windows.
	52	* scif_get_pages() can span a single window.
	53	*/
	54	enum range_request {
	55	WINDOW_PARTIAL,
	56	WINDOW_SINGLE,
	57	WINDOW_FULL
	58	};
	59
	60	/* Self Registration list RMA Request query */
	61	struct micscif_rma_req {
	62	struct reg_range_t **out_window;
	63	uint64_t offset;
	64	size_t nr_bytes;
65	int prot;
66	enum range_request type;
67	struct list_head *head;
68	void *va_for_temp;
69	};
70
71	/**
72	* struct mic_copy_work:
73	*
74	* Work for DMA copy thread is provided by alloocating and preparing
75	* struct mic_copy_work and calling mic_enqueue_copy_work.
76	*/
77	struct mic_copy_work {
78	uint64_t src_offset;
79
80	uint64_t dst_offset;
81
82	/* Starting src registered window */
83	struct reg_range_t *src_window;
84
85	/* Starting dst registered window */
86	struct reg_range_t *dst_window;
87
88	/* Is this transfer a loopback transfer? */
89	int loopback;
90
91	size_t len;
92	/* DMA copy completion callback. Details in mic_dma_lib.h */
93	struct dma_completion_cb *comp_cb;
94
95	struct micscif_dev *remote_dev;
96
97	/* DO_DMA_POLLING or DO_DMA_INTR or none */
98	int fence_type;
99
100	bool ordered;
101
102	#ifdef CONFIG_ML1OM
103	/* GTT map state */
104	enum micscif_msg_state gttmap_state;
105
106	/* Wait Queue for a GTT map (N)ACK */
107	wait_queue_head_t gttmapwq;
108
109	uint64_t gtt_offset;
110
111	uint64_t gtt_length;
112
113	#endif
114	bool dma_chan_released;
115	struct list_head list_member;
116	};
117
118	/* Insert */
119	void micscif_insert_window(struct reg_range_t window, struct list_head head);
120	void micscif_insert_tcw(struct reg_range_t *window,
121	struct list_head *head);
122
123	/* Query */
124	int micscif_query_window(struct micscif_rma_req *request);
125	int micscif_query_tcw(struct endpt ep, struct micscif_rma_req request);
126
127	/* Called from close to unregister all self windows */
128	int micscif_unregister_all_windows(scif_epd_t epd);
129
130	/* Traverse list and munmap */
131	void micscif_rma_list_munmap(struct reg_range_t *window, uint64_t offset, int nr_pages);
132	/* Traverse list and mmap */
133	int micscif_rma_list_mmap(struct reg_range_t *start_window,
134	uint64_t offset, int nr_pages, struct vm_area_struct *vma);
135	/* Traverse list and unregister */
136	int micscif_rma_list_unregister(struct reg_range_t *window, uint64_t offset, int nr_pages);
137
138	/* CPU copy */
139	int micscif_rma_list_cpu_copy(struct mic_copy_work *work);
140
141	/* Traverse remote RAS and ensure none of the get_put_ref_counts are +ve */
142	int micscif_rma_list_get_pages_check(struct endpt *ep);
143
144	/* Debug API's */
145	void micscif_display_all_windows(struct list_head *head);
146
147	int micscif_rma_list_dma_copy_wrapper(struct endpt epd, struct mic_copy_work work, struct dma_channel *chan, off_t loffset);
148
149	void micscif_rma_local_cpu_copy(uint64_t offset, struct reg_range_t window, uint8_t temp, size_t remaining_len, bool to_temp);
150
151	#endif /* MICSCIF_RMA_LIST_H */