Commit | Line | Data |
---|---|---|
86530b38 AT |
1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: dmu_clu_ctm_tagmgr.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | module dmu_clu_ctm_tagmgr | |
36 | ( | |
37 | // clock/reset | |
38 | clk, | |
39 | rst_l, | |
40 | ||
41 | // tag retire port 0 | |
42 | tag_ret_0, | |
43 | tag_ret_0_vld, | |
44 | ||
45 | // tag retire port 1 | |
46 | tag_ret_1, | |
47 | tag_ret_1_vld, | |
48 | ||
49 | // tag issue port | |
50 | nxt_tag, | |
51 | ||
52 | // tag ctl/status port | |
53 | tag_pool_full, | |
54 | nxt_tag_avail, | |
55 | nxt_tag_req | |
56 | ); | |
57 | ||
58 | // synopsys sync_set_reset "rst_l" | |
59 | ||
60 | // >>>>>>>>>>>>>>>>>>>>>>>>> Parameter Declarations <<<<<<<<<<<<<<<<<<<<<<<<< | |
61 | ||
62 | // -------------------------------------------------------- | |
63 | // Tag Manager Configuration | |
64 | // -------------------------------------------------------- | |
65 | ||
66 | parameter TAG_NUM = 16; | |
67 | parameter TAG_WDTH = 4; | |
68 | ||
69 | // >>>>>>>>>>>>>>>>>>>>>>>>> Port Declarations <<<<<<<<<<<<<<<<<<<<<<<<<<<<<< | |
70 | ||
71 | // -------------------------------------------------------- | |
72 | // Clock/Reset Signals | |
73 | // -------------------------------------------------------- | |
74 | ||
75 | input clk; | |
76 | input rst_l; | |
77 | ||
78 | // -------------------------------------------------------- | |
79 | // Tag Retire Port 0 | |
80 | // -------------------------------------------------------- | |
81 | ||
82 | input [(TAG_WDTH - 1):0] tag_ret_0; | |
83 | input tag_ret_0_vld; | |
84 | ||
85 | // -------------------------------------------------------- | |
86 | // Tag Retire Port 1 | |
87 | // -------------------------------------------------------- | |
88 | ||
89 | input [(TAG_WDTH - 1):0] tag_ret_1; | |
90 | input tag_ret_1_vld; | |
91 | ||
92 | // -------------------------------------------------------- | |
93 | // Tag Issue Port | |
94 | // -------------------------------------------------------- | |
95 | ||
96 | output [(TAG_WDTH - 1):0] nxt_tag; | |
97 | ||
98 | // -------------------------------------------------------- | |
99 | // Tag Control/Status Port | |
100 | // -------------------------------------------------------- | |
101 | ||
102 | output tag_pool_full; | |
103 | output nxt_tag_avail; | |
104 | input nxt_tag_req; | |
105 | ||
106 | // >>>>>>>>>>>>>>>>>>>>>>>>> Data Type Declarations <<<<<<<<<<<<<<<<<<<<<<<<< | |
107 | ||
108 | // ~~~~~~~~~~~~~~~~~~~~~~~~~ REGISTERS ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
109 | ||
110 | // ********** Flops ********** | |
111 | ||
112 | reg [(TAG_NUM - 1):0] tag_pool_vctr; | |
113 | ||
114 | // ********** Non-Flops ****** | |
115 | ||
116 | reg [(TAG_WDTH - 1):0] nxt_tag; | |
117 | reg [(TAG_NUM - 1):0] dcd_vec0; | |
118 | reg [(TAG_NUM - 1):0] dcd_vec1; | |
119 | reg [(TAG_NUM - 1):0] tag_dcd_0; | |
120 | reg [(TAG_NUM - 1):0] tag_dcd_1; | |
121 | ||
122 | // ~~~~~~~~~~~~~~~~~~~~~~~~~ NETS ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
123 | ||
124 | // -------------------------------------------------------- | |
125 | // Internal Signals | |
126 | // -------------------------------------------------------- | |
127 | ||
128 | wire [(TAG_NUM - 1):0] tag_retire_vctr; | |
129 | wire [(TAG_NUM - 1):0] tag_consume_vctr; | |
130 | wire [(TAG_NUM - 1):0] nxt_tag_select; | |
131 | wire [(TAG_NUM - 1):0] higher_pri_tags; | |
132 | wire [(TAG_NUM - 1):0] nxt_tag_pool_vctr; | |
133 | ||
134 | // >>>>>>>>>>>>>>>>>>>>>>>>> 0-in Checkers <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< | |
135 | ||
136 | /* 0in oid | |
137 | -req nxt_tag_req | |
138 | -req_id nxt_tag | |
139 | -ret tag_ret_0_vld | |
140 | -ret_id tag_ret_0 | |
141 | -flush tag_ret_1_vld | |
142 | -flush_id tag_ret_1 | |
143 | -flush_count 1 | |
144 | -known_flush | |
145 | -max_ids 16 | |
146 | -max_count_per_id 1 | |
147 | -message "TAGMGR VIOLATION" | |
148 | */ | |
149 | ||
150 | // 0in bits_on -var tag_retire_vctr -max 2 | |
151 | ||
152 | // 0in bits_on -var tag_consume_vctr | |
153 | ||
154 | // 0in decode -in tag_ret_0 -out dcd_vec0 | |
155 | ||
156 | // 0in decode -in tag_ret_1 -out dcd_vec1 | |
157 | ||
158 | // 0in encode -in nxt_tag_select -out nxt_tag -zero off | |
159 | ||
160 | // >>>>>>>>>>>>>>>>>>>>>>>>> RTL Model <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< | |
161 | ||
162 | // -------------------------------------------------------- | |
163 | // Decoder : tag retire port 0 | |
164 | // -------------------------------------------------------- | |
165 | ||
166 | always @(tag_ret_0 or tag_ret_0_vld) | |
167 | begin | |
168 | dcd_vec0 = {TAG_NUM{1'b0}}; | |
169 | dcd_vec0[tag_ret_0] = 1'b1; | |
170 | tag_dcd_0 = dcd_vec0 & {TAG_NUM{tag_ret_0_vld}}; | |
171 | end | |
172 | ||
173 | // -------------------------------------------------------- | |
174 | // Decoder : tag retire port 1 | |
175 | // -------------------------------------------------------- | |
176 | ||
177 | always @(tag_ret_1 or tag_ret_1_vld) | |
178 | begin | |
179 | dcd_vec1 = {TAG_NUM{1'b0}}; | |
180 | dcd_vec1[tag_ret_1] = 1'b1; | |
181 | tag_dcd_1 = dcd_vec1 & {TAG_NUM{tag_ret_1_vld}}; | |
182 | end | |
183 | ||
184 | // -------------------------------------------------------- | |
185 | // Tag Pool : storage vector | |
186 | // -------------------------------------------------------- | |
187 | ||
188 | // generate composite tag retire vector | |
189 | assign tag_retire_vctr = tag_dcd_0 | tag_dcd_1; | |
190 | ||
191 | // generate tag consume vector | |
192 | assign tag_consume_vctr = nxt_tag_select & {TAG_NUM{nxt_tag_req}}; | |
193 | ||
194 | // generate nxt_tag_avail signal | |
195 | assign nxt_tag_avail = |tag_pool_vctr; | |
196 | ||
197 | // generate tag_pool_full signal | |
198 | assign tag_pool_full = &tag_pool_vctr; | |
199 | ||
200 | // generate "next tag pool" storage vector | |
201 | assign nxt_tag_pool_vctr = (tag_retire_vctr | tag_pool_vctr) & ~tag_consume_vctr; | |
202 | ||
203 | // "tag pool" storage vector: 1 = avail, 0 = used | |
204 | always @(posedge clk) | |
205 | if (~rst_l) | |
206 | tag_pool_vctr <= {TAG_NUM{1'b1}}; // all tags available on reset | |
207 | else | |
208 | tag_pool_vctr <= nxt_tag_pool_vctr; // retire/consume tags | |
209 | ||
210 | // -------------------------------------------------------- | |
211 | // Priority Select : next available tag selection | |
212 | // -------------------------------------------------------- | |
213 | ||
214 | // generate "priority tag select" mask vector | |
215 | assign higher_pri_tags[(TAG_NUM-1):1] = higher_pri_tags[(TAG_NUM-2):0] | tag_pool_vctr[(TAG_NUM-2):0]; | |
216 | assign higher_pri_tags[0] = 1'b0; | |
217 | ||
218 | // apply mask vector to "tag pool" vector to determine next tag | |
219 | assign nxt_tag_select[(TAG_NUM-1):0] = tag_pool_vctr[(TAG_NUM-1):0] & ~higher_pri_tags[(TAG_NUM-1):0]; | |
220 | ||
221 | // -------------------------------------------------------- | |
222 | // Encoder : next available tag generation | |
223 | // -------------------------------------------------------- | |
224 | ||
225 | always @(nxt_tag_select[15:1]) | |
226 | begin | |
227 | ||
228 | nxt_tag[0] = (nxt_tag_select[1] | nxt_tag_select[3] | nxt_tag_select[5] | | |
229 | nxt_tag_select[7] | nxt_tag_select[9] | nxt_tag_select[11] | | |
230 | nxt_tag_select[13] | nxt_tag_select[15]); | |
231 | ||
232 | nxt_tag[1] = (nxt_tag_select[2] | nxt_tag_select[3] | nxt_tag_select[6] | | |
233 | nxt_tag_select[7] | nxt_tag_select[10] | nxt_tag_select[11] | | |
234 | nxt_tag_select[14] | nxt_tag_select[15]); | |
235 | ||
236 | nxt_tag[2] = (nxt_tag_select[4] | nxt_tag_select[5] | nxt_tag_select[6] | | |
237 | nxt_tag_select[7] | nxt_tag_select[12] | nxt_tag_select[13] | | |
238 | nxt_tag_select[14] | nxt_tag_select[15]); | |
239 | ||
240 | nxt_tag[3] = (nxt_tag_select[8] | nxt_tag_select[9] | nxt_tag_select[10] | | |
241 | nxt_tag_select[11] | nxt_tag_select[12] | nxt_tag_select[13] | | |
242 | nxt_tag_select[14] | nxt_tag_select[15]); | |
243 | ||
244 | end | |
245 | ||
246 | endmodule // dmu_clu_ctm_tagmgr |