projects / OpenSPARC-T2-DV / blame
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1 | // ========== Copyright Header Begin ========================================== |
| 2 | // | |
| 3 | // OpenSPARC T2 Processor File: dmu_ilu_eil.v | |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 6 | // | |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 8 | // | |
| 9 | // This program is free software; you can redistribute it and/or modify | |
| 10 | // it under the terms of the GNU General Public License as published by | |
| 11 | // the Free Software Foundation; version 2 of the License. | |
| 12 | // | |
| 13 | // This program is distributed in the hope that it will be useful, | |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | // GNU General Public License for more details. | |
| 17 | // | |
| 18 | // You should have received a copy of the GNU General Public License | |
| 19 | // along with this program; if not, write to the Free Software | |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 21 | // | |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license | |
| 23 | // choice is available it will apply instead, Sun elects to use only | |
| 24 | // the General Public License version 2 (GPLv2) at this time for any | |
| 25 | // software where a choice of GPL license versions is made | |
| 26 | // available with the language indicating that GPLv2 or any later version | |
| 27 | // may be used, or where a choice of which version of the GPL is applied is | |
| 28 | // otherwise unspecified. | |
| 29 | // | |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
| 32 | // have any questions. | |
| 33 | // | |
| 34 | // ========== Copyright Header End ============================================ | |
| 35 | module dmu_ilu_eil ( | |
| 36 | clk, | |
| 37 | rst_l, | |
| 38 | d2p_edb_we, | |
| 39 | d2p_edb_data, | |
| 40 | d2p_edb_dpar, | |
| 41 | d2p_edb_addr, | |
| 42 | d2p_ehb_we, | |
| 43 | d2p_ehb_data, | |
| 44 | d2p_ehb_dpar, | |
| 45 | d2p_ehb_addr, | |
| 46 | d2p_ech_wptr, | |
| 47 | d2p_erh_wptr, | |
| 48 | p2d_ech_rptr, | |
| 49 | p2d_erh_rptr, | |
| 50 | p2d_ecd_rptr, | |
| 51 | p2d_erd_rptr, | |
| 52 | k2y_rcd, | |
| 53 | k2y_rcd_enq, | |
| 54 | y2k_rcd_deq, | |
| 55 | y2k_rel_rcd, | |
| 56 | y2k_rel_enq, | |
| 57 | k2y_dou_dptr, | |
| 58 | k2y_dou_err, | |
| 59 | k2y_dou_vld, | |
| 60 | k2y_buf_addr_vld_monitor, | |
| 61 | y2k_buf_addr_vld_monitor, | |
| 62 | y2k_buf_addr, | |
| 63 | k2y_buf_data, | |
| 64 | k2y_buf_dpar, | |
| 65 | cib2eil_ihb_pe_drain, // caused by iil2cib_ihb_pe | |
| 66 | cib2eil_pec_drain, // caused by p2d_drain | |
| 67 | // cib2eil_drain, | |
| 68 | eil2isb_log, | |
| 69 | eil2isb_tag, | |
| 70 | eil2isb_low_addr, | |
| 71 | ||
| 72 | // debug | |
| 73 | low_dbg_sel_a, | |
| 74 | low_dbg_sel_b, | |
| 75 | eil_dbg_0_a, | |
| 76 | eil_dbg_0_b, | |
| 77 | eil_dbg_1_a, | |
| 78 | eil_dbg_1_b, | |
| 79 | ||
| 80 | // parity invert signals | |
| 81 | ilu_diagnos_ehi_trig_hw_clr, | |
| 82 | ilu_diagnos_ehi_trig_hw_read, | |
| 83 | ilu_diagnos_ehi_par_hw_read, | |
| 84 | ilu_diagnos_edi_trig_hw_clr, | |
| 85 | ilu_diagnos_edi_trig_hw_read, | |
| 86 | ilu_diagnos_edi_par_hw_read, | |
| 87 | ||
| 88 | // idle check | |
| 89 | eil_is_idle, | |
| 90 | ||
| 91 | // crm stall case | |
| 92 | il2cl_gr_16 ); | |
| 93 | ||
| 94 | // synopsys sync_set_reset "rst_l" | |
| 95 | ||
| 96 | // >>>>>>>>>>>>>>>>>>>>>>>>> Port Declarations <<<<<<<<<<<<<<<<<<<<<<<<<<<<<< | |
| 97 | ||
| 98 | //--------------------------------------------------------------------- | |
| 99 | // Clock and Reset Signals | |
| 100 | //--------------------------------------------------------------------- | |
| 101 | input clk; // input clock | |
| 102 | input rst_l; // input reset | |
| 103 | ||
| 104 | //--------------------------------------------------------------------- | |
| 105 | // rcd interface to TMU | |
| 106 | //--------------------------------------------------------------------- | |
| 107 | input [`FIRE_DLC_EPE_REC_WDTH-1:0] k2y_rcd; // command rcd | |
| 108 | input k2y_rcd_enq; // enqueue for command rcd | |
| 109 | output y2k_rcd_deq; // rcd fifo full | |
| 110 | ||
| 111 | //--------------------------------------------------------------------- | |
| 112 | // release interface to RMU | |
| 113 | //--------------------------------------------------------------------- | |
| 114 | output y2k_rel_enq; // enqueue for release rcd | |
| 115 | output [8:0] y2k_rel_rcd; // release rcd | |
| 116 | ||
| 117 | //--------------------------------------------------------------------- | |
| 118 | // stall to crm for delock | |
| 119 | //--------------------------------------------------------------------- | |
| 120 | output il2cl_gr_16; // don't let erh get more than 16 full | |
| 121 | ||
| 122 | //------------------------------------------------------------------------ | |
| 123 | // DOU DMA Rd Cpl Buffer status rcd interface with CLU | |
| 124 | //------------------------------------------------------------------------ | |
| 125 | input [`FIRE_DLC_DOU_DPTR_WDTH-1:0] k2y_dou_dptr; | |
| 126 | input k2y_dou_err; | |
| 127 | input k2y_dou_vld; | |
| 128 | ||
| 129 | //--------------------------------------------------------------------- | |
| 130 | // data buffer interface to DOU | |
| 131 | //--------------------------------------------------------------------- | |
| 132 | input k2y_buf_addr_vld_monitor; | |
| 133 | output y2k_buf_addr_vld_monitor; | |
| 134 | output [7:0] y2k_buf_addr; // read address to DOU | |
| 135 | input [127:0] k2y_buf_data; // payload | |
| 136 | input [3:0] k2y_buf_dpar; // word parity for the payload | |
| 137 | ||
| 138 | //--------------------------------------------------------------------- | |
| 139 | // buffer management interface | |
| 140 | //--------------------------------------------------------------------- | |
| 141 | output [5:0] d2p_ech_wptr; // grey-coded cpl-buffer in EHB write pointer | |
| 142 | input [5:0] p2d_ech_rptr; // grey-coded cpl-buffer in EHB read pointer | |
| 143 | output [5:0] d2p_erh_wptr; // grey-coded req-buffer in EHB write pointer | |
| 144 | input [5:0] p2d_erh_rptr; // grey-coded req-buffer in EHB read pointer | |
| 145 | input [`FIRE_P2D_ECD_RPTR_WDTH-1:0] p2d_ecd_rptr; // grey-coded EDB DMA Cpl buffer read pointer | |
| 146 | input [`FIRE_P2D_ERD_RPTR_WDTH-1:0] p2d_erd_rptr; // grey-coded EDB PIO Wr buffer read pointer | |
| 147 | ||
| 148 | //--------------------------------------------------------------------- | |
| 149 | // EHB interface | |
| 150 | //--------------------------------------------------------------------- | |
| 151 | output d2p_ehb_we; // EHB write stroke | |
| 152 | output [5:0] d2p_ehb_addr; // EHB write pointer | |
| 153 | output [`FIRE_EHB_REC_WDTH-1:0] d2p_ehb_data; // EHB record | |
| 154 | output [3:0] d2p_ehb_dpar; // EHB word parity for header rcd | |
| 155 | ||
| 156 | //--------------------------------------------------------------------- | |
| 157 | // EDB interface | |
| 158 | //--------------------------------------------------------------------- | |
| 159 | output d2p_edb_we; // EDB write stroke | |
| 160 | output [7:0] d2p_edb_addr; // EDB write pointer | |
| 161 | output [127:0] d2p_edb_data; // EDB payload | |
| 162 | output [3:0] d2p_edb_dpar; // EDB word parity for payload | |
| 163 | ||
| 164 | //--------------------------------------------------------------------- | |
| 165 | // drain interface | |
| 166 | //--------------------------------------------------------------------- | |
| 167 | input cib2eil_ihb_pe_drain; // caused by iil2cib_ihb_pe | |
| 168 | input cib2eil_pec_drain; // caused by p2d_drain | |
| 169 | // input cib2eil_drain; // drain signal from internal sub-block CIB | |
| 170 | ||
| 171 | //--------------------------------------------------------------------- | |
| 172 | // internal ISB interface | |
| 173 | //--------------------------------------------------------------------- | |
| 174 | output eil2isb_log; // log non-posted PIO request to ISB | |
| 175 | output [4:0] eil2isb_tag; // tlp_tag[4:0] in PIO-req rcd | |
| 176 | output [3:2] eil2isb_low_addr; // addr[3:2] in PIO-req rcd | |
| 177 | ||
| 178 | //------------------------------------------------------------------------ | |
| 179 | // clocks to EHB, EDB | |
| 180 | //------------------------------------------------------------------------ | |
| 181 | ||
| 182 | //------------------------------------------------------------------------ | |
| 183 | // debug | |
| 184 | //------------------------------------------------------------------------ | |
| 185 | input [2:0] low_dbg_sel_a; | |
| 186 | input [2:0] low_dbg_sel_b; | |
| 187 | output [`FIRE_DBG_DATA_BITS] eil_dbg_0_a; | |
| 188 | output [`FIRE_DBG_DATA_BITS] eil_dbg_0_b; | |
| 189 | output [`FIRE_DBG_DATA_BITS] eil_dbg_1_a; | |
| 190 | output [`FIRE_DBG_DATA_BITS] eil_dbg_1_b; | |
| 191 | ||
| 192 | //------------------------------------------------------------------------ | |
| 193 | // idle check | |
| 194 | //------------------------------------------------------------------------ | |
| 195 | output eil_is_idle; | |
| 196 | ||
| 197 | // SV 04/06/05 EDB Parity invert signals | |
| 198 | output ilu_diagnos_edi_trig_hw_clr; | |
| 199 | input ilu_diagnos_edi_trig_hw_read; | |
| 200 | input [3:0] ilu_diagnos_edi_par_hw_read; | |
| 201 | output ilu_diagnos_ehi_trig_hw_clr; | |
| 202 | input ilu_diagnos_ehi_trig_hw_read; | |
| 203 | input [3:0] ilu_diagnos_ehi_par_hw_read; | |
| 204 | ||
| 205 | // >>>>>>>>>>>>>>>>>>>>>>>>> Data Type Declarations <<<<<<<<<<<<<<<<<<<<<<<<< | |
| 206 | ||
| 207 | // ~~~~~~~~~~~~~~~~~~~~~~~~~ REGISTER - FLOPS ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 208 | reg [`FIRE_DBG_DATA_BITS] dbg_0_bus [0:1]; | |
| 209 | reg [`FIRE_DBG_DATA_BITS] dbg_1_bus [0:1]; | |
| 210 | ||
| 211 | reg y2k_buf_addr_vld_monitor; | |
| 212 | ||
| 213 | // ~~~~~~~~~~~~~~~~~~~~~~~~~ REGISTER - NON-FLOPS ~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 214 | ||
| 215 | reg [`FIRE_DBG_DATA_BITS] nxt_dbg_0_bus [0:1]; | |
| 216 | reg [`FIRE_DBG_DATA_BITS] nxt_dbg_1_bus [0:1]; | |
| 217 | reg [2:0] dbg_sel [0:1]; | |
| 218 | ||
| 219 | // ~~~~~~~~~~~~~~~~~~~~~~~~~ NETS ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 220 | wire cib2eil_drain; | |
| 221 | ||
| 222 | //--------------------------------------------------------------------- | |
| 223 | // outputs from *_rcdbldr.v | |
| 224 | // -------------------------------------------------------------------- | |
| 225 | wire rcd_empty; | |
| 226 | wire has_payld; | |
| 227 | wire rcd_is_cpl; | |
| 228 | wire rcd_is_cpl_reg; | |
| 229 | wire rcd_is_pio_mwr; | |
| 230 | wire [3:0] pio_tag; | |
| 231 | wire [5:2] align_addr; | |
| 232 | wire [7:0] payld_len; | |
| 233 | wire [5:0] d_ptr_in; | |
| 234 | // debug signals | |
| 235 | wire log_ep_history; | |
| 236 | wire ep_history; | |
| 237 | wire log_dou_sbd_err; | |
| 238 | wire take_care_rcd_ep; | |
| 239 | wire out_rcd_ep; | |
| 240 | ||
| 241 | //--------------------------------------------------------------------- | |
| 242 | // outputs from *_xfrfsm.v | |
| 243 | // -------------------------------------------------------------------- | |
| 244 | wire n_d2p_ehb_we; // it drives d2p_ehb_we | |
| 245 | wire data_start; | |
| 246 | wire xfrfsm_is_wfh; | |
| 247 | wire rcd_deq; // it's a cycle earlier than y2k_rcd_deq | |
| 248 | wire xfrfsm_is_idle; | |
| 249 | // debug signals | |
| 250 | wire [3:0] xfr_state; | |
| 251 | ||
| 252 | //--------------------------------------------------------------------- | |
| 253 | // outputs from *_datafsm.v | |
| 254 | // -------------------------------------------------------------------- | |
| 255 | wire data_done; // to xfrfsm.v & relgen.v | |
| 256 | wire only_one_rd_and_can_move; | |
| 257 | wire edb_wptr_inc; | |
| 258 | wire [6:2] n_y2k_buf_addr_cl; // to relgen.v | |
| 259 | wire datafsm_is_idle; | |
| 260 | // debug signals | |
| 261 | wire [4:0] data_state; | |
| 262 | wire set_residue; | |
| 263 | wire clr_residue; | |
| 264 | wire there_is_data_residue; | |
| 265 | wire set_early_data_done; | |
| 266 | wire clr_early_data_done; | |
| 267 | wire early_data_done; | |
| 268 | wire last_rd; | |
| 269 | wire last_wr; | |
| 270 | wire more_rds; | |
| 271 | wire more_wrs; | |
| 272 | wire dou_rptr_inc; | |
| 273 | ||
| 274 | //--------------------------------------------------------------------- | |
| 275 | // outputs from *_bufmgr.v | |
| 276 | // -------------------------------------------------------------------- | |
| 277 | wire [7:0] edb_wptr; // EDB wptr | |
| 278 | wire ehb_full; // | |
| 279 | wire ecd_full; // full in DMA cpl part of EDB | |
| 280 | wire erd_full; // full in PIO req part of EDB | |
| 281 | wire edb_full_adv; | |
| 282 | // debug signals | |
| 283 | wire erh_full; | |
| 284 | wire ech_full; | |
| 285 | wire erd_full_adv; | |
| 286 | wire ecd_full_adv; | |
| 287 | ||
| 288 | //--------------------------------------------------------------------- | |
| 289 | // outputs from *_relgen.v | |
| 290 | // -------------------------------------------------------------------- | |
| 291 | wire dou_sbd_vld_datafsm; // dou cl avairable to pull | |
| 292 | wire dou_sbd_vld_rcdbldr; // dou cl avairable to pull | |
| 293 | wire dou_sbd_err_rcdbldr; // dou cl error | |
| 294 | // debug signals | |
| 295 | wire cpl_cl_done; | |
| 296 | ||
| 297 | wire [3:0] d2p_ehb_dpar_0 ; | |
| 298 | ||
| 299 | // >>>>>>>>>>>>>>>>>>>>>>>>> Zero In Checkers <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< | |
| 300 | ||
| 301 | // 0in custom -fire d2p_ehb_we -active $0in_delay(cib2eil_drain, 1) | |
| 302 | //BP moved this one to dmu_ilu_eil_datafsm.v | |
| 303 | // // 0in custom -fire d2p_edb_we -active $0in_delay(cib2eil_drain, 3) | |
| 304 | ||
| 305 | ||
| 306 | // >>>>>>>>>>>>>>>>>>>>>>>>> RTL/Behavioral Model <<<<<<<<<<<<<<<<<<<<<<<<<<< | |
| 307 | ||
| 308 | //--------------------------------------------------------------------- | |
| 309 | // clocks to EHB, EDB | |
| 310 | //--------------------------------------------------------------------- | |
| 311 | //sun_buff_clk d2p_edb_clk_buf | |
| 312 | // ( .a (clk), | |
| 313 | // .z (d2p_edb_clk) ); | |
| 314 | ||
| 315 | //sun_buff_clk d2p_ehb_clk_buf | |
| 316 | // ( .a (clk), | |
| 317 | // .z (d2p_ehb_clk) ); | |
| 318 | ||
| 319 | ||
| 320 | //--------------------------------------------------------------------- | |
| 321 | // combine drain signals to one to datafsm and xfrfsm | |
| 322 | //--------------------------------------------------------------------- | |
| 323 | assign cib2eil_drain = cib2eil_ihb_pe_drain | cib2eil_pec_drain; | |
| 324 | ||
| 325 | ||
| 326 | //--------------------------------------------------------------------- | |
| 327 | // debug ports | |
| 328 | //--------------------------------------------------------------------- | |
| 329 | ||
| 330 | always @ (low_dbg_sel_a or low_dbg_sel_b) begin | |
| 331 | dbg_sel[0] = low_dbg_sel_a; | |
| 332 | dbg_sel[1] = low_dbg_sel_b; | |
| 333 | end | |
| 334 | ||
| 335 | always @ (dbg_sel[0] or dbg_sel[1] or | |
| 336 | d2p_edb_we or | |
| 337 | d2p_edb_addr or | |
| 338 | d2p_ehb_we or | |
| 339 | d2p_ehb_addr or | |
| 340 | k2y_buf_addr_vld_monitor or | |
| 341 | y2k_buf_addr or | |
| 342 | k2y_rcd_enq or | |
| 343 | y2k_rcd_deq or | |
| 344 | y2k_rel_enq or | |
| 345 | y2k_rel_rcd[8] or | |
| 346 | y2k_rel_rcd[4:0] or | |
| 347 | k2y_dou_vld or | |
| 348 | k2y_dou_dptr or | |
| 349 | k2y_dou_err or | |
| 350 | cib2eil_drain or | |
| 351 | eil2isb_log ) | |
| 352 | begin : loop_1st | |
| 353 | integer i; | |
| 354 | for (i = 0; i < 2; i = i + 1) begin | |
| 355 | case (dbg_sel[i]) // synopsys infer_mux | |
| 356 | 3'b000: nxt_dbg_0_bus[i] = {1'b0, d2p_ehb_we, d2p_ehb_addr}; | |
| 357 | 3'b001: nxt_dbg_0_bus[i] = d2p_edb_addr; | |
| 358 | 3'b010: nxt_dbg_0_bus[i] = {2'b0, k2y_buf_addr_vld_monitor, d2p_edb_we, | |
| 359 | k2y_rcd_enq, y2k_rcd_deq, | |
| 360 | cib2eil_drain, eil2isb_log}; | |
| 361 | 3'b011: nxt_dbg_0_bus[i] = {1'b0, y2k_rel_enq, y2k_rel_rcd[8], y2k_rel_rcd[4:0]}; | |
| 362 | 3'b100: nxt_dbg_0_bus[i] = {1'b0, k2y_dou_vld, k2y_dou_dptr, k2y_dou_err}; | |
| 363 | 3'b101: nxt_dbg_0_bus[i] = y2k_buf_addr; | |
| 364 | 3'b110: nxt_dbg_0_bus[i] = 8'b0; | |
| 365 | 3'b111: nxt_dbg_0_bus[i] = 8'b0; | |
| 366 | endcase | |
| 367 | end | |
| 368 | end // always @ (dbg_sel[0] or dbg_sel[1] or... | |
| 369 | ||
| 370 | always @ (dbg_sel[0] or dbg_sel[1] or | |
| 371 | rcd_empty or | |
| 372 | has_payld or | |
| 373 | rcd_is_cpl or | |
| 374 | rcd_is_pio_mwr or | |
| 375 | data_start or | |
| 376 | data_done or | |
| 377 | only_one_rd_and_can_move or | |
| 378 | edb_wptr_inc or | |
| 379 | ehb_full or | |
| 380 | ecd_full or | |
| 381 | erd_full or | |
| 382 | edb_full_adv or | |
| 383 | dou_sbd_vld_datafsm or | |
| 384 | dou_sbd_vld_rcdbldr or | |
| 385 | dou_sbd_err_rcdbldr or | |
| 386 | ||
| 387 | // xfrfsm | |
| 388 | xfr_state or | |
| 389 | // relgen | |
| 390 | cpl_cl_done or | |
| 391 | // rcdbldr | |
| 392 | log_ep_history or | |
| 393 | ep_history or | |
| 394 | log_dou_sbd_err or | |
| 395 | take_care_rcd_ep or | |
| 396 | out_rcd_ep or | |
| 397 | // datafsm | |
| 398 | data_state or | |
| 399 | set_residue or | |
| 400 | clr_residue or | |
| 401 | there_is_data_residue or | |
| 402 | set_early_data_done or | |
| 403 | clr_early_data_done or | |
| 404 | early_data_done or | |
| 405 | last_rd or | |
| 406 | last_wr or | |
| 407 | more_rds or | |
| 408 | more_wrs or | |
| 409 | dou_rptr_inc or | |
| 410 | // bufmgr | |
| 411 | erh_full or | |
| 412 | ech_full or | |
| 413 | erd_full_adv or | |
| 414 | ecd_full_adv ) | |
| 415 | begin : loop_2nd | |
| 416 | integer i; | |
| 417 | for (i = 0; i < 2; i = i + 1) begin | |
| 418 | case (dbg_sel[i]) // synopsys infer_mux | |
| 419 | 3'b000: nxt_dbg_1_bus[i] = {xfr_state, rcd_empty, ehb_full, | |
| 420 | has_payld, only_one_rd_and_can_move}; | |
| 421 | 3'b001: nxt_dbg_1_bus[i] = {1'b0,data_state, data_start, data_done}; | |
| 422 | 3'b010: nxt_dbg_1_bus[i] = {1'b0, ecd_full, erd_full, edb_full_adv, | |
| 423 | erh_full, ech_full, erd_full_adv, ecd_full_adv}; | |
| 424 | 3'b011: nxt_dbg_1_bus[i] = {4'b0, rcd_is_cpl, rcd_is_pio_mwr, | |
| 425 | cpl_cl_done, edb_wptr_inc}; | |
| 426 | 3'b100: nxt_dbg_1_bus[i] = {1'b0, log_ep_history, ep_history, log_dou_sbd_err, | |
| 427 | take_care_rcd_ep, out_rcd_ep, dou_sbd_vld_rcdbldr, | |
| 428 | dou_sbd_err_rcdbldr}; | |
| 429 | 3'b101: nxt_dbg_1_bus[i] = {1'b0, dou_sbd_vld_datafsm, set_residue, | |
| 430 | clr_residue, there_is_data_residue, | |
| 431 | set_early_data_done, clr_early_data_done, | |
| 432 | early_data_done}; | |
| 433 | ||
| 434 | 3'b110: nxt_dbg_1_bus[i] = {3'b0, last_rd, last_wr, more_rds, | |
| 435 | more_wrs, dou_rptr_inc}; | |
| 436 | 3'b111: nxt_dbg_1_bus[i] = 8'b0; | |
| 437 | endcase | |
| 438 | end | |
| 439 | end | |
| 440 | ||
| 441 | assign eil_dbg_0_a = dbg_0_bus[0]; | |
| 442 | assign eil_dbg_0_b = dbg_0_bus[1]; | |
| 443 | ||
| 444 | assign eil_dbg_1_a = dbg_1_bus[0]; | |
| 445 | assign eil_dbg_1_b = dbg_1_bus[1]; | |
| 446 | ||
| 447 | always @ (posedge clk) | |
| 448 | if(~rst_l) begin : dbg0_rst | |
| 449 | integer j; | |
| 450 | for (j = 0; j < 2; j = j + 1) begin | |
| 451 | dbg_0_bus[j] <= {8{1'b0}}; | |
| 452 | end | |
| 453 | end | |
| 454 | else begin : loop_3rd | |
| 455 | integer i; | |
| 456 | for (i = 0; i < 2; i = i + 1) begin | |
| 457 | dbg_0_bus[i] <= nxt_dbg_0_bus[i]; | |
| 458 | end | |
| 459 | end | |
| 460 | ||
| 461 | always @ (posedge clk) | |
| 462 | if(~rst_l) begin : dbg1_rst | |
| 463 | integer j; | |
| 464 | for (j = 0; j < 2; j = j + 1) begin | |
| 465 | dbg_1_bus[j] <= {8{1'b0}}; | |
| 466 | end | |
| 467 | end | |
| 468 | else begin : loop_4th | |
| 469 | integer i; | |
| 470 | for (i = 0; i < 2; i = i + 1) begin | |
| 471 | dbg_1_bus[i] <= nxt_dbg_1_bus[i]; | |
| 472 | end | |
| 473 | end | |
| 474 | ||
| 475 | //--------------------------------------------------------------------- | |
| 476 | // idle check | |
| 477 | //--------------------------------------------------------------------- | |
| 478 | assign eil_is_idle = rcd_empty & datafsm_is_idle & xfrfsm_is_idle; | |
| 479 | ||
| 480 | //--------------------------------------------------------------------- | |
| 481 | // output for y2k_buf_addr_vld_monitor | |
| 482 | //--------------------------------------------------------------------- | |
| 483 | always @ (posedge clk) | |
| 484 | if(~rst_l) begin | |
| 485 | y2k_buf_addr_vld_monitor <= 1'b0; | |
| 486 | end | |
| 487 | else begin | |
| 488 | y2k_buf_addr_vld_monitor <= dou_rptr_inc; | |
| 489 | end | |
| 490 | ||
| 491 | // >>>>>>>>>>>>>>>>>>>>>>>>> Instantiations <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< | |
| 492 | ||
| 493 | // release generator | |
| 494 | dmu_ilu_eil_relgen relgen | |
| 495 | ( .clk (clk), | |
| 496 | .rst_l (rst_l), | |
| 497 | .y2k_rel_rcd (y2k_rel_rcd), | |
| 498 | .y2k_rel_enq (y2k_rel_enq), | |
| 499 | .rcd_is_pio_mwr (rcd_is_pio_mwr), | |
| 500 | .rcd_is_cpl_reg (rcd_is_cpl_reg), | |
| 501 | .pio_tag (pio_tag), | |
| 502 | .data_start (data_start), | |
| 503 | .data_done (data_done), | |
| 504 | .n_y2k_buf_addr_cl (n_y2k_buf_addr_cl), | |
| 505 | .y2k_buf_addr (y2k_buf_addr[6:0]), | |
| 506 | .k2y_dou_dptr (k2y_dou_dptr), | |
| 507 | .k2y_dou_err (k2y_dou_err), | |
| 508 | .k2y_dou_vld (k2y_dou_vld), | |
| 509 | .dou_sbd_vld_datafsm (dou_sbd_vld_datafsm), | |
| 510 | .dou_sbd_vld_rcdbldr (dou_sbd_vld_rcdbldr), | |
| 511 | .dou_sbd_err_rcdbldr (dou_sbd_err_rcdbldr), | |
| 512 | .cpl_cl_done (cpl_cl_done)); | |
| 513 | ||
| 514 | // buffer manager | |
| 515 | dmu_ilu_eil_bufmgr bufmgr | |
| 516 | ( .clk (clk), | |
| 517 | .rst_l (rst_l), | |
| 518 | .d2p_ehb_addr (d2p_ehb_addr), | |
| 519 | .d2p_ech_wptr (d2p_ech_wptr), | |
| 520 | .d2p_erh_wptr (d2p_erh_wptr), | |
| 521 | .p2d_ech_rptr (p2d_ech_rptr), | |
| 522 | .p2d_erh_rptr (p2d_erh_rptr), | |
| 523 | .p2d_ecd_rptr (p2d_ecd_rptr), | |
| 524 | .p2d_erd_rptr (p2d_erd_rptr), | |
| 525 | .cib2eil_drain (cib2eil_drain), | |
| 526 | .cib2eil_pec_drain (cib2eil_pec_drain), | |
| 527 | .rcd_is_cpl (rcd_is_cpl), | |
| 528 | .rcd_is_cpl_reg (rcd_is_cpl_reg), | |
| 529 | .edb_wptr (edb_wptr), | |
| 530 | .n_d2p_ehb_we (n_d2p_ehb_we), | |
| 531 | .edb_wptr_inc (edb_wptr_inc), | |
| 532 | .ehb_full (ehb_full), | |
| 533 | .ecd_full (ecd_full), | |
| 534 | .erd_full (erd_full), | |
| 535 | .edb_full_adv (edb_full_adv), | |
| 536 | .erh_full (erh_full), | |
| 537 | .ech_full (ech_full), | |
| 538 | .erd_full_adv (erd_full_adv), | |
| 539 | .ecd_full_adv (ecd_full_adv), | |
| 540 | .il2cl_gr_16 (il2cl_gr_16) | |
| 541 | ); | |
| 542 | ||
| 543 | // data FSM | |
| 544 | dmu_ilu_eil_datafsm datafsm | |
| 545 | ( .clk (clk), | |
| 546 | .rst_l (rst_l), | |
| 547 | .y2k_buf_addr (y2k_buf_addr), | |
| 548 | .k2y_buf_data (k2y_buf_data), | |
| 549 | .k2y_buf_dpar (k2y_buf_dpar), | |
| 550 | .d2p_edb_we (d2p_edb_we), | |
| 551 | .d2p_edb_addr (d2p_edb_addr), | |
| 552 | .d2p_edb_data (d2p_edb_data), | |
| 553 | .d2p_edb_dpar (d2p_edb_dpar), | |
| 554 | .data_start (data_start), | |
| 555 | .data_done (data_done), | |
| 556 | .only_one_rd_and_can_move (only_one_rd_and_can_move), | |
| 557 | .ecd_full (ecd_full), | |
| 558 | .erd_full (erd_full), | |
| 559 | .edb_full_adv (edb_full_adv), | |
| 560 | .edb_wptr (edb_wptr), | |
| 561 | .edb_wptr_inc (edb_wptr_inc), | |
| 562 | .align_addr (align_addr), | |
| 563 | .payld_len (payld_len), | |
| 564 | .d_ptr_in (d_ptr_in), | |
| 565 | .rcd_is_cpl (rcd_is_cpl), | |
| 566 | .rcd_is_cpl_reg (rcd_is_cpl_reg), | |
| 567 | .n_y2k_buf_addr_cl (n_y2k_buf_addr_cl), | |
| 568 | .dou_sbd_vld_datafsm (dou_sbd_vld_datafsm), | |
| 569 | .cib2eil_drain (cib2eil_drain), | |
| 570 | .datafsm_is_idle (datafsm_is_idle), | |
| 571 | .ilu_diagnos_edi_trig_hw_clr (ilu_diagnos_edi_trig_hw_clr), | |
| 572 | .ilu_diagnos_edi_trig_hw_read (ilu_diagnos_edi_trig_hw_read), | |
| 573 | .ilu_diagnos_edi_par_hw_read (ilu_diagnos_edi_par_hw_read), | |
| 574 | .data_state (data_state), | |
| 575 | .set_residue (set_residue), | |
| 576 | .clr_residue (clr_residue), | |
| 577 | .there_is_data_residue (there_is_data_residue), | |
| 578 | .set_early_data_done (set_early_data_done), | |
| 579 | .clr_early_data_done (clr_early_data_done), | |
| 580 | .early_data_done (early_data_done), | |
| 581 | .last_rd (last_rd), | |
| 582 | .last_wr (last_wr), | |
| 583 | .more_rds (more_rds), | |
| 584 | .more_wrs (more_wrs), | |
| 585 | .dou_rptr_inc (dou_rptr_inc)); | |
| 586 | ||
| 587 | // transfer FSM | |
| 588 | dmu_ilu_eil_xfrfsm xfrfsm | |
| 589 | ( .clk (clk), | |
| 590 | .rst_l (rst_l), | |
| 591 | .d2p_ehb_dpar_0 (d2p_ehb_dpar_0), | |
| 592 | .d2p_ehb_dpar (d2p_ehb_dpar), | |
| 593 | .ilu_diagnos_ehi_trig_hw_clr (ilu_diagnos_ehi_trig_hw_clr), | |
| 594 | .ilu_diagnos_ehi_trig_hw_read (ilu_diagnos_ehi_trig_hw_read), | |
| 595 | .ilu_diagnos_ehi_par_hw_read (ilu_diagnos_ehi_par_hw_read), | |
| 596 | .d2p_ehb_we (d2p_ehb_we), | |
| 597 | .n_d2p_ehb_we (n_d2p_ehb_we), | |
| 598 | .rcd_empty (rcd_empty), | |
| 599 | .rcd_deq (rcd_deq), | |
| 600 | .y2k_rcd_deq (y2k_rcd_deq), | |
| 601 | .xfrfsm_is_wfh (xfrfsm_is_wfh), | |
| 602 | .data_start (data_start), | |
| 603 | .data_done (data_done), | |
| 604 | .only_one_rd_and_can_move (only_one_rd_and_can_move), | |
| 605 | .ehb_full (ehb_full), | |
| 606 | .has_payld (has_payld), | |
| 607 | .cib2eil_drain (cib2eil_drain), | |
| 608 | .xfrfsm_is_idle (xfrfsm_is_idle), | |
| 609 | .xfr_state (xfr_state)); | |
| 610 | ||
| 611 | // record builder | |
| 612 | dmu_ilu_eil_rcdbldr rcdbldr | |
| 613 | ( .clk (clk), | |
| 614 | .rst_l (rst_l), | |
| 615 | .d2p_ehb_data (d2p_ehb_data), | |
| 616 | .d2p_ehb_dpar (d2p_ehb_dpar_0), | |
| 617 | .k2y_rcd (k2y_rcd), | |
| 618 | .k2y_rcd_enq (k2y_rcd_enq), | |
| 619 | .rcd_deq (rcd_deq), | |
| 620 | .rcd_empty (rcd_empty), | |
| 621 | .eil2isb_log (eil2isb_log), | |
| 622 | .eil2isb_tag (eil2isb_tag), | |
| 623 | .eil2isb_low_addr (eil2isb_low_addr), | |
| 624 | .has_payld (has_payld), | |
| 625 | .rcd_is_cpl (rcd_is_cpl), | |
| 626 | .rcd_is_cpl_reg (rcd_is_cpl_reg), | |
| 627 | .rcd_is_pio_mwr (rcd_is_pio_mwr), | |
| 628 | .pio_tag (pio_tag), | |
| 629 | .align_addr (align_addr), | |
| 630 | .payld_len (payld_len), | |
| 631 | .d_ptr_in (d_ptr_in), | |
| 632 | .dou_sbd_vld_rcdbldr (dou_sbd_vld_rcdbldr), | |
| 633 | .dou_sbd_err_rcdbldr (dou_sbd_err_rcdbldr), | |
| 634 | .xfrfsm_is_wfh (xfrfsm_is_wfh), | |
| 635 | .data_start (data_start), | |
| 636 | .data_done (data_done), | |
| 637 | .log_ep_history (log_ep_history), | |
| 638 | .ep_history (ep_history), | |
| 639 | .log_dou_sbd_err (log_dou_sbd_err), | |
| 640 | .take_care_rcd_ep (take_care_rcd_ep), | |
| 641 | .out_rcd_ep (out_rcd_ep)); | |
| 642 | ||
| 643 | endmodule |