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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: dmu_ilu_iil_parchk.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | module dmu_ilu_iil_parchk ( | |
36 | clk, | |
37 | rst_l, | |
38 | p2d_ihb_dpar, | |
39 | is_ihb_rcd, | |
40 | iil2cib_ihb_pe, | |
41 | in_ihb_rcd); | |
42 | ||
43 | // >>>>>>>>>>>>>>>>>>>>>>>>> Port Declarations <<<<<<<<<<<<<<<<<<<<<<<<<<<<<< | |
44 | ||
45 | //--------------------------------------------------------------------- | |
46 | // Clock and Reset Signals | |
47 | //--------------------------------------------------------------------- | |
48 | input clk; // input clock | |
49 | input rst_l; // synchronous reset | |
50 | ||
51 | //--------------------------------------------------------------------- | |
52 | // IHB interface | |
53 | //--------------------------------------------------------------------- | |
54 | input [3:0] p2d_ihb_dpar; // TLP header record parity | |
55 | ||
56 | //--------------------------------------------------------------------- | |
57 | // talk to rcdbldr | |
58 | //--------------------------------------------------------------------- | |
59 | input [`FIRE_IHB_REC_WDTH-1:0] in_ihb_rcd; | |
60 | ||
61 | //--------------------------------------------------------------------- | |
62 | // IIL internal interface | |
63 | //--------------------------------------------------------------------- | |
64 | output iil2cib_ihb_pe; | |
65 | input is_ihb_rcd; | |
66 | ||
67 | // >>>>>>>>>>>>>>>>>>>>>>>>> Data Type Declarations <<<<<<<<<<<<<<<<<<<<<<<<< | |
68 | ||
69 | // ~~~~~~~~~~~~~~~~~~~~~~~~~ REGISTER - FLOPS ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
70 | reg [3:0] in_ihb_dpar; // flop input p2d_ihb_dpar | |
71 | ||
72 | // ~~~~~~~~~~~~~~~~~~~~~~~~~ NETS ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
73 | wire [3:0] calc_ihb_dpar; // calulated parity from p2d_ihb_data | |
74 | ||
75 | // >>>>>>>>>>>>>>>>>>>>>>>>> Zero In Checkers <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< | |
76 | ||
77 | /* #0in odd_parity -var {in_ihb_rcd[127:96], in_ihb_dpar[3]} | |
78 | -name ilu_iil_odd_parchk_3 | |
79 | -active is_ihb_rcd */ | |
80 | /* #0in odd_parity -var {in_ihb_rcd[95:64], in_ihb_dpar[2]} | |
81 | -name ilu_iil_odd_parchk_2 | |
82 | -active is_ihb_rcd */ | |
83 | /* #0in odd_parity -var {in_ihb_rcd[63:32], in_ihb_dpar[1]} | |
84 | -name ilu_iil_odd_parchk_1 | |
85 | -active is_ihb_rcd */ | |
86 | /* #0in odd_parity -var {in_ihb_rcd[31:0], in_ihb_dpar[0]} | |
87 | -name ilu_iil_odd_parchk_0 | |
88 | -active is_ihb_rcd */ | |
89 | ||
90 | // >>>>>>>>>>>>>>>>>>>>>>>>> Function Declarations <<<<<<<<<<<<<<<<<<<<<<<<<< | |
91 | ||
92 | function [3:0] calc_parity; // odd parity | |
93 | input [127:0] data; | |
94 | begin | |
95 | calc_parity[3] = ~(^data[127:96]); | |
96 | calc_parity[2] = ~(^data[95:64]); | |
97 | calc_parity[1] = ~(^data[63:32]); | |
98 | calc_parity[0] = ~(^data[31:0]); | |
99 | end | |
100 | endfunction // calc_parity | |
101 | ||
102 | ||
103 | // >>>>>>>>>>>>>>>>>>>>>>>>> RTL/Behavioral Model <<<<<<<<<<<<<<<<<<<<<<<<<<< | |
104 | ||
105 | assign iil2cib_ihb_pe = is_ihb_rcd & (|(in_ihb_dpar ^ calc_ihb_dpar)); // odd parity | |
106 | ||
107 | assign calc_ihb_dpar = calc_parity(in_ihb_rcd); | |
108 | ||
109 | always @ (posedge clk) | |
110 | if(~rst_l) begin | |
111 | in_ihb_dpar <= {4{1'b0}}; | |
112 | end | |
113 | else begin | |
114 | in_ihb_dpar <= p2d_ihb_dpar; | |
115 | end | |
116 | ||
117 | endmodule // dmu_ilu_iil_parchk | |
118 | ||
119 | ||
120 |