projects / OpenSPARC-T2-DV / blame
? search:
summary | tags | clone url | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / mcu / rtl / mcu_bscan_ctl.v
CommitLineData
86530b38
AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: mcu_bscan_ctl.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35module mcu_bscan_ctl (
36 mcu_fsr0_cfgtx_bstx,
37 mcu_fsr1_cfgtx_bstx,
38 fsr0_mcu_stsrx_bsrxp,
39 fsr1_mcu_stsrx_bsrxp,
40 fsr0_mcu_stsrx_bsrxn,
41 fsr1_mcu_stsrx_bsrxn,
42 mcu_sbs_scan_in,
43 mcu_sbs_scan_out,
44 tcu_sbs_scan_en,
45 tcu_sbs_clk,
46 tcu_sbs_uclk,
47 tcu_sbs_aclk,
48 tcu_sbs_bclk);
49wire se;
50wire siclk;
51wire soclk;
52wire updateclk;
53wire mode;
54wire muxd;
55wire highz_n;
56wire l1clk;
57wire bstx00_so;
58wire bstx01_so;
59wire bstx02_so;
60wire bstx03_so;
61wire bstx04_so;
62wire bstx05_so;
63wire bstx06_so;
64wire bstx07_so;
65wire bstx08_so;
66wire bstx09_so;
67wire bstx10_so;
68wire bstx11_so;
69wire bstx12_so;
70wire bstx13_so;
71wire bstx14_so;
72wire bstx15_so;
73wire bstx16_so;
74wire bstx17_so;
75wire bstx18_so;
76wire bstx19_so;
77wire bsrxp00_so;
78wire [55:0] q_unused;
79wire bsrxp01_so;
80wire bsrxp02_so;
81wire bsrxp03_so;
82wire bsrxp04_so;
83wire bsrxp05_so;
84wire bsrxp06_so;
85wire bsrxp07_so;
86wire bsrxp08_so;
87wire bsrxp09_so;
88wire bsrxp10_so;
89wire bsrxp11_so;
90wire bsrxp12_so;
91wire bsrxp13_so;
92wire bsrxn00_so;
93wire bsrxn01_so;
94wire bsrxn02_so;
95wire bsrxn03_so;
96wire bsrxn04_so;
97wire bsrxn05_so;
98wire bsrxn06_so;
99wire bsrxn07_so;
100wire bsrxn08_so;
101wire bsrxn09_so;
102wire bsrxn10_so;
103wire bsrxn11_so;
104wire bsrxn12_so;
105wire bsrxn13_so;
106wire bsrxp14_so;
107wire bsrxp15_so;
108wire bsrxp16_so;
109wire bsrxp17_so;
110wire bsrxp18_so;
111wire bsrxp19_so;
112wire bsrxp20_so;
113wire bsrxp21_so;
114wire bsrxp22_so;
115wire bsrxp23_so;
116wire bsrxp24_so;
117wire bsrxp25_so;
118wire bsrxp26_so;
119wire bsrxp27_so;
120wire bsrxn14_so;
121wire bsrxn15_so;
122wire bsrxn16_so;
123wire bsrxn17_so;
124wire bsrxn18_so;
125wire bsrxn19_so;
126wire bsrxn20_so;
127wire bsrxn21_so;
128wire bsrxn22_so;
129wire bsrxn23_so;
130wire bsrxn24_so;
131wire bsrxn25_so;
132wire bsrxn26_so;
133
134
135output [9:0] mcu_fsr0_cfgtx_bstx;
136output [9:0] mcu_fsr1_cfgtx_bstx;
137
138input [13:0] fsr0_mcu_stsrx_bsrxp;
139input [13:0] fsr1_mcu_stsrx_bsrxp;
140input [13:0] fsr0_mcu_stsrx_bsrxn;
141input [13:0] fsr1_mcu_stsrx_bsrxn;
142
143input mcu_sbs_scan_in;
144output mcu_sbs_scan_out;
145input tcu_sbs_scan_en;
146input tcu_sbs_clk;
147input tcu_sbs_uclk;
148input tcu_sbs_aclk;
149input tcu_sbs_bclk;
150
151assign se = tcu_sbs_scan_en;
152assign siclk = tcu_sbs_aclk;
153assign soclk = tcu_sbs_bclk;
154assign updateclk = tcu_sbs_uclk;
155
156assign mode = 1'b0;
157assign muxd = 1'b0;
158assign highz_n = 1'b1;
159
160mcu_bscan_ctl_l1clkhdr_ctl_macro clkgen (
161 .l2clk(tcu_sbs_clk),
162 .l1en(1'b1),
163 .pce_ov(1'b1),
164 .stop(1'b0),
165 .l1clk(l1clk),
166 .se(se));
167
168// TX 0
169cl_sc1_bs_cell2_4x bstx00 (
170 .q(mcu_fsr0_cfgtx_bstx[0]),
171 .so(bstx00_so),
172 .d(1'b0),
173 .l1clk(1'b1),
174 .si(mcu_sbs_scan_in),
175 .siclk(siclk),
176 .soclk(soclk),
177 .updateclk(updateclk),
178 .mode(mode),
179 .muxd(muxd),
180 .highz_n(highz_n));
181
182cl_sc1_bs_cell2_4x bstx01 (
183 .q(mcu_fsr0_cfgtx_bstx[1]),
184 .so(bstx01_so),
185 .d(1'b0),
186 .l1clk(1'b1),
187 .si(bstx00_so),
188 .siclk(siclk),
189 .soclk(soclk),
190 .updateclk(updateclk),
191 .mode(mode),
192 .muxd(muxd),
193 .highz_n(highz_n));
194
195cl_sc1_bs_cell2_4x bstx02 (
196 .q(mcu_fsr0_cfgtx_bstx[2]),
197 .so(bstx02_so),
198 .d(1'b0),
199 .l1clk(1'b1),
200 .si(bstx01_so),
201 .siclk(siclk),
202 .soclk(soclk),
203 .updateclk(updateclk),
204 .mode(mode),
205 .muxd(muxd),
206 .highz_n(highz_n));
207
208cl_sc1_bs_cell2_4x bstx03 (
209 .q(mcu_fsr0_cfgtx_bstx[3]),
210 .so(bstx03_so),
211 .d(1'b0),
212 .l1clk(1'b1),
213 .si(bstx02_so),
214 .siclk(siclk),
215 .soclk(soclk),
216 .updateclk(updateclk),
217 .mode(mode),
218 .muxd(muxd),
219 .highz_n(highz_n));
220
221cl_sc1_bs_cell2_4x bstx04 (
222 .q(mcu_fsr0_cfgtx_bstx[4]),
223 .so(bstx04_so),
224 .d(1'b0),
225 .l1clk(1'b1),
226 .si(bstx03_so),
227 .siclk(siclk),
228 .soclk(soclk),
229 .updateclk(updateclk),
230 .mode(mode),
231 .muxd(muxd),
232 .highz_n(highz_n));
233
234cl_sc1_bs_cell2_4x bstx05 (
235 .q(mcu_fsr0_cfgtx_bstx[5]),
236 .so(bstx05_so),
237 .d(1'b0),
238 .l1clk(1'b1),
239 .si(bstx04_so),
240 .siclk(siclk),
241 .soclk(soclk),
242 .updateclk(updateclk),
243 .mode(mode),
244 .muxd(muxd),
245 .highz_n(highz_n));
246
247cl_sc1_bs_cell2_4x bstx06 (
248 .q(mcu_fsr0_cfgtx_bstx[6]),
249 .so(bstx06_so),
250 .d(1'b0),
251 .l1clk(1'b1),
252 .si(bstx05_so),
253 .siclk(siclk),
254 .soclk(soclk),
255 .updateclk(updateclk),
256 .mode(mode),
257 .muxd(muxd),
258 .highz_n(highz_n));
259
260cl_sc1_bs_cell2_4x bstx07 (
261 .q(mcu_fsr0_cfgtx_bstx[7]),
262 .so(bstx07_so),
263 .d(1'b0),
264 .l1clk(1'b1),
265 .si(bstx06_so),
266 .siclk(siclk),
267 .soclk(soclk),
268 .updateclk(updateclk),
269 .mode(mode),
270 .muxd(muxd),
271 .highz_n(highz_n));
272
273cl_sc1_bs_cell2_4x bstx08 (
274 .q(mcu_fsr0_cfgtx_bstx[8]),
275 .so(bstx08_so),
276 .d(1'b0),
277 .l1clk(1'b1),
278 .si(bstx07_so),
279 .siclk(siclk),
280 .soclk(soclk),
281 .updateclk(updateclk),
282 .mode(mode),
283 .muxd(muxd),
284 .highz_n(highz_n));
285
286cl_sc1_bs_cell2_4x bstx09 (
287 .q(mcu_fsr0_cfgtx_bstx[9]),
288 .so(bstx09_so),
289 .d(1'b0),
290 .l1clk(1'b1),
291 .si(bstx08_so),
292 .siclk(siclk),
293 .soclk(soclk),
294 .updateclk(updateclk),
295 .mode(mode),
296 .muxd(muxd),
297 .highz_n(highz_n));
298
299// TX 1
300cl_sc1_bs_cell2_4x bstx10 (
301 .q(mcu_fsr1_cfgtx_bstx[0]),
302 .so(bstx10_so),
303 .d(1'b0),
304 .l1clk(1'b1),
305 .si(bstx09_so),
306 .siclk(siclk),
307 .soclk(soclk),
308 .updateclk(updateclk),
309 .mode(mode),
310 .muxd(muxd),
311 .highz_n(highz_n));
312
313cl_sc1_bs_cell2_4x bstx11 (
314 .q(mcu_fsr1_cfgtx_bstx[1]),
315 .so(bstx11_so),
316 .d(1'b0),
317 .l1clk(1'b1),
318 .si(bstx10_so),
319 .siclk(siclk),
320 .soclk(soclk),
321 .updateclk(updateclk),
322 .mode(mode),
323 .muxd(muxd),
324 .highz_n(highz_n));
325
326cl_sc1_bs_cell2_4x bstx12 (
327 .q(mcu_fsr1_cfgtx_bstx[2]),
328 .so(bstx12_so),
329 .d(1'b0),
330 .l1clk(1'b1),
331 .si(bstx11_so),
332 .siclk(siclk),
333 .soclk(soclk),
334 .updateclk(updateclk),
335 .mode(mode),
336 .muxd(muxd),
337 .highz_n(highz_n));
338
339cl_sc1_bs_cell2_4x bstx13 (
340 .q(mcu_fsr1_cfgtx_bstx[3]),
341 .so(bstx13_so),
342 .d(1'b0),
343 .l1clk(1'b1),
344 .si(bstx12_so),
345 .siclk(siclk),
346 .soclk(soclk),
347 .updateclk(updateclk),
348 .mode(mode),
349 .muxd(muxd),
350 .highz_n(highz_n));
351
352cl_sc1_bs_cell2_4x bstx14 (
353 .q(mcu_fsr1_cfgtx_bstx[4]),
354 .so(bstx14_so),
355 .d(1'b0),
356 .l1clk(1'b1),
357 .si(bstx13_so),
358 .siclk(siclk),
359 .soclk(soclk),
360 .updateclk(updateclk),
361 .mode(mode),
362 .muxd(muxd),
363 .highz_n(highz_n));
364
365cl_sc1_bs_cell2_4x bstx15 (
366 .q(mcu_fsr1_cfgtx_bstx[5]),
367 .so(bstx15_so),
368 .d(1'b0),
369 .l1clk(1'b1),
370 .si(bstx14_so),
371 .siclk(siclk),
372 .soclk(soclk),
373 .updateclk(updateclk),
374 .mode(mode),
375 .muxd(muxd),
376 .highz_n(highz_n));
377
378cl_sc1_bs_cell2_4x bstx16 (
379 .q(mcu_fsr1_cfgtx_bstx[6]),
380 .so(bstx16_so),
381 .d(1'b0),
382 .l1clk(1'b1),
383 .si(bstx15_so),
384 .siclk(siclk),
385 .soclk(soclk),
386 .updateclk(updateclk),
387 .mode(mode),
388 .muxd(muxd),
389 .highz_n(highz_n));
390
391cl_sc1_bs_cell2_4x bstx17 (
392 .q(mcu_fsr1_cfgtx_bstx[7]),
393 .so(bstx17_so),
394 .d(1'b0),
395 .l1clk(1'b1),
396 .si(bstx16_so),
397 .siclk(siclk),
398 .soclk(soclk),
399 .updateclk(updateclk),
400 .mode(mode),
401 .muxd(muxd),
402 .highz_n(highz_n));
403
404cl_sc1_bs_cell2_4x bstx18 (
405 .q(mcu_fsr1_cfgtx_bstx[8]),
406 .so(bstx18_so),
407 .d(1'b0),
408 .l1clk(1'b1),
409 .si(bstx17_so),
410 .siclk(siclk),
411 .soclk(soclk),
412 .updateclk(updateclk),
413 .mode(mode),
414 .muxd(muxd),
415 .highz_n(highz_n));
416
417cl_sc1_bs_cell2_4x bstx19 (
418 .q(mcu_fsr1_cfgtx_bstx[9]),
419 .so(bstx19_so),
420 .d(1'b0),
421 .l1clk(1'b1),
422 .si(bstx18_so),
423 .siclk(siclk),
424 .soclk(soclk),
425 .updateclk(updateclk),
426 .mode(mode),
427 .muxd(muxd),
428 .highz_n(highz_n));
429
430// RXP 0
431cl_sc1_bs_cell2_4x bsrxp00 (
432 .d(fsr0_mcu_stsrx_bsrxp[0]),
433 .so(bsrxp00_so),
434 .q(q_unused[0]),
435 .l1clk(l1clk),
436 .si(bstx19_so),
437 .siclk(siclk),
438 .soclk(soclk),
439 .updateclk(updateclk),
440 .mode(mode),
441 .muxd(muxd),
442 .highz_n(highz_n));
443
444cl_sc1_bs_cell2_4x bsrxp01 (
445 .d(fsr0_mcu_stsrx_bsrxp[1]),
446 .so(bsrxp01_so),
447 .q(q_unused[1]),
448 .l1clk(l1clk),
449 .si(bsrxp00_so),
450 .siclk(siclk),
451 .soclk(soclk),
452 .updateclk(updateclk),
453 .mode(mode),
454 .muxd(muxd),
455 .highz_n(highz_n));
456
457cl_sc1_bs_cell2_4x bsrxp02 (
458 .d(fsr0_mcu_stsrx_bsrxp[2]),
459 .so(bsrxp02_so),
460 .q(q_unused[2]),
461 .l1clk(l1clk),
462 .si(bsrxp01_so),
463 .siclk(siclk),
464 .soclk(soclk),
465 .updateclk(updateclk),
466 .mode(mode),
467 .muxd(muxd),
468 .highz_n(highz_n));
469
470cl_sc1_bs_cell2_4x bsrxp03 (
471 .d(fsr0_mcu_stsrx_bsrxp[3]),
472 .so(bsrxp03_so),
473 .q(q_unused[3]),
474 .l1clk(l1clk),
475 .si(bsrxp02_so),
476 .siclk(siclk),
477 .soclk(soclk),
478 .updateclk(updateclk),
479 .mode(mode),
480 .muxd(muxd),
481 .highz_n(highz_n));
482
483cl_sc1_bs_cell2_4x bsrxp04 (
484 .d(fsr0_mcu_stsrx_bsrxp[4]),
485 .so(bsrxp04_so),
486 .q(q_unused[4]),
487 .l1clk(l1clk),
488 .si(bsrxp03_so),
489 .siclk(siclk),
490 .soclk(soclk),
491 .updateclk(updateclk),
492 .mode(mode),
493 .muxd(muxd),
494 .highz_n(highz_n));
495
496cl_sc1_bs_cell2_4x bsrxp05 (
497 .d(fsr0_mcu_stsrx_bsrxp[5]),
498 .so(bsrxp05_so),
499 .q(q_unused[5]),
500 .l1clk(l1clk),
501 .si(bsrxp04_so),
502 .siclk(siclk),
503 .soclk(soclk),
504 .updateclk(updateclk),
505 .mode(mode),
506 .muxd(muxd),
507 .highz_n(highz_n));
508
509cl_sc1_bs_cell2_4x bsrxp06 (
510 .d(fsr0_mcu_stsrx_bsrxp[6]),
511 .so(bsrxp06_so),
512 .q(q_unused[6]),
513 .l1clk(l1clk),
514 .si(bsrxp05_so),
515 .siclk(siclk),
516 .soclk(soclk),
517 .updateclk(updateclk),
518 .mode(mode),
519 .muxd(muxd),
520 .highz_n(highz_n));
521
522cl_sc1_bs_cell2_4x bsrxp07 (
523 .d(fsr0_mcu_stsrx_bsrxp[7]),
524 .so(bsrxp07_so),
525 .q(q_unused[7]),
526 .l1clk(l1clk),
527 .si(bsrxp06_so),
528 .siclk(siclk),
529 .soclk(soclk),
530 .updateclk(updateclk),
531 .mode(mode),
532 .muxd(muxd),
533 .highz_n(highz_n));
534
535cl_sc1_bs_cell2_4x bsrxp08 (
536 .d(fsr0_mcu_stsrx_bsrxp[8]),
537 .so(bsrxp08_so),
538 .q(q_unused[8]),
539 .l1clk(l1clk),
540 .si(bsrxp07_so),
541 .siclk(siclk),
542 .soclk(soclk),
543 .updateclk(updateclk),
544 .mode(mode),
545 .muxd(muxd),
546 .highz_n(highz_n));
547
548cl_sc1_bs_cell2_4x bsrxp09 (
549 .d(fsr0_mcu_stsrx_bsrxp[9]),
550 .so(bsrxp09_so),
551 .q(q_unused[9]),
552 .l1clk(l1clk),
553 .si(bsrxp08_so),
554 .siclk(siclk),
555 .soclk(soclk),
556 .updateclk(updateclk),
557 .mode(mode),
558 .muxd(muxd),
559 .highz_n(highz_n));
560
561cl_sc1_bs_cell2_4x bsrxp10 (
562 .d(fsr0_mcu_stsrx_bsrxp[10]),
563 .so(bsrxp10_so),
564 .q(q_unused[10]),
565 .l1clk(l1clk),
566 .si(bsrxp09_so),
567 .siclk(siclk),
568 .soclk(soclk),
569 .updateclk(updateclk),
570 .mode(mode),
571 .muxd(muxd),
572 .highz_n(highz_n));
573
574cl_sc1_bs_cell2_4x bsrxp11 (
575 .d(fsr0_mcu_stsrx_bsrxp[11]),
576 .so(bsrxp11_so),
577 .q(q_unused[11]),
578 .l1clk(l1clk),
579 .si(bsrxp10_so),
580 .siclk(siclk),
581 .soclk(soclk),
582 .updateclk(updateclk),
583 .mode(mode),
584 .muxd(muxd),
585 .highz_n(highz_n));
586
587cl_sc1_bs_cell2_4x bsrxp12 (
588 .d(fsr0_mcu_stsrx_bsrxp[12]),
589 .so(bsrxp12_so),
590 .q(q_unused[12]),
591 .l1clk(l1clk),
592 .si(bsrxp11_so),
593 .siclk(siclk),
594 .soclk(soclk),
595 .updateclk(updateclk),
596 .mode(mode),
597 .muxd(muxd),
598 .highz_n(highz_n));
599
600cl_sc1_bs_cell2_4x bsrxp13 (
601 .d(fsr0_mcu_stsrx_bsrxp[13]),
602 .so(bsrxp13_so),
603 .q(q_unused[13]),
604 .l1clk(l1clk),
605 .si(bsrxp12_so),
606 .siclk(siclk),
607 .soclk(soclk),
608 .updateclk(updateclk),
609 .mode(mode),
610 .muxd(muxd),
611 .highz_n(highz_n));
612
613// RXN 0
614cl_sc1_bs_cell2_4x bsrxn00 (
615 .d(fsr0_mcu_stsrx_bsrxn[0]),
616 .so(bsrxn00_so),
617 .q(q_unused[14]),
618 .l1clk(l1clk),
619 .si(bsrxp13_so),
620 .siclk(siclk),
621 .soclk(soclk),
622 .updateclk(updateclk),
623 .mode(mode),
624 .muxd(muxd),
625 .highz_n(highz_n));
626
627cl_sc1_bs_cell2_4x bsrxn01 (
628 .d(fsr0_mcu_stsrx_bsrxn[1]),
629 .so(bsrxn01_so),
630 .q(q_unused[15]),
631 .l1clk(l1clk),
632 .si(bsrxn00_so),
633 .siclk(siclk),
634 .soclk(soclk),
635 .updateclk(updateclk),
636 .mode(mode),
637 .muxd(muxd),
638 .highz_n(highz_n));
639
640cl_sc1_bs_cell2_4x bsrxn02 (
641 .d(fsr0_mcu_stsrx_bsrxn[2]),
642 .so(bsrxn02_so),
643 .q(q_unused[16]),
644 .l1clk(l1clk),
645 .si(bsrxn01_so),
646 .siclk(siclk),
647 .soclk(soclk),
648 .updateclk(updateclk),
649 .mode(mode),
650 .muxd(muxd),
651 .highz_n(highz_n));
652
653cl_sc1_bs_cell2_4x bsrxn03 (
654 .d(fsr0_mcu_stsrx_bsrxn[3]),
655 .so(bsrxn03_so),
656 .q(q_unused[17]),
657 .l1clk(l1clk),
658 .si(bsrxn02_so),
659 .siclk(siclk),
660 .soclk(soclk),
661 .updateclk(updateclk),
662 .mode(mode),
663 .muxd(muxd),
664 .highz_n(highz_n));
665
666cl_sc1_bs_cell2_4x bsrxn04 (
667 .d(fsr0_mcu_stsrx_bsrxn[4]),
668 .so(bsrxn04_so),
669 .q(q_unused[18]),
670 .l1clk(l1clk),
671 .si(bsrxn03_so),
672 .siclk(siclk),
673 .soclk(soclk),
674 .updateclk(updateclk),
675 .mode(mode),
676 .muxd(muxd),
677 .highz_n(highz_n));
678
679cl_sc1_bs_cell2_4x bsrxn05 (
680 .d(fsr0_mcu_stsrx_bsrxn[5]),
681 .so(bsrxn05_so),
682 .q(q_unused[19]),
683 .l1clk(l1clk),
684 .si(bsrxn04_so),
685 .siclk(siclk),
686 .soclk(soclk),
687 .updateclk(updateclk),
688 .mode(mode),
689 .muxd(muxd),
690 .highz_n(highz_n));
691
692cl_sc1_bs_cell2_4x bsrxn06 (
693 .d(fsr0_mcu_stsrx_bsrxn[6]),
694 .so(bsrxn06_so),
695 .q(q_unused[20]),
696 .l1clk(l1clk),
697 .si(bsrxn05_so),
698 .siclk(siclk),
699 .soclk(soclk),
700 .updateclk(updateclk),
701 .mode(mode),
702 .muxd(muxd),
703 .highz_n(highz_n));
704
705cl_sc1_bs_cell2_4x bsrxn07 (
706 .d(fsr0_mcu_stsrx_bsrxn[7]),
707 .so(bsrxn07_so),
708 .q(q_unused[21]),
709 .l1clk(l1clk),
710 .si(bsrxn06_so),
711 .siclk(siclk),
712 .soclk(soclk),
713 .updateclk(updateclk),
714 .mode(mode),
715 .muxd(muxd),
716 .highz_n(highz_n));
717
718cl_sc1_bs_cell2_4x bsrxn08 (
719 .d(fsr0_mcu_stsrx_bsrxn[8]),
720 .so(bsrxn08_so),
721 .q(q_unused[22]),
722 .l1clk(l1clk),
723 .si(bsrxn07_so),
724 .siclk(siclk),
725 .soclk(soclk),
726 .updateclk(updateclk),
727 .mode(mode),
728 .muxd(muxd),
729 .highz_n(highz_n));
730
731cl_sc1_bs_cell2_4x bsrxn09 (
732 .d(fsr0_mcu_stsrx_bsrxn[9]),
733 .so(bsrxn09_so),
734 .q(q_unused[23]),
735 .l1clk(l1clk),
736 .si(bsrxn08_so),
737 .siclk(siclk),
738 .soclk(soclk),
739 .updateclk(updateclk),
740 .mode(mode),
741 .muxd(muxd),
742 .highz_n(highz_n));
743
744cl_sc1_bs_cell2_4x bsrxn10 (
745 .d(fsr0_mcu_stsrx_bsrxn[10]),
746 .so(bsrxn10_so),
747 .q(q_unused[24]),
748 .l1clk(l1clk),
749 .si(bsrxn09_so),
750 .siclk(siclk),
751 .soclk(soclk),
752 .updateclk(updateclk),
753 .mode(mode),
754 .muxd(muxd),
755 .highz_n(highz_n));
756
757cl_sc1_bs_cell2_4x bsrxn11 (
758 .d(fsr0_mcu_stsrx_bsrxn[11]),
759 .so(bsrxn11_so),
760 .q(q_unused[25]),
761 .l1clk(l1clk),
762 .si(bsrxn10_so),
763 .siclk(siclk),
764 .soclk(soclk),
765 .updateclk(updateclk),
766 .mode(mode),
767 .muxd(muxd),
768 .highz_n(highz_n));
769
770cl_sc1_bs_cell2_4x bsrxn12 (
771 .d(fsr0_mcu_stsrx_bsrxn[12]),
772 .so(bsrxn12_so),
773 .q(q_unused[26]),
774 .l1clk(l1clk),
775 .si(bsrxn11_so),
776 .siclk(siclk),
777 .soclk(soclk),
778 .updateclk(updateclk),
779 .mode(mode),
780 .muxd(muxd),
781 .highz_n(highz_n));
782
783cl_sc1_bs_cell2_4x bsrxn13 (
784 .d(fsr0_mcu_stsrx_bsrxn[13]),
785 .so(bsrxn13_so),
786 .q(q_unused[27]),
787 .l1clk(l1clk),
788 .si(bsrxn12_so),
789 .siclk(siclk),
790 .soclk(soclk),
791 .updateclk(updateclk),
792 .mode(mode),
793 .muxd(muxd),
794 .highz_n(highz_n));
795
796// RXP 1
797cl_sc1_bs_cell2_4x bsrxp14 (
798 .d(fsr1_mcu_stsrx_bsrxp[0]),
799 .so(bsrxp14_so),
800 .q(q_unused[28]),
801 .l1clk(l1clk),
802 .si(bsrxn13_so),
803 .siclk(siclk),
804 .soclk(soclk),
805 .updateclk(updateclk),
806 .mode(mode),
807 .muxd(muxd),
808 .highz_n(highz_n));
809
810cl_sc1_bs_cell2_4x bsrxp15 (
811 .d(fsr1_mcu_stsrx_bsrxp[1]),
812 .so(bsrxp15_so),
813 .q(q_unused[29]),
814 .l1clk(l1clk),
815 .si(bsrxp14_so),
816 .siclk(siclk),
817 .soclk(soclk),
818 .updateclk(updateclk),
819 .mode(mode),
820 .muxd(muxd),
821 .highz_n(highz_n));
822
823cl_sc1_bs_cell2_4x bsrxp16 (
824 .d(fsr1_mcu_stsrx_bsrxp[2]),
825 .so(bsrxp16_so),
826 .q(q_unused[30]),
827 .l1clk(l1clk),
828 .si(bsrxp15_so),
829 .siclk(siclk),
830 .soclk(soclk),
831 .updateclk(updateclk),
832 .mode(mode),
833 .muxd(muxd),
834 .highz_n(highz_n));
835
836cl_sc1_bs_cell2_4x bsrxp17 (
837 .d(fsr1_mcu_stsrx_bsrxp[3]),
838 .so(bsrxp17_so),
839 .q(q_unused[31]),
840 .l1clk(l1clk),
841 .si(bsrxp16_so),
842 .siclk(siclk),
843 .soclk(soclk),
844 .updateclk(updateclk),
845 .mode(mode),
846 .muxd(muxd),
847 .highz_n(highz_n));
848
849cl_sc1_bs_cell2_4x bsrxp18 (
850 .d(fsr1_mcu_stsrx_bsrxp[4]),
851 .so(bsrxp18_so),
852 .q(q_unused[32]),
853 .l1clk(l1clk),
854 .si(bsrxp17_so),
855 .siclk(siclk),
856 .soclk(soclk),
857 .updateclk(updateclk),
858 .mode(mode),
859 .muxd(muxd),
860 .highz_n(highz_n));
861
862cl_sc1_bs_cell2_4x bsrxp19 (
863 .d(fsr1_mcu_stsrx_bsrxp[5]),
864 .so(bsrxp19_so),
865 .q(q_unused[33]),
866 .l1clk(l1clk),
867 .si(bsrxp18_so),
868 .siclk(siclk),
869 .soclk(soclk),
870 .updateclk(updateclk),
871 .mode(mode),
872 .muxd(muxd),
873 .highz_n(highz_n));
874
875cl_sc1_bs_cell2_4x bsrxp20 (
876 .d(fsr1_mcu_stsrx_bsrxp[6]),
877 .so(bsrxp20_so),
878 .q(q_unused[34]),
879 .l1clk(l1clk),
880 .si(bsrxp19_so),
881 .siclk(siclk),
882 .soclk(soclk),
883 .updateclk(updateclk),
884 .mode(mode),
885 .muxd(muxd),
886 .highz_n(highz_n));
887
888cl_sc1_bs_cell2_4x bsrxp21 (
889 .d(fsr1_mcu_stsrx_bsrxp[7]),
890 .so(bsrxp21_so),
891 .q(q_unused[35]),
892 .l1clk(l1clk),
893 .si(bsrxp20_so),
894 .siclk(siclk),
895 .soclk(soclk),
896 .updateclk(updateclk),
897 .mode(mode),
898 .muxd(muxd),
899 .highz_n(highz_n));
900
901cl_sc1_bs_cell2_4x bsrxp22 (
902 .d(fsr1_mcu_stsrx_bsrxp[8]),
903 .so(bsrxp22_so),
904 .q(q_unused[36]),
905 .l1clk(l1clk),
906 .si(bsrxp21_so),
907 .siclk(siclk),
908 .soclk(soclk),
909 .updateclk(updateclk),
910 .mode(mode),
911 .muxd(muxd),
912 .highz_n(highz_n));
913
914cl_sc1_bs_cell2_4x bsrxp23 (
915 .d(fsr1_mcu_stsrx_bsrxp[9]),
916 .so(bsrxp23_so),
917 .q(q_unused[37]),
918 .l1clk(l1clk),
919 .si(bsrxp22_so),
920 .siclk(siclk),
921 .soclk(soclk),
922 .updateclk(updateclk),
923 .mode(mode),
924 .muxd(muxd),
925 .highz_n(highz_n));
926
927cl_sc1_bs_cell2_4x bsrxp24 (
928 .d(fsr1_mcu_stsrx_bsrxp[10]),
929 .so(bsrxp24_so),
930 .q(q_unused[38]),
931 .l1clk(l1clk),
932 .si(bsrxp23_so),
933 .siclk(siclk),
934 .soclk(soclk),
935 .updateclk(updateclk),
936 .mode(mode),
937 .muxd(muxd),
938 .highz_n(highz_n));
939
940cl_sc1_bs_cell2_4x bsrxp25 (
941 .d(fsr1_mcu_stsrx_bsrxp[11]),
942 .so(bsrxp25_so),
943 .q(q_unused[39]),
944 .l1clk(l1clk),
945 .si(bsrxp24_so),
946 .siclk(siclk),
947 .soclk(soclk),
948 .updateclk(updateclk),
949 .mode(mode),
950 .muxd(muxd),
951 .highz_n(highz_n));
952
953cl_sc1_bs_cell2_4x bsrxp26 (
954 .d(fsr1_mcu_stsrx_bsrxp[12]),
955 .so(bsrxp26_so),
956 .q(q_unused[40]),
957 .l1clk(l1clk),
958 .si(bsrxp25_so),
959 .siclk(siclk),
960 .soclk(soclk),
961 .updateclk(updateclk),
962 .mode(mode),
963 .muxd(muxd),
964 .highz_n(highz_n));
965
966cl_sc1_bs_cell2_4x bsrxp27 (
967 .d(fsr1_mcu_stsrx_bsrxp[13]),
968 .so(bsrxp27_so),
969 .q(q_unused[41]),
970 .l1clk(l1clk),
971 .si(bsrxp26_so),
972 .siclk(siclk),
973 .soclk(soclk),
974 .updateclk(updateclk),
975 .mode(mode),
976 .muxd(muxd),
977 .highz_n(highz_n));
978
979// RXN 1
980cl_sc1_bs_cell2_4x bsrxn14 (
981 .d(fsr1_mcu_stsrx_bsrxn[0]),
982 .so(bsrxn14_so),
983 .q(q_unused[42]),
984 .l1clk(l1clk),
985 .si(bsrxp27_so),
986 .siclk(siclk),
987 .soclk(soclk),
988 .updateclk(updateclk),
989 .mode(mode),
990 .muxd(muxd),
991 .highz_n(highz_n));
992
993cl_sc1_bs_cell2_4x bsrxn15 (
994 .d(fsr1_mcu_stsrx_bsrxn[1]),
995 .so(bsrxn15_so),
996 .q(q_unused[43]),
997 .l1clk(l1clk),
998 .si(bsrxn14_so),
999 .siclk(siclk),
1000 .soclk(soclk),
1001 .updateclk(updateclk),
1002 .mode(mode),
1003 .muxd(muxd),
1004 .highz_n(highz_n));
1005
1006cl_sc1_bs_cell2_4x bsrxn16 (
1007 .d(fsr1_mcu_stsrx_bsrxn[2]),
1008 .so(bsrxn16_so),
1009 .q(q_unused[44]),
1010 .l1clk(l1clk),
1011 .si(bsrxn15_so),
1012 .siclk(siclk),
1013 .soclk(soclk),
1014 .updateclk(updateclk),
1015 .mode(mode),
1016 .muxd(muxd),
1017 .highz_n(highz_n));
1018
1019cl_sc1_bs_cell2_4x bsrxn17 (
1020 .d(fsr1_mcu_stsrx_bsrxn[3]),
1021 .so(bsrxn17_so),
1022 .q(q_unused[45]),
1023 .l1clk(l1clk),
1024 .si(bsrxn16_so),
1025 .siclk(siclk),
1026 .soclk(soclk),
1027 .updateclk(updateclk),
1028 .mode(mode),
1029 .muxd(muxd),
1030 .highz_n(highz_n));
1031
1032cl_sc1_bs_cell2_4x bsrxn18 (
1033 .d(fsr1_mcu_stsrx_bsrxn[4]),
1034 .so(bsrxn18_so),
1035 .q(q_unused[46]),
1036 .l1clk(l1clk),
1037 .si(bsrxn17_so),
1038 .siclk(siclk),
1039 .soclk(soclk),
1040 .updateclk(updateclk),
1041 .mode(mode),
1042 .muxd(muxd),
1043 .highz_n(highz_n));
1044
1045cl_sc1_bs_cell2_4x bsrxn19 (
1046 .d(fsr1_mcu_stsrx_bsrxn[5]),
1047 .so(bsrxn19_so),
1048 .q(q_unused[47]),
1049 .l1clk(l1clk),
1050 .si(bsrxn18_so),
1051 .siclk(siclk),
1052 .soclk(soclk),
1053 .updateclk(updateclk),
1054 .mode(mode),
1055 .muxd(muxd),
1056 .highz_n(highz_n));
1057
1058cl_sc1_bs_cell2_4x bsrxn20 (
1059 .d(fsr1_mcu_stsrx_bsrxn[6]),
1060 .so(bsrxn20_so),
1061 .q(q_unused[48]),
1062 .l1clk(l1clk),
1063 .si(bsrxn19_so),
1064 .siclk(siclk),
1065 .soclk(soclk),
1066 .updateclk(updateclk),
1067 .mode(mode),
1068 .muxd(muxd),
1069 .highz_n(highz_n));
1070
1071cl_sc1_bs_cell2_4x bsrxn21 (
1072 .d(fsr1_mcu_stsrx_bsrxn[7]),
1073 .so(bsrxn21_so),
1074 .q(q_unused[49]),
1075 .l1clk(l1clk),
1076 .si(bsrxn20_so),
1077 .siclk(siclk),
1078 .soclk(soclk),
1079 .updateclk(updateclk),
1080 .mode(mode),
1081 .muxd(muxd),
1082 .highz_n(highz_n));
1083
1084cl_sc1_bs_cell2_4x bsrxn22 (
1085 .d(fsr1_mcu_stsrx_bsrxn[8]),
1086 .so(bsrxn22_so),
1087 .q(q_unused[50]),
1088 .l1clk(l1clk),
1089 .si(bsrxn21_so),
1090 .siclk(siclk),
1091 .soclk(soclk),
1092 .updateclk(updateclk),
1093 .mode(mode),
1094 .muxd(muxd),
1095 .highz_n(highz_n));
1096
1097cl_sc1_bs_cell2_4x bsrxn23 (
1098 .d(fsr1_mcu_stsrx_bsrxn[9]),
1099 .so(bsrxn23_so),
1100 .q(q_unused[51]),
1101 .l1clk(l1clk),
1102 .si(bsrxn22_so),
1103 .siclk(siclk),
1104 .soclk(soclk),
1105 .updateclk(updateclk),
1106 .mode(mode),
1107 .muxd(muxd),
1108 .highz_n(highz_n));
1109
1110cl_sc1_bs_cell2_4x bsrxn24 (
1111 .d(fsr1_mcu_stsrx_bsrxn[10]),
1112 .so(bsrxn24_so),
1113 .q(q_unused[52]),
1114 .l1clk(l1clk),
1115 .si(bsrxn23_so),
1116 .siclk(siclk),
1117 .soclk(soclk),
1118 .updateclk(updateclk),
1119 .mode(mode),
1120 .muxd(muxd),
1121 .highz_n(highz_n));
1122
1123cl_sc1_bs_cell2_4x bsrxn25 (
1124 .d(fsr1_mcu_stsrx_bsrxn[11]),
1125 .so(bsrxn25_so),
1126 .q(q_unused[53]),
1127 .l1clk(l1clk),
1128 .si(bsrxn24_so),
1129 .siclk(siclk),
1130 .soclk(soclk),
1131 .updateclk(updateclk),
1132 .mode(mode),
1133 .muxd(muxd),
1134 .highz_n(highz_n));
1135
1136cl_sc1_bs_cell2_4x bsrxn26 (
1137 .d(fsr1_mcu_stsrx_bsrxn[12]),
1138 .so(bsrxn26_so),
1139 .q(q_unused[54]),
1140 .l1clk(l1clk),
1141 .si(bsrxn25_so),
1142 .siclk(siclk),
1143 .soclk(soclk),
1144 .updateclk(updateclk),
1145 .mode(mode),
1146 .muxd(muxd),
1147 .highz_n(highz_n));
1148
1149cl_sc1_bs_cell2_4x bsrxn27 (
1150 .d(fsr1_mcu_stsrx_bsrxn[13]),
1151 .so(mcu_sbs_scan_out),
1152 .q(q_unused[55]),
1153 .l1clk(l1clk),
1154 .si(bsrxn26_so),
1155 .siclk(siclk),
1156 .soclk(soclk),
1157 .updateclk(updateclk),
1158 .mode(mode),
1159 .muxd(muxd),
1160 .highz_n(highz_n));
1161
1162endmodule
1163
1164
1165
1166
1167
1168
1169// any PARAMS parms go into naming of macro
1170
1171module mcu_bscan_ctl_l1clkhdr_ctl_macro (
1172 l2clk,
1173 l1en,
1174 pce_ov,
1175 stop,
1176 se,
1177 l1clk);
1178
1179
1180 input l2clk;
1181 input l1en;
1182 input pce_ov;
1183 input stop;
1184 input se;
1185 output l1clk;
1186
1187
1188
1189
1190
1191cl_sc1_l1hdr_8x c_0 (
1192
1193
1194 .l2clk(l2clk),
1195 .pce(l1en),
1196 .l1clk(l1clk),
1197 .se(se),
1198 .pce_ov(pce_ov),
1199 .stop(stop)
1200);
1201
1202
1203
1204endmodule
1205
1206
1207
1208
1209
1210
1211
1212
Full OpenSPARC design & verification tarball including full HDL.